FreeCalypso > hg > fc-tourmaline
view src/cs/drivers/drv_app/spi/spi_task.h @ 275:79cfefc1e2b4
audio mode load: gracefully handle mode files of wrong AEC version
Unfortunately our change of enabling L1_NEW_AEC (which is necessary
in order to bring our Calypso ARM fw into match with the underlying
DSP reality) brings along a change in the audio mode file binary
format and file size - all those new tunable AEC parameters do need
to be stored somewhere, after all. But we already have existing
mode files in the old format, and setting AEC config to garbage when
loading old audio modes (which is what would happen without the
present change) is not an appealing proposition.
The solution implemented in the present change is as follows: the
audio mode loading code checks the file size, and if it differs
from the active version of T_AUDIO_MODE, the T_AUDIO_AEC_CFG structure
is cleared - set to the default (disabled AEC) for the compiled type
of AEC. We got lucky in that this varying T_AUDIO_AEC_CFG structure
sits at the end of T_AUDIO_MODE!
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Fri, 30 Jul 2021 02:55:48 +0000 |
parents | 34b7059b9337 |
children |
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/*****************************************************************************/ /* */ /* Name spi_task.h */ /* */ /* Function this file contains timers definitions used by spi_core, */ /* in case the PWR SWE is defined. */ /* */ /* Version 0.1 */ /* Author Candice Bazanegue */ /* */ /* Date Modification */ /* ------------------------------------ */ /* 20/08/2000 Create */ /* 01/09/2003 Modfication */ /* Author Pascal Puel */ /* */ /* (C) Copyright 2000 by Texas Instruments Incorporated, All Rights Reserved */ /*****************************************************************************/ #ifndef _SPI_TASK_H_ #define _SPI_TASK_H_ #include "rv/rv_defined_swe.h" // for RVM_PWR_SWE #ifdef RVM_PWR_SWE #include "pwr/pwr_cust.h" #define SPI_TIMER0 (RVF_TIMER_0) #define SPI_TIMER0_INTERVAL_1 (PWR_BAT_TEST_TIME_1) #define SPI_TIMER0_INTERVAL_2 (PWR_BAT_TEST_TIME_2) #define SPI_TIMER0_INTERVAL_3 (PWR_CALIBRATION_TIME_1) #define SPI_TIMER0_INTERVAL_4 (PWR_CALIBRATION_TIME_2) #define SPI_TIMER0_WAIT_EVENT (RVF_TIMER_0_EVT_MASK) #define SPI_TIMER1 (RVF_TIMER_1) #define SPI_TIMER1_INTERVAL (PWR_CI_CHECKING_TIME) #define SPI_TIMER1_WAIT_EVENT (RVF_TIMER_1_EVT_MASK) #define SPI_TIMER2 (RVF_TIMER_2) #define SPI_TIMER2_INTERVAL (PWR_CV_CHECKING_TIME) #define SPI_TIMER2_WAIT_EVENT (RVF_TIMER_2_EVT_MASK) #define SPI_TIMER3 (RVF_TIMER_3) #define SPI_TIMER3_INTERVAL (PWR_DISCHARGE_CHECKING_TIME_1) #define SPI_TIMER3_INTERVAL_BIS (PWR_DISCHARGE_CHECKING_TIME_2) #define SPI_TIMER3_WAIT_EVENT (RVF_TIMER_3_EVT_MASK) #endif // RVM_PWR_SWE // Prototypes void spi_adc_on (void); T_RV_RET spi_core(void); #endif // _SPI_TASK_H_