view cdg-hybrid/cdginc/p_dl.val @ 72:7bf39f5e834d

backlight control on Luna: switch PWL instead of LEDB This change is preliminary toward upcoming rework of backlight control logic in our UI firmware. LEDB does not exist on Tango-based platforms (it is not brought out on Tango modules), thus turning it on and off produces absolutely no effect beyond making L1 disable deep sleep when LEDB is turned on. However, both iWOW DSK and our upcoming FC Caramel2 boards have a PWL LED, so let's switch that LED on and off to indicate the state of the UI firmware's backlight control. Note that we are NOT switching the actual Luna LCD backlight here, even though it is trivially controlled with a GPIO. The reason for this seemingly strange choice is that we don't want to turn this development board LCD backlight off until we bring the higher-level backlight control logic up to par, including new logic to "swallow" the first keypress that turns on the darkened LCD.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 24 Oct 2020 07:39:54 +0000
parents 35f7a1dc9f7d
children
line wrap: on
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/*
+--------------------------------------------------------------------------+
| PROJECT : PROTOCOL STACK                                                 |
| FILE    : p_dl.val                                                       |
| SOURCE  : "sap\dl.pdf"                                                   |
| LastModified : "2004-04-28"                                              |
| IdAndVersion : "8010.100.02.010"                                         |
| SrcFileTime  : "Thu Nov 29 09:40:06 2007"                                |
| Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016                   |
|           !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!!                |
+--------------------------------------------------------------------------+
*/

/* PRAGMAS
 * PREFIX                 : DL
 * COMPATIBILITY_DEFINES  : NO
 * ALWAYS_ENUM_IN_VAL_FILE: YES
 * ENABLE_GROUP: NO
 * CAPITALIZE_TYPENAME: NO
 */


#ifndef P_DL_VAL
#define P_DL_VAL


#define CDG_ENTER__P_DL_VAL

#define CDG_ENTER__FILENAME _P_DL_VAL
#define CDG_ENTER__P_DL_VAL__FILE_TYPE CDGINC
#define CDG_ENTER__P_DL_VAL__LAST_MODIFIED _2004_04_28
#define CDG_ENTER__P_DL_VAL__ID_AND_VERSION _8010_100_02_010

#define CDG_ENTER__P_DL_VAL__SRC_FILE_TIME _Thu_Nov_29_09_40_06_2007

#include "CDG_ENTER.h"

#undef CDG_ENTER__P_DL_VAL

#undef CDG_ENTER__FILENAME

/* #include "p_8010_152_ps_include.val" */   /* Access values independent from the corresponding h-file. */

/* #include "p_8010_153_cause_include.val" */   /* Access values independent from the corresponding h-file. */

/* #include "p_8010_147_l1_include.val" */   /* Access values independent from the corresponding h-file. */


// VALTAB-FF: !TI_DUAL_MODE 
/*
 * Enum to value table VAL_l2_channel
 * CCDGEN:WriteEnum_Count==163
 */
#ifndef __T_DL_VAL_l2_channel__
#define __T_DL_VAL_l2_channel__
typedef enum
{
  DL_L2_CHANNEL_SACCH            = 0x1,           /* SACCH block                    */
  DL_L2_CHANNEL_SDCCH            = 0x2,           /* SDCCH block                    */
  DL_L2_CHANNEL_FACCH_H          = 0x3,           /* FACCH halfrate block           */
  DL_L2_CHANNEL_FACCH_F          = 0x4,           /* FACCH fullrate block           */
  DL_L2_CHANNEL_CCCH             = 0x5,           /* CCCH block                     */
  DL_L2_CHANNEL_NBCCH            = 0x6,           /* normal BCCH block              */
  DL_L2_CHANNEL_PCH              = 0x7,           /* PCH block                      */
  DL_L2_CHANNEL_EPCH             = 0x8,           /* extended PCH block             */
  DL_L2_CHANNEL_CBCH             = 0x9,           /* CBCH block                     */
  DL_L2_CHANNEL_EBCCH            = 0xa            /* extended BCCH                  */
}T_DL_VAL_l2_channel;
#endif

/*
 * Enum to value table VAL_sapi
 * CCDGEN:WriteEnum_Count==164
 */
#ifndef __T_DL_VAL_sapi__
#define __T_DL_VAL_sapi__
typedef enum
{
// VAL-FF: !TI_DUAL_MODE  
  DL_SAPI_0                      = 0x0,           /* SAPI 0                         */
// VAL-FF: !TI_DUAL_MODE  
  DL_SAPI_3                      = 0x3            /* SAPI 3                         */
}T_DL_VAL_sapi;
#endif

/*
 * Enum to value table VAL_indication
 * CCDGEN:WriteEnum_Count==165
 */
#ifndef __T_DL_VAL_indication__
#define __T_DL_VAL_indication__
typedef enum
{
  DL_ALL_DONE                    = 0x0,           /* no unacknowledges or unserved data requests */
  DL_UNSERVED                    = 0x1            /* unserved data requests         */
}T_DL_VAL_indication;
#endif

/*
 * Enum to value table VAL_mode
 * CCDGEN:WriteEnum_Count==166
 */
#ifndef __T_DL_VAL_mode__
#define __T_DL_VAL_mode__
typedef enum
{
  DL_NORMAL_RELEASE              = 0x0,           /* normal release procedure       */
  DL_LOCAL_END_RELEASE           = 0x1            /* local end release procedure    */
}T_DL_VAL_mode;
#endif

/*
 * Enum to value table VAL_cnf
 * CCDGEN:WriteEnum_Count==167
 */
#ifndef __T_DL_VAL_cnf__
#define __T_DL_VAL_cnf__
typedef enum
{
  DL_NO_CONFIRMATION             = 0x0            /* no confimation necessary       */
}T_DL_VAL_cnf;
#endif

/*
 * Enum to value table VAL_cs
 * CCDGEN:WriteEnum_Count==168
 */
#ifndef __T_DL_VAL_cs__
#define __T_DL_VAL_cs__
typedef enum
{
// VAL-FF: !TI_DUAL_MODE  
  DL_INFO_FIELD_MISMATCH         = 0x0            /* different information fields   */
}T_DL_VAL_cs;
#endif

/*
 * user defined constants
 */
#define DL_MAX_SDU_LEN                 (0x1)      
#define DL_N201_SACCH_A_B              (0x12)     
#define DL_N201_DCCH_A_B               (0x14)     
#define DL_N201_Bbis                   (0x17)     
#define DL_N201_SACCH_Bter             (0x15)     
#define DL_N201_DCCH_Bter              (0x17)     
#define DL_MAX_L2_FRAME_SIZE           (0x17)     
#define DL_SPD_PID                     (0x10)     

#include "CDG_LEAVE.h"


#endif