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view components/drivers_flash @ 244:96784b8974eb

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Switch_ON(): detect charging mode by CHGPRES bit Consider the following scenario: the phone is on, the user plugs in the charger, and then executes the power-off operation. In the Iota VRPC this sequence translates to a switch-off immediately followed by another switch-on - but the CHGSTS bit doesn't get set on the second switch-on cycle! Disassembly of Pirelli's fw shows that they check the CHGPRES bit, and furthermore, if both CHGPRES and ONBSTS are set, the code they pass to their modified Power_ON_Button() function is the one for charging - so let's adopt the same CHGPRES check and the same priority order for switch-on causes.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 03 May 2021 06:51:29 +0000
parents 598958aec071
children
line wrap: on
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# Building drivers_flash.lib

CFLAGS="-me -pw2 -mn -x -mt -o2 -mw"
CPPFLAGS="-DTOOL_CHOICE=0 -D_TMS470 -DMMI=$MMI"

# Includes

CPPFLAGS="$CPPFLAGS -I../config"
CPPFLAGS="$CPPFLAGS -I$SRC/nucleus"
CPPFLAGS="$CPPFLAGS -I.."
CPPFLAGS="$CPPFLAGS -I$SRC/gpf/frame/cust_os"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/system"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/hmacs"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/p_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/dyn_dwl_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/p_source0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source"

SRCDIR=$SRC/cs/drivers/drv_core

# 1st set of source modules

cfile_plain $SRCDIR/dsp_dwnld/leadapi.c
cfile_plain $SRCDIR/inth/niq.c
cfile_plain $SRCDIR/uart/uart.c
cfile_plain $SRCDIR/inth/inth.c
cfile_plain $SRCDIR/timer/timer.c
cfile_plain $SRCDIR/timer/timer1.c
cfile_plain $SRCDIR/timer/timer2.c
cfile_plain $SRCDIR/timer/timer_sec.c
cfile_plain $SRCDIR/security/certificate.c
cfile_plain $SRCDIR/clkm/clkm.c
cfile_plain $SRCDIR/armio/armio.c

# 2nd set of source modules

CFLAGS="-me -pw2 -mn -mt"

cfile_plain $SRCDIR/spi/spi_drv.c
cfile_plain $SRCDIR/abb/abb.c
cfile_plain $SRCDIR/abb/abb_core_inth.c

# niq32

CFLAGS="-me -pw2 -x -o -mw"

cfile_plain $SRCDIR/inth/niq32.c