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VIBR SWE hooked into RiViera
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 27 Mar 2022 19:44:08 +0000
parents 572c3ee87676
children
line wrap: on
line source

# New Tourmaline component: compiling Nucleus from source (internal RAM)

CFLAGS="-mn -me -mt -o -mw"
CPPFLAGS=

SRCDIR=$SRC/nucleus

cfile_plain $SRCDIR/csc.c
cfile_plain $SRCDIR/pmc.c
cfile_plain $SRCDIR/pmce.c
cfile_plain $SRCDIR/pmd.c
cfile_plain $SRCDIR/smc.c
cfile_plain $SRCDIR/smce.c
cfile_plain $SRCDIR/smd.c
cfile_plain $SRCDIR/tcc.c
cfile_plain $SRCDIR/tcce.c
cfile_plain $SRCDIR/tcd.c
cfile_plain $SRCDIR/tmc.c
cfile_plain $SRCDIR/tmd.c
cfile_plain $SRCDIR/tms.c
cfile_plain $SRCDIR/tmse.c

# assembly modules

ASMFLAGS=-me
ASMFLAGS="$ASMFLAGS -dOP_L1_STANDALONE=0"
ASMFLAGS="$ASMFLAGS -dTI_NUC_MONITOR=0"

SRCDIR=$SRC/cs/os/nucleus
asm_file $SRCDIR/tct.s

SRCDIR=$SRC/nucleus/tms470
asm_file $SRCDIR/tmt.s