view src/cs/system/main/gcc/vectors.S @ 300:edcb8364d45b

L1: resurrect TCH tap feature In this new incarnation of our TCH tap feature, we support DL sniffing in all 3 of FR1, HR1 and EFR, and the new implementation will capture every 20 ms frame where the old one silently skipped a frame (sent nothing) during FACCH stealing. The wire interface on RVTMUX changed slightly, and fc-shell tch record will need to be updated to support the new version. TCH UL play or substitution is supported for FR1 and EFR only; support for HR1 can be added later if needed.
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 13 Dec 2022 02:44:01 +0000
parents 4e78acac3d88
children
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/*
 * These 7 branch instructions, corresponding to ARM exception and interrupt
 * vectors, will be placed in different sections depending on the flashImage
 * vs. ramImage configuration and which target we build for; this little
 * snippet file will be #included where it is needed.
 */

	b	_arm_undefined
	b	_arm_swi
	b	_arm_abort_prefetch
	b	_arm_abort_data
	b	_arm_reserved
	b	_INT_IRQ
	b	_INT_FIQ