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view components/drivers_flash @ 286:ee16d57b32b2

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Condat audio_Init(): rm setting of sidetone level The default sidetone level in the absence of audio mode loading is just that, a basic default without any promises of good tuning. In the original TCS211 code this default sidetone level was set in two places: first in L1 init of ABB-via-DSP registers (set to -17 dB), and then initialized again in Condat audio_Init(), this time set to -5 dB. The present change removes the redundant second initialization. The default sidetone level is now -17 dB instead of -5 dB with this change, but again it is just the default; all serious users are now expected to use audio mode config files.
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 09 Nov 2021 02:16:59 +0000
parents 598958aec071
children
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# Building drivers_flash.lib

CFLAGS="-me -pw2 -mn -x -mt -o2 -mw"
CPPFLAGS="-DTOOL_CHOICE=0 -D_TMS470 -DMMI=$MMI"

# Includes

CPPFLAGS="$CPPFLAGS -I../config"
CPPFLAGS="$CPPFLAGS -I$SRC/nucleus"
CPPFLAGS="$CPPFLAGS -I.."
CPPFLAGS="$CPPFLAGS -I$SRC/gpf/frame/cust_os"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/system"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/hmacs"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/p_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/dyn_dwl_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/p_source0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source"

SRCDIR=$SRC/cs/drivers/drv_core

# 1st set of source modules

cfile_plain $SRCDIR/dsp_dwnld/leadapi.c
cfile_plain $SRCDIR/inth/niq.c
cfile_plain $SRCDIR/uart/uart.c
cfile_plain $SRCDIR/inth/inth.c
cfile_plain $SRCDIR/timer/timer.c
cfile_plain $SRCDIR/timer/timer1.c
cfile_plain $SRCDIR/timer/timer2.c
cfile_plain $SRCDIR/timer/timer_sec.c
cfile_plain $SRCDIR/security/certificate.c
cfile_plain $SRCDIR/clkm/clkm.c
cfile_plain $SRCDIR/armio/armio.c

# 2nd set of source modules

CFLAGS="-me -pw2 -mn -mt"

cfile_plain $SRCDIR/spi/spi_drv.c
cfile_plain $SRCDIR/abb/abb.c
cfile_plain $SRCDIR/abb/abb_core_inth.c

# niq32

CFLAGS="-me -pw2 -x -o -mw"

cfile_plain $SRCDIR/inth/niq32.c