FreeCalypso > hg > fc-tourmaline
view src/cs/riviera/tests/rv/rv_test_misc.h @ 268:f2e52cab0a73
abb_inth.c: check all interrupt causes, not just one
The original code used if - else if - else if etc constructs, thus
the first detected interrupt was the only one handled. However,
Iota ITSTATREG is a clear-on-read register, thus if we only handle
the first detected interrupt and skip checking the others, then the
other interrupts will be lost, if more than one interrupt happened
to occur in one ABB interrupt handling cycle - a form of rare race
condition. Change the code to check all interrupts that were read
in this cycle.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Sun, 13 Jun 2021 18:17:53 +0000 |
| parents | 4e78acac3d88 |
| children |
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/** * @file rv_test_misc.h * * Definitions used for miscellaneous tests. * * @author Cedric Baudelet * @author Vincent Oberle */ /* * History: * * Date Author Modification * ------------------------------------------------------------------- * 09/29/00 Cedric Baudelet Create. * 03/15/02 Vincent Oberle Passed all remaining macros into function. * Comment and formating cleaning. * * (C) Copyright 2002 by Texas Instruments Incorporated, All Rights Reserved */ #ifndef _RV_TEST_MISC_H_ #define _RV_TEST_MISC_H_ #include "tests/rv/rv_test.h" #ifdef __cplusplus extern "C" { #endif /* * DO NOT MODIFY THIS FILE! * Add your test in the corresponding .c file only. */ /** Misc test number type */ typedef T_RV_TEST_NBR T_RV_MISC_TEST_NBR; /** Misc test return value type */ typedef T_RV_TEST_RET T_RV_MISC_RET; /** Misc test error type */ typedef T_RV_TEST_ERR_TYPE T_RV_MISC_ERR_TYPE; #ifdef __cplusplus } #endif #endif /* _RV_TEST_MISC_H_ */