view src/cs/drivers/drv_core/conf/sys_conf_dsp_int.h @ 303:f76436d19a7a default tip

!GPRS config: fix long-standing AT+COPS chance hanging bug There has been a long-standing bug in FreeCalypso going back years: sometimes in the AT command bring-up sequence of an ACI-only MS, the AT+COPS command would produce only a power scan followed by cessation of protocol stack activity (only L1 ADC traces), instead of the expected network search sequence. This behaviour was seen in different FC firmware versions going back to Citrine, and seemed to follow some law of chance, not reliably repeatable. This bug has been tracked down and found to be specific to !GPRS configuration, stemming from our TCS2/TCS3 hybrid and reconstruction of !GPRS support that was bitrotten in TCS3.2/LoCosto version. ACI module psa_mms.c, needed only for !GPRS, was missing in the TCS3 version and had to be pulled from TCS2 - but as it turns out, there is a new field in the MMR_REG_REQ primitive that needs to be set correctly, and that psa_mms.c module is the place where this initialization needed to be added.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 08 Jun 2023 08:23:37 +0000
parents 4e78acac3d88
children
line wrap: on
line source

/*                @(#) nom : sys_conf_dsp_int.h SID: 1.1 date : 04/02/03      */
/* Filename:      sys_conf_dsp_int.h                                          */
/* Version:       1.1                                                         */
/******************************************************************************
 *                   WIRELESS COMMUNICATION SYSTEM DEVELOPMENT
 *
 *             (C) 2002 Texas Instruments France. All rights reserved
 *
 *                          Author : Francois AMAND
 *
 *
 *  Important Note
 *  --------------
 *
 *  This S/W is a preliminary version. It contains information on a product 
 *  under development and is issued for evaluation purposes only. Features 
 *  characteristics, data and other information are subject to change.
 *
 *  The S/W is furnished under Non Disclosure Agreement and may be used or
 *  copied only in accordance with the terms of the agreement. It is an offence
 *  to copy the software in any way except as specifically set out in the 
 *  agreement. No part of this document may be reproduced or transmitted in any
 *  form or by any means, electronic or mechanical, including photocopying and
 *  recording, for any purpose without the express written permission of Texas
 *  Instruments Inc.
 *
 ******************************************************************************
 *
 *  FILE NAME: sys_conf_dsp_int.h
 *
 *
 *  PURPOSE:  Include file to configure CONF CORE module of CALYPSO PLUS.
 *
 *
 *  FILE REFERENCES:
 *
 *  Name                  IO      Description
 *  -------------         --      ---------------------------------------------
 *  
 *
 *
 *  EXTERNAL VARIABLES:
 *
 *  Source:
 *
 *  Name                  Type              IO   Description
 *  -------------         ---------------   --   ------------------------------
 *
 *
 *
 *  EXTERNAL REFERENCES:
 *
 *  Name                Description
 *  ------------------  -------------------------------------------------------
 *
 *
 *
 *  ABNORMAL TERMINATION CONDITIONS, ERROR AND WARNING MESSAGES:
 *  
 *
 *
 *  ASSUMPTION, CONSTRAINTS, RESTRICTIONS:
 *  
 *
 *
 *  NOTES:
 *  
 *
 *
 *  REQUIREMENTS/FUNCTIONAL SPECIFICATION REFERENCES:
 *
 *
 *
 *
 *  DEVELOPMENT HISTORY:
 *
 *  Date         Name(s)         Version  Description
 *  -----------  --------------  -------  -------------------------------------
 *  2-april-2003  G.Leterrier    0.0.1    First implementation
 *
 *  ALGORITHM: 
 *
 *
 *****************************************************************************/

#include "chipset.cfg"

  #if (CHIPSET == 12)
      
    
    /****************************************************************************
     *                            CONSTANT DEFINITION
     ***************************************************************************/
  
    /*
     *  DSP INTERRUPT  DEFINITION
     */
      #define C_DBG_DSP_INT_RIF_RX                 0
      #define C_DBG_DSP_INT_RIF_TX                 1
      #define C_DBG_DSP_INT_UART                   2
      #define C_DBG_DSP_INT_MCSI1_RX_MCSI2_TX      3
      #define C_DBG_DSP_INT_MCSI1_TX_MCSI2_RX      4
      #define C_DBG_DSP_INT_MCSI_FRAME             5
      #define C_DBG_DSP_INT_MCSI_DAI_CPORT_TX_RX   6
      #define C_DBG_DSP_INT_CYPHER                 7
      #define C_DBG_DSP_INT_TPU_FRAME              8
      #define C_DBG_DSP_INT_TPU_PROG_INT           9
      #define C_DBG_DSP_INT_DMA                    10
      #define C_DBG_DSP_INT_EXT_INT                11



    /****************************************************************************
     *                            MACRO DEFINITION
     ***************************************************************************/

    /****************************************************************************
     *                            STRUCTURE DEFINITION
     ***************************************************************************/

    /****************************************************************************
     *                            PROTOTYPE DEFINITION
     ***************************************************************************/
    
 
  #endif /* CHIPSET == 12 */