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comparison src/cs/system/template/gsm_ds_int8_lj3.template @ 0:92470e5d0b9e

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src: partial import from FC Selenite
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 15 May 2020 01:28:16 +0000
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1 /*
2 * Integrated Protocol Stack Linker command file (all components)
3 *
4 * Target : ARM
5 *
6 * Copyright (c) Texas Instruments 2002, Condat 2002
7 *
8 */
9
10 -c /* Autoinitialize variables at runtime */
11
12 /*********************************/
13 /* SPECIFY THE SYSTEM MEMORY MAP */
14 /*********************************/
15
16 MEMORY
17 {
18 /* CS0: Flash 8 Mbytes ****************************************************/
19 /* Interrupt Vectors Table */
20 I_MEM (RXI) : org = 0x00000000 len = 0x00000100
21
22 /* Boot Sector */
23
24 /* COMMENT1 stuff is commented out when using the 1.22e compiler */
25 /* COMMENT2 stuff ditto, but when using 2.54 */
26
27 B_MEM (RXI) : org = 0x00000100 len = 0x00001f00
28
29 /* Magic Word for Calypso Boot ROM */
30 MWC_MEM (RXI) : org = 0x00002000 len = 0x00000004 fill = 0x0000001
31
32 /* Program Memory */
33
34 P_MEM1 (RXI) : org = 0x00010000 len = 0x00000700
35 P_MEM2 (RXI) : org = 0x00010700 len = 0x00000004
36 P_MEM3 (RXI) : org = 0x00010704 len = 0x00400000
37 P_MEM4 (RXI) : org = 0x00410704 len = 0x002ef8fc
38
39 /* FFS Area */
40 FFS_MEM (RX) : org = 0x00700000 len = 0x00100000
41 /**************************************************************************/
42
43 /* CS1: External SRAM 1 Mbytes ********************************************/
44 /* Data Memory */
45 D_MEM1 (RW) : org = 0x01000000 len = 0x00100000
46 /**************************************************************************/
47
48 /* CS2: External SRAM 8 Mbytes ********************************************/
49 /* Data Memory */
50 D_MEM2 (RW) : org = 0x01800000 len = 0x00800000
51 /**************************************************************************/
52
53 /* CS6: Calypso Internal SRAM 512 kbytes **********************************/
54 /* Code & Variables Memory */
55 S_MEM (RXW) : org = 0x00800000 len = 0x00080000
56 /**************************************************************************/
57 }
58
59 /***********************************************/
60 /* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
61 /***********************************************/
62
63 /*
64 * Since the bootloader directly calls the INT_Initialize() routine located
65 * in int.s, this int.s code must always be mapped at the same address
66 * (usually in the second flash sector). Its length is about 0x500 bytes.
67 * Then comes the code that need to be loaded into the internal RAM.
68 */
69
70 SECTIONS
71 {
72 .intvecs : {} > I_MEM /* Interrupt Vectors Table */
73 .monitor : > B_MEM /* Monitor Constants & Code */
74 {
75 $(CONST_BOOT_LIB)
76 }
77
78 .inttext : {} > P_MEM1 /* int.s Code */
79
80 .bss_dar : > D_MEM1 /* DAR SWE Variables */
81 {
82 $(BSS_DAR_LIB)
83 }
84
85 /*
86 * The .bss section should not be split to ensure it is initialized to 0
87 * each time the SW is reset. So the whole .bss is mapped either in D_MEM1
88 * or in D_MEM2.
89 */
90
91 .bss : > D_MEM1 | D_MEM2 /* Global & Static Variables */
92 {
93 $(BSS_BOOT_LIB)
94 }
95
96 /*
97 * All .bss sections, which must be mapped in internal RAM must be
98 * grouped in order to initialized the corresponding memory to 0.
99 * This initialization is done in int.s file before calling the Nucleus
100 * routine.
101 */
102
103 GROUP
104 {
105 S_D_Mem /* Label of start address of .bss section in Int. RAM */
106 .DintMem
107 {
108
109 /*
110 * .bss sections of the application
111 */
112
113 $(BSS_LIBS)
114
115 }
116
117 API_HISR_stack : {}
118
119 E_D_Mem /* Label of end address of .bss section in Int. RAM */
120 } > S_MEM
121
122 /*
123 * .text and .const sections which must be mapped in internal RAM.
124 */
125
126 .ldfl : {} > P_MEM2 /* Used to know the start load address */
127 GROUP load = P_MEM3 | P_MEM4, run = S_MEM
128 {
129 S_P_Mem /* Label of start address of .text & .const sections in Int. RAM */
130 .PIntMem
131 {
132 /*
133 * .text and .const sections of the application.
134 *
135 * The .veneer sections correspond exactly to .text:v&n sections
136 * implementing the veneer functions. The .text:v$n -> .veneer
137 * translation is performed by PTOOL software when PTOOL_OPTIONS
138 * environement variable is set to veneer_section.
139 */
140
141 $(CONST_LIBS)
142
143 }
144 E_P_Mem /* Label of end address of .text and .const sections in Int. RAM */
145 }
146
147 /*
148 * The rest of the code is mapped in flash, however the trampolines
149 * load address should be consistent with .text.
150 */
151
152 COMMENT2START
153 `trampolines load = P_MEM3 | P_MEM4, run = S_MEM
154 COMMENT2END
155
156 .text : {} >> P_MEM3 | P_MEM4 /* Code */
157
158 /*
159 * The rest of the constants is mapped in flash.
160 * The .cinit section should not be split.
161 */
162
163 .cinit : {} > P_MEM4 /* Initialization Tables */
164 .const : {} >> P_MEM4 | P_MEM3 /* Constant Data */
165 KadaAPI : {} >> P_MEM4 | P_MEM3 /* ROMized CLDC */
166
167 .javastack: {} >> D_MEM1 | D_MEM2 /* Java stack */
168
169 .stackandheap : > D_MEM1 /* System Stacks, etc... */
170 {
171 /* Leave 20 32bit words for register pushes. */
172 . = align(8);
173 . += 20 * 4;
174
175 /* Stack for abort and/or undefined modes. */
176 exception_stack = .;
177
178 /* Leave 38 32bit words for state saving on exceptions. */
179 _xdump_buffer = .;
180 . += 38 * 4;
181 . = align(8);
182
183 /* Beginning of stacks and heap area - 2.75 kbytes (int.s) */
184 stack_segment = .;
185 . += 0xB00;
186 }
187
188 .data : {} > D_MEM1 /* Initialized Data */
189 .sysmem : {} > D_MEM1 /* Dynamic Memory Allocation Area */
190
191 }