FreeCalypso > hg > freecalypso-citrine

annotate L1/tpudrv/tpudrv10.h @ 35:23dbd942aa56

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
doc/Current_Status: update for the latest fixes
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 15 Oct 2016 05:15:23 +0000
parents 75a11d740a02
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 /****************** Revision Controle System Header ***********************
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 * GSM Layer 1 software
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 * Copyright (c) Texas Instruments 1998
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 *
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 * Filename tpudrv10.h
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 * Copyright 2003 (C) Texas Instruments
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7 *
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 ****************** Revision Controle System Header ***********************/
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10 #define BIT_0 0x000001
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11 #define BIT_1 0x000002
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12 #define BIT_2 0x000004
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13 #define BIT_3 0x000008
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14 #define BIT_4 0x000010
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15 #define BIT_5 0x000020
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16 #define BIT_6 0x000040
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 #define BIT_7 0x000080
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
18 #define BIT_8 0x000100
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
19 #define BIT_9 0x000200
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20 #define BIT_10 0x000400
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21 #define BIT_11 0x000800
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
22 #define BIT_12 0x001000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
23 #define BIT_13 0x002000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
24 #define BIT_14 0x004000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
25 #define BIT_15 0x008000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
26 #define BIT_16 0x010000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
27 #define BIT_17 0x020000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
28 #define BIT_18 0x040000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
29 #define BIT_19 0x080000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
30 #define BIT_20 0x100000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
31 #define BIT_21 0x200000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
32 #define BIT_22 0x400000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
33 #define BIT_23 0x800000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
34
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
35
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
36 //TRF6150 definitions
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
37 #define MODE0 0x000000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
38 #define MODE1 0x000001
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
39 #define MODE2 0x000002
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
40 #define MODE3 0x000003
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
41 #define MODE4 0x000004
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
42 #define MODE5 0x000005
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
43 #define MODE6 0x000006
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
44 #define MODE7 0x000007
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
45
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
46 #define REGUL_ON BIT_3 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
47 #define BG_SPEEDUP BIT_4 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
48 #define RX_ON_CLARA BIT_5 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
49 #define TX_ON_CLARA BIT_6 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
50 #define PA_CTRLR_ON BIT_7 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
51 #define AUX_SYNTH_ON BIT_8 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
52 #define MAIN_SYNTH_OFF 0x000000 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
53 #define MAIN_SYNTH_ON_RX BIT_9 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
54 #define MAIN_SYNTH_ON_TX BIT_10 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
55 #define DCO_COMP_ON BIT_11 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
56 #define DCO_COMP_RUN BIT_12 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
57 #define BAND_SELECT_GSM BIT_13 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
58 #define BAND_SELECT_850 BIT_13 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
59 #define BAND_SELECT_PCS BIT_14 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
60 #define BAND_SELECT_DCS (BIT_14 | BIT_13)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
61
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
62 #define RX_RF_GAIN BIT_15 //MODE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
63
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
64 // MODE1 is only for Receiver gain programming (AGC)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
65
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
66 #define AUX_SHDW_ADD(arfcn) ((arfcn >= 822) && (arfcn <= 885)) ? BIT_3 : 0 //MODE2
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
67 #define AUX_SHDW_RCL BIT_4 //MODE2
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
68 #define MAIN_FCU_REG_100 BIT_7 //MODE2
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
69 #define PA_CTRL_I_DIOD BIT_23 //MODE2
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
70
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
71 //MODE3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
72 #define TEST_MODE BIT_3 //MODE3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
73 #define HB_OPLL_PRECHARGE BIT_4 //MODE3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
74
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
75 #define HB_OPLL_CP_CUR_0_125MA 0x000000 //0.125 mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
76 #define HB_OPLL_CP_CUR_0_25MA BIT_5 //0.25 mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
77 #define HB_OPLL_CP_CUR_0_5MA BIT_6 //0.5 mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
78 #define HB_OPLL_CP_CUR_1MA (BIT_6 | BIT_5) //1 mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
79 #define HB_OPLL_CP_CUR_2MA BIT_7 //2 mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
80
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
81 #define LB_OPLL_PRECHARGE BIT_8 //MODE3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
82
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
83 #define LB_OPLL_CP_CUR_0_125MA 0x000000 //0.125 mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
84 #define LB_OPLL_CP_CUR_0_25MA BIT_9 //0.25 mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
85 #define LB_OPLL_CP_CUR_0_5MA BIT_10 //0.5 mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
86 #define LB_OPLL_CP_CUR_1MA (BIT_10 | BIT_9) //1 mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
87 #define LB_OPLL_CP_CUR_2MA BIT_11 //2 mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
88
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
89 #define CLK_REF BIT_17 //MODE3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
90 #define MAIN_VCO_EN BIT_18 //MODE3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
91 #define AUX_VCO_EN BIT_19 //MODE3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
92 #define EXT_VCO_CONTROL BIT_20 //MODE3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
93 #define TEMP_SENSOR_EN BIT_21 //MODE3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
94
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
95 //MODE4
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
96 #define MAIN_TIMER_RX_49_2US BIT_6 //MODE4
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
97 #define MAIN_TIMER_RX_55_35US ( 8 << 3) //added 30.01.02
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
98 #define MAIN_TIMER_RX_61_5US (10 << 3)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
99 #define MAIN_TIMER_RX_78_9US (13 << 3)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
100 #define MAIN_TIMER_RX_91_9US (15 << 3)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
101 #define MAIN_TIMER_RX_98_4US (16 << 3)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
102 #define MAIN_TIMER_RX_159_9US (26 << 3) //added 21.08 CR
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
103
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
104
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
105 #define MAIN_TIMER_TX_49_2US BIT_11 //MODE4
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
106 #define MAIN_TIMER_TX_61_5US (10 << 8) //added 30.01.02
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
107 #define MAIN_TIMER_TX_104US (17 << 8) //added for RS
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
108 #define MAIN_TIMER_TX_98_4US (16 << 8)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
109 #define MAIN_TIMER_TX_123US (20 << 8) //added 21.08 CR
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
110
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
111 #define MAIN_CP_CUR_0 0x000000 //MODE4 400uA, 1.6mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
112 #define MAIN_CP_CUR_1 BIT_21 //MODE4 400uA, 3.2mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
113 #define MAIN_CP_CUR_2 BIT_22 //MODE4 800uA, 3.2mA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
114 #define MAIN_CP_CUR_3 (BIT_22 | BIT_21)//MODE4 same as 2
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
115
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
116 #define FC_60 (60 << 13)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
117 #define FC_63 (63 << 13)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
118 #define FC_70 (70 << 13)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 #define FC_100 (100 << 13)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 #define FC_109 (109 << 13)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121 #define FC_110 (110 << 13)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 //MODE5
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 #define SHDW_LOAD BIT_3 //MODE5
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 #define AUX_PRG_MOD BIT_4 //MODE5
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 #define AUX_PFD BIT_14 //MODE5
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 //MODE6
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 #define FREQ_CAL_ON BIT_4 //MODE6
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 #define FREQ_CAL_MODE BIT_5 //MODE6
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 //MODE7
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 #define FREQ_CAL_DATA (0xd << 19) // 6.15 (00000)-8.88 (01101)-12.66 pF (11111)- modified CR 11.09.01, was (0xb << 19)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 // RF signals connected to TSPACT [0..7]
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 //#define RESET_RF BIT_0 // act0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 #define CLA_SER_ON BIT_0 // act0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 #define CLA_SER_OFF 0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 #define TXVCO_ON 0 // act3 inverted
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 #define TXVCO_OFF BIT_3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 #define TX_ON BIT_5 // act5
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 #define TX_OFF 0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 // RF signals connected to TSPACT for Titanium v2.2
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 #if 0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 //B-Sample
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 #define PA900_ON BIT_2 // signals are inverted therefore PA900_ON act1
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 #define PA1800_ON BIT_1 // and PA1800_ON act2
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 #define PA900_OFF BIT_1 //
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 #define PA1800_OFF BIT_2 //
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 #endif
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 #if 0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 //C-Sample
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156 #define PA900_ON BIT_1 // signals are inverted therefore PA900_ON act1
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 #define PA1800_ON BIT_2 // and PA1800_ON act2
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 #define PA900_OFF BIT_2 //
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 #define PA1800_OFF BIT_1 //
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 #endif
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 #if 1
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 //D-Sample
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 #define PA900_ON BIT_1 // signals are inverted therefore PA900_ON act1
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 #define PA1800_ON BIT_2 // and PA1800_ON act2
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 #define RX1900_ON 0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 #define PA900_OFF BIT_2 //
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 #define PA1800_OFF BIT_1 //
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 #define RX1900_OFF BIT_4
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 //RX_UP/DOWN and TX_UP/DOWN
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 #define RU_900 (PA900_OFF | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 #define RD_900 (PA900_OFF | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 #define TU_900 (PA900_ON | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 #define TD_900 (PA900_OFF | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 #define TU_REV_900 (PA900_OFF | PA1800_ON | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 #define RU_850 (PA900_OFF | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 #define RD_850 (PA900_OFF | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 #define TU_850 (PA900_ON | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 #define TD_850 (PA900_OFF | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 #define TU_REV_850 (PA900_OFF | PA1800_ON | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 #define RU_1800 (PA900_OFF | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 #define RD_1800 (PA900_OFF | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 #define TU_1800 (PA900_OFF | PA1800_ON | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 #define TD_1800 (PA900_OFF | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 #define TU_REV_1800 (PA900_ON | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 #define RU_1900 (PA900_OFF | PA1800_OFF | RX1900_ON)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 #define RD_1900 (PA900_OFF | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 #define TU_1900 (PA900_OFF | PA1800_ON | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 #define TD_1900 (PA900_OFF | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 #define TU_REV_1900 (PA900_ON | PA1800_OFF | RX1900_OFF)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 #endif
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 #define TC1_DEVICE_ABB TC1_DEVICE0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 #define TC1_DEVICE_RF TC1_DEVICE2
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 #define SL_SU_DELAY1 4 // No. bits to send + load data to shift + send write cmd + 1
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 #define SL_SU_DELAY2 3 // load data to shift + send write cmd + 1
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 #define SL_SU_DELAY3 5 // SL_SU_DELAY1 + serialization
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 #define DLT 20 // (TRF6150) DownLoadTime
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 #define DLT_1 1 // 1 tpu instruction = 1 qbit
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 #define DLT_2 2
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 #define DLT_3 3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 #define DLT_1B 4 // 3*move + 1*byte (download)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 #define DLT_2B 6 // 4*move + 2*byte
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 #define DLT_3B 8 // 5*move + 3*byte
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 //#define crch_timing 420//250//420//0 // CR d.07.08.01 - Temperary movement of Rx and Tx timing for Titanium. Will be set to 0 when new LF is ready.
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 #define rdt 0//359 // rx delta timing
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 #define tdt 0//293 // tx delta timing
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 /*------------------------------------------*/
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 /* Download delay values */
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 /*------------------------------------------*/
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 // 0.9230769 usec ~ 1 qbit i.e. 200 usec is ~ 217 qbit
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 #define T TPU_CLOCK_RANGE
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 #define TRF_I7 334 //qbit
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 #define TRF_I8 378 //qbit
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 // time below are offset to when BDLENA goes low
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 #define TRF_R15 ( 0 - DLT_1B) // 0, BDLENA low, needs DLT_1B to execute
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233 #define TRF_R13 ( - 32 - DLT_1B) // 8 right after, power off transceiver
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 //burst data comes here
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 // time below are offset to when BDLENA goes high
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 #define TRF_R12 (PROVISION_TIME - 0 - DLT_1B) // BDLENA i/q comes 32qbit later
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 #define TRF_R10 (PROVISION_TIME - 8 - DLT_1B) // Set RX/TX switch (not really necessary as the default setting is RX mode)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 #define TRF_R9 (PROVISION_TIME - 16 - DLT_2B) // RX_ON_CLARA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 #define TRF_R7 (PROVISION_TIME - 66 - DLT_1B) // 67qbit duration BDLON + BDLCAL
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 #define TRF_R6 (PROVISION_TIME - 83 - DLT_1B) // BDLON, RX_ON_CLARA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 #define TRF_R5 (PROVISION_TIME - 172 - DLT_2B - rdt) // DC offset comp. start LNA ON
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243 //#define TRF_R4 (PROVISION_TIME - 172 - DLT_2B - rdt) // DC offset comp. LNA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 #define TRF_R3 (PROVISION_TIME - 177 - DLT_2B - rdt) // DC offset comp. GAIN
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 //l1dmacro_adc_read_rx() called here requires ~ 16 tpuinst
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 //#define TRF_R2_1 (PROVISION_TIME - 199 - DLT_2B - rdt) // fc
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 //#define TRF_R2 (PROVISION_TIME - 199 - DLT_2B - rdt) // select band
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248 #define TRF_R1 (PROVISION_TIME - 209 - DLT_3B - rdt) // Main PLL + set of Main PLL FC & CP current
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 // time below are offset to when BULENA goes low
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 #define TRF_T17 ( 32 - SL_SU_DELAY2) // right after, BULON low
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253 //#define TRF_T17 ( 32 ) // right after, BULON low
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 #define TRF_T16 ( 26 - DLT_1B) // Power down Clara
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255 #define TRF_T15 ( 14 - DLT_1) // disable TX_ON
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256 #define TRF_T14 ( 0 - DLT_1B) // BULENA off
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257 #define TRF_T13_3 (- 40 - DLT_1B) // ADC read
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258 //burst data comes here
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259 // time below are offset to when BULENA goes high
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260 #define TRF_T13_2 ( 25 - DLT_1) // TX_ON
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
261 #define TRF_T13_1 ( 17 - DLT_1) // set rf switch
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
262 #define TRF_T12 (- 0 - DLT_1B) // BULENA Start of TX burst
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263 #define TRF_T10 (- 70 - DLT_3B - tdt) // normal speed
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 #define TRF_T9 (- 121 - DLT_2B - tdt) // Power up TXVCO
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
265 #define TRF_T8 (- 127 - DLT_1B - tdt) // BULON, disable BULCAL
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
266 #define TRF_T7 (- 127 - DLT_1B - tdt) // 131 BULON, disable BULCAL
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 #define TRF_T6 (- 137 - DLT_3B - tdt) // Speed up
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
268 #define TRF_T4 (- 249 - DLT_1B - tdt) // prog AUX PLL & detector polarity
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
269 #define TRF_T3_1 (- 258 - DLT_2B - tdt) // fc
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
270 #define TRF_T3 (- 258 - DLT_2B - tdt) // 20 BULON + BULCAL + select band
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 #define TRF_T2 (- 267 - DLT_3B - tdt) // set of Main PLL FC & CP current
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272 #define TRF_T1 (- 277 - DLT_3B - tdt) // BULON + Main PLL
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
273
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
274
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
275 /*------------------------------------------*/
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
276 /* Is arfcn in the DCS band (512-885) ? */
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
277 /*------------------------------------------*/
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
278 // is working only for GSM and DCS (not PCN)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
279 #define IS_DCS_HIGH(arfcn) (((arfcn >= 576) && (arfcn <= 885))? 1 : 0) //Changed by CR 30.08.01, was (((arfcn >= 822) && (arfcn <= 885))? 1 : 0)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
281 #ifdef TPUDRV10_C
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283 #endif
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
284
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
285