FreeCalypso > hg > freecalypso-citrine

annotate L1/include/l1_tabs.h @ 33:6a2b09d3b1b4

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disable L1_DYN_DSP_DWNLD and AMR by default
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 15 Oct 2016 04:23:58 +0000
parents f93dab57b032
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1_TABS.H
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4 *
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5 * Filename l1_tabs.h
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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9 /***********************************************************
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10 * Content:
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11 * This file contains the miscelaneous ROM tables.
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12 ***********************************************************/
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13
3
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14 #ifdef L1_ASYNC_C
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15 /*-----------------------------------------------------------------*/
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16 /* Idle Tasks info. (Paging position, extended Paging position...) */
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17 /*-----------------------------------------------------------------*/
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18 /* REM: */
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19 /* The "working area" field gives the starting position of an area */
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20 /* it will be used for neighbour: - FB search, */
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21 /* - SB reading, */
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22 /* The value given for each parameter set takes into account the */
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23 /* size of the "FB search" task and the CBCH task. */
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24 /*-----------------------------------------------------------------*/
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25 // NP or EP task size: 1 + 4 + 1 = 6.
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26 // BCCHS task size: 1 + 4 + 1 = 6.
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27 // FB task size: 1 + 12 + 1 = 14. --+-- FB + SB task take 15 TDMA (pipeline overlay).
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28 // SB task size: 1 + 2 + 1 = 4. --+
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29 // CNF, SB task size: 1 + 2 + 1 = 4.
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30 // BC (Broad. Channel): 1 + 4 + 1 = 6
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31
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32 const T_IDLE_TASK_INFO IDLE_INFO_NCOMB[(MAX_AG_BLKS_RES_NCOMB+1) * (MAX_PG_BLOC_INDEX_NCOMB+1)] =
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33 // BS_CCCH_SDCCH_COMB = False, BCCH not combined.
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34 {
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35 // BS_AG_BLKS_RES = 0.
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36 // -------------------
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37 // Paging, Ext Paging
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38 { CCCH_0, CCCH_2 }, // Paging Block Index = 0.
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39 { CCCH_1, CCCH_3 }, // Paging Block Index = 1.
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40 { CCCH_2, CCCH_4 }, // Paging Block Index = 2.
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41 { CCCH_3, CCCH_5 }, // Paging Block Index = 3.
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42 { CCCH_4, CCCH_6 }, // Paging Block Index = 4.
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43 { CCCH_5, CCCH_7 }, // Paging Block Index = 5.
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44 { CCCH_6, CCCH_8 }, // Paging Block Index = 6.
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45 { CCCH_7, CCCH_0 }, // Paging Block Index = 7.
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46 { CCCH_8, CCCH_1 }, // Paging Block Index = 8.
0
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47
3
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48 // BS_AG_BLKS_RES = 1.
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49 // -------------------
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50 // Paging, Ext Paging
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51 { CCCH_1, CCCH_3 }, // Paging Block Index = 0.
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52 { CCCH_2, CCCH_4 }, // Paging Block Index = 1.
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53 { CCCH_3, CCCH_5 }, // Paging Block Index = 2.
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54 { CCCH_4, CCCH_6 }, // Paging Block Index = 3.
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55 { CCCH_5, CCCH_7 }, // Paging Block Index = 4.
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56 { CCCH_6, CCCH_8 }, // Paging Block Index = 5.
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57 { CCCH_7, CCCH_1 }, // Paging Block Index = 6.
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58 { CCCH_8, CCCH_2 }, // Paging Block Index = 7.
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59 { NULL, NULL }, // Paging Block Index = 8.
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60
3
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61 // BS_AG_BLKS_RES = 2.
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62 // -------------------
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63 // Paging, Ext Paging
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64 { CCCH_2, CCCH_4 }, // Paging Block Index = 0.
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65 { CCCH_3, CCCH_5 }, // Paging Block Index = 1.
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66 { CCCH_4, CCCH_6 }, // Paging Block Index = 2.
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67 { CCCH_5, CCCH_7 }, // Paging Block Index = 3.
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68 { CCCH_6, CCCH_8 }, // Paging Block Index = 4.
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69 { CCCH_7, CCCH_2 }, // Paging Block Index = 5.
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70 { CCCH_8, CCCH_3 }, // Paging Block Index = 6.
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71 { NULL, NULL }, // Paging Block Index = 7.
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72 { NULL, NULL }, // Paging Block Index = 8.
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73
3
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74 // BS_AG_BLKS_RES = 3.
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75 // -------------------
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76 // Paging, Ext Paging,
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77 { CCCH_3, CCCH_5 }, // Paging Block Index = 0.
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78 { CCCH_4, CCCH_6 }, // Paging Block Index = 1.
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79 { CCCH_5, CCCH_7 }, // Paging Block Index = 2.
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80 { CCCH_6, CCCH_8 }, // Paging Block Index = 3.
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81 { CCCH_7, CCCH_3 }, // Paging Block Index = 4.
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82 { CCCH_8, CCCH_4 }, // Paging Block Index = 5.
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83 { NULL, NULL }, // Paging Block Index = 6.
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84 { NULL, NULL }, // Paging Block Index = 7.
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85 { NULL, NULL }, // Paging Block Index = 8.
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86
3
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87 // BS_AG_BLKS_RES = 4.
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88 // -------------------
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89 // Paging, Ext Paging
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90 { CCCH_4, CCCH_6 }, // Paging Block Index = 0.
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91 { CCCH_5, CCCH_7 }, // Paging Block Index = 1.
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92 { CCCH_6, CCCH_8 }, // Paging Block Index = 2.
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93 { CCCH_7, CCCH_4 }, // Paging Block Index = 3.
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94 { CCCH_8, CCCH_5 }, // Paging Block Index = 4.
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95 { NULL, NULL }, // Paging Block Index = 5.
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96 { NULL, NULL }, // Paging Block Index = 6.
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97 { NULL, NULL }, // Paging Block Index = 7.
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98 { NULL, NULL }, // Paging Block Index = 8.
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99
3
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100 // BS_AG_BLKS_RES = 5.
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101 // -------------------
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102 // Paging, Ext Paging
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103 { CCCH_5, CCCH_7 }, // Paging Block Index = 0.
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104 { CCCH_6, CCCH_8 }, // Paging Block Index = 1.
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105 { CCCH_7, CCCH_5 }, // Paging Block Index = 2.
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106 { CCCH_8, CCCH_6 }, // Paging Block Index = 3.
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107 { NULL, NULL }, // Paging Block Index = 4.
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108 { NULL, NULL }, // Paging Block Index = 5.
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109 { NULL, NULL }, // Paging Block Index = 6.
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110 { NULL, NULL }, // Paging Block Index = 7.
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111 { NULL, NULL }, // Paging Block Index = 8.
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112
3
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113 // BS_AG_BLKS_RES = 6.
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114 // -------------------
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115 // Paging, Ext Paging,
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116 { CCCH_6, CCCH_8 }, // Paging Block Index = 0.
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117 { CCCH_7, CCCH_6 }, // Paging Block Index = 1.
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parents: 0
diff changeset
118 { CCCH_8, CCCH_7 }, // Paging Block Index = 2.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
119 { NULL, NULL }, // Paging Block Index = 3.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
120 { NULL, NULL }, // Paging Block Index = 4.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
121 { NULL, NULL }, // Paging Block Index = 5.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
122 { NULL, NULL }, // Paging Block Index = 6.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
123 { NULL, NULL }, // Paging Block Index = 7.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
124 { NULL, NULL }, // Paging Block Index = 8.
0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
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parents:
diff changeset
125
3
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parents: 0
diff changeset
126 // BS_AG_BLKS_RES = 7.
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parents: 0
diff changeset
127 // -------------------
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parents: 0
diff changeset
128 // Paging, Ext Paging
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parents: 0
diff changeset
129 { CCCH_7, CCCH_7 }, // Paging Block Index = 0.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
130 { CCCH_8, CCCH_8 }, // Paging Block Index = 1.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
131 { NULL, NULL }, // Paging Block Index = 2.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
132 { NULL, NULL }, // Paging Block Index = 3.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
133 { NULL, NULL }, // Paging Block Index = 4.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
134 { NULL, NULL }, // Paging Block Index = 5.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
135 { NULL, NULL }, // Paging Block Index = 6.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
136 { NULL, NULL }, // Paging Block Index = 7.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
137 { NULL, NULL } // Paging Block Index = 8.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
138 };
0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
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parents:
diff changeset
139
3
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
140 const T_IDLE_TASK_INFO IDLE_INFO_COMB[(MAX_AG_BLKS_RES_COMB+1) * (MAX_PG_BLOC_INDEX_COMB+1)] =
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parents: 0
diff changeset
141 // BS_CCCH_SDCCH_COMB = TRUE, BCCH combined.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
142 {
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parents: 0
diff changeset
143 // BS_AG_BLKS_RES = 0.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
144 // -------------------
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parents: 0
diff changeset
145 // Paging, Ext Paging, offset, working_area
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
146 { CCCH_0, CCCH_2 }, // Paging Block Index = 0.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
147 { CCCH_1, CCCH_0 }, // Paging Block Index = 1.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
148 { CCCH_2, CCCH_1 }, // Paging Block Index = 2.
0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149
3
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parents: 0
diff changeset
150 // BS_AG_BLKS_RES = 1.
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parents: 0
diff changeset
151 // -------------------
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
152 // Paging, Ext Paging, offset, working_area
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
153 { CCCH_1, CCCH_1 }, // Paging Block Index = 0.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
154 { CCCH_2, CCCH_2 }, // Paging Block Index = 1.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
155 { NULL, NULL }, // Paging Block Index = 2.
0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156
3
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
157 // BS_AG_BLKS_RES = 2.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
158 // -------------------
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parents: 0
diff changeset
159 // Paging, Ext Paging, offset, working_area
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
160 { CCCH_2, CCCH_2 }, // Paging Block Index = 0.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
161 { NULL, NULL }, // Paging Block Index = 1.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
162 { NULL, NULL } // Paging Block Index = 2.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
163 };
0
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parents:
diff changeset
164
3
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
165
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parents: 0
diff changeset
166 /*-------------------------------------*/
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
167 /* Table giving the number of Paging */
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parents: 0
diff changeset
168 /* blocks in a MF51. */
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parents: 0
diff changeset
169 /* (called "N div BS_PA_MFRMS" in */
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parents: 0
diff changeset
170 /* GSM05.02, Page 21). */
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parents: 0
diff changeset
171 /*-------------------------------------*/
0
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172
3
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parents: 0
diff changeset
173 // BS_CCCH_SDCCH_COMB = False, BCCH not combined.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
174 const UWORD8 NBPCH_IN_MF51_NCOMB[(MAX_AG_BLKS_RES_NCOMB+1)] =
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parents: 0
diff changeset
175 {
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176 9, // BS_AG_BLKS_RES = 0.
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parents: 0
diff changeset
177 8, // BS_AG_BLKS_RES = 1.
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parents: 0
diff changeset
178 7, // BS_AG_BLKS_RES = 2.
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parents: 0
diff changeset
179 6, // BS_AG_BLKS_RES = 3.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
180 5, // BS_AG_BLKS_RES = 4.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
181 4, // BS_AG_BLKS_RES = 5.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
182 3, // BS_AG_BLKS_RES = 6.
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parents: 0
diff changeset
183 2 // BS_AG_BLKS_RES = 7.
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parents: 0
diff changeset
184 };
0
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parents:
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185
3
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parents: 0
diff changeset
186 // BS_CCCH_SDCCH_COMB = True, BCCH combined.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
187 const UWORD8 NBPCH_IN_MF51_COMB[(MAX_AG_BLKS_RES_COMB+1)] =
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188 {
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189 3, // BS_AG_BLKS_RES = 0.
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parents: 0
diff changeset
190 2, // BS_AG_BLKS_RES = 1.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
191 1 // BS_AG_BLKS_RES = 2.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
192 };
0
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parents:
diff changeset
193
3
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parents: 0
diff changeset
194 // Initial value for Downlink Signalling failure Counter (DSC).
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
195 const UWORD8 DSC_INIT_VALUE[MAX_BS_PA_MFRMS-1] =
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diff changeset
196 {
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parents: 0
diff changeset
197 45, // BS_PA_MFRMS = 2.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
198 30, // BS_PA_MFRMS = 3.
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parents: 0
diff changeset
199 23, // BS_PA_MFRMS = 4.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
200 18, // BS_PA_MFRMS = 5.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
201 15, // BS_PA_MFRMS = 6.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
202 13, // BS_PA_MFRMS = 7.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
203 11, // BS_PA_MFRMS = 8.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
204 10 // BS_PA_MFRMS = 9.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
205 };
0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206
3
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parents: 0
diff changeset
207 // REM: 2nd block of SDCCH is always at the same position as the first block
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
208 // but 1 mf51 later.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
209 // REM: monitoring during SDCCH used a fixe area (FB51/SB51/SBCNF51 tasks).
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
210 // Here is given the area starting position. This position is chosen
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parents: 0
diff changeset
211 // to allow the equations for SBCNF51 occurence as it is in the l1s
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
212 // scheduler (the area do not overlap the end of 102 multiframe
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
213 // structure).
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parents: 0
diff changeset
214 // Table for SDCCH description, Down Link & Up link, Not combined case.
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parents: 0
diff changeset
215 const T_SDCCH_DESC SDCCH_DESC_NCOMB[8] =
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
216 {
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
217 // "dl_D" , "dl_A" , "ul_D" , "ul_A". , "monit. area"
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
218 { 51 - 12 , 32 - 12 , 15 - 12 , 47 - 12 , 70 - 12 }, // SDCCH, D0
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
219 { 55 - 12 , 36 - 12 , 19 - 12 , 51 - 12 , 74 - 12 }, // SDCCH, D1
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
220 { 59 - 12 , 40 - 12 , 23 - 12 , 55 - 12 , 78 - 12 }, // SDCCH, D2
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
221 { 12 - 12 , 44 - 12 , 27 - 12 , 59 - 12 , 82 - 12 }, // SDCCH, D3
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
222 { 16 - 12 , 83 - 12 , 31 - 12 , 98 - 12 , 35 - 12 }, // SDCCH, D4
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
223 { 20 - 12 , 87 - 12 , 35 - 12 , 102 - 12 , 39 - 12 }, // SDCCH, D5
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
224 { 24 - 12 , 91 - 12 , 39 - 12 , 4 - 12 + 102 , 43 - 12 }, // SDCCH, D6
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
225 { 28 - 12 , 95 - 12 , 43 - 12 , 8 - 12 + 102 , 47 - 12 } // SDCCH, D7
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
226 };
0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227
3
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
228 // REM: monitoring during SDCCH used a fixe area (FB51/SB51/SBCNF51 tasks).
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
229 // Here is given the area starting position. This position is chosen
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parents: 0
diff changeset
230 // to allow the equations for SBCNF51 occurence as it is in the l1s
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
231 // scheduler (the area do not overlap the end of 102 multiframe
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
232 // structure).
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
233 // Table for SDCCH description, Down Link & Up link, Combined case.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
234 const T_SDCCH_DESC SDCCH_DESC_COMB[4] =
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
235 {
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parents: 0
diff changeset
236 // "dl_D" , "dl_A" , "ul_D" , "ul_A". , "monit. area"
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
237 { 73 - 37 , 42 - 37 , 37 - 37 , 57 - 37 , 92 - 37 }, // SDCCH, D0
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
238 { 77 - 37 , 46 - 37 , 41 - 37 , 61 - 37 , 96 - 37 }, // SDCCH, D1
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
239 { 83 - 37 , 93 - 37 , 47 - 37 , 6 - 37 + 102 , 51 - 37 }, // SDCCH, D2
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
240 { 87 - 37 , 97 - 37 , 51 - 37 , 10 - 37 + 102 , 55 - 37 } // SDCCH, D3
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
241 };
0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242
3
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
243 // Table for HOPPING SEQUENCE GENERATION ALGORITHM.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
244 const UWORD8 RNTABLE[114] =
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
245 {
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
246 48, 98, 63, 1, 36, 95, 78, 102, 94, 73,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
247 0, 64, 25, 81, 76, 59, 124, 23, 104, 100,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
248 101, 47, 118, 85, 18, 56, 96, 86, 54, 2,
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
249 80, 34, 127, 13, 6, 89, 57, 103, 12, 74,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
250 55, 111, 75, 38, 109, 71, 112, 29, 11, 88,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
251 87, 19, 3, 68, 110, 26, 33, 31, 8, 45,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
252 82, 58, 40, 107, 32, 5, 106, 92, 62, 67,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
253 77, 108, 122, 37, 60, 66, 121, 42, 51, 126,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
254 117, 114, 4, 90, 43, 52, 53, 113, 120, 72,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
255 16, 49, 7, 79, 119, 61, 22, 84, 9, 97,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
256 91, 15, 21, 24, 46, 39, 93, 105, 65, 70,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
257 125, 99, 17, 123
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
258 };
0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260
3
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
261 // Table giving the RACH slot positions when COMBINED.
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
262 // Rem: all is shifted left by 1 to map the position of the possible "contoles".
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
263 const UWORD8 COMBINED_RA_DISTRIB[51] =
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
264 {
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
265 0, 0, 0,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
266 1, 1,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
267 0, 0, 0, 0, 0, 0, 0, 0,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
268 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
269 0, 0, 0, 0, 0, 0, 0, 0,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
270 1, 1,
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
271 0, 0, 0, 0, 0
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
272 };
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
273
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
274 #if !L1_GPRS
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
275 const T_TASK_MFTAB TASK_ROM_MFTAB[NBR_DL_L1S_TASKS] =
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
276 {
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
277 { BLOC_HWTEST, BLOC_HWTEST_SIZE }, // HWTEST
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
278 { BLOC_ADC , BLOC_ADC_SIZE }, // ADC in CS_MODE0
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
279 { NULL, 0 }, // DEDIC (not meaningfull)
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
280 { BLOC_RAACC, BLOC_RAACC_SIZE }, // RAACC
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
281 { NULL, 0 }, // RAHO (not meaningfull)
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
282 { NULL, 0 }, // NSYNC (not meaningfull)
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
283 { BLOC_FBNEW, BLOC_FBNEW_SIZE }, // FBNEW
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
284 { BLOC_SBCONF, BLOC_SBCONF_SIZE }, // SBCONF
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
285 { BLOC_SB2, BLOC_SB2_SIZE }, // SB2
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
286 { BLOC_FB26, BLOC_FB26_SIZE }, // FB26
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
287 { BLOC_SB26, BLOC_SB26_SIZE }, // SB26
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
288 { BLOC_SBCNF26, BLOC_SBCNF26_SIZE }, // SBCNF26
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
289 { BLOC_FB51, BLOC_FB51_SIZE }, // FB51
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
290 { BLOC_SB51, BLOC_SB51_SIZE }, // SB51
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
291 { BLOC_SBCNF51, BLOC_SBCNF51_SIZE }, // SBCNF51
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
292 { BLOC_BCCHN, BLOC_BCCHN_SIZE }, // BCCHN
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
293 { BLOC_ALLC, S_RECT4_SIZE }, // ALLC
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
294 { BLOC_EBCCHS, S_RECT4_SIZE }, // EBCCHS
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
295 { BLOC_NBCCHS, S_RECT4_SIZE }, // NBCCHS
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
296 { BLOC_SMSCB, BLOC_SMSCB_SIZE }, // SMSCB
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
297 { BLOC_NP, S_RECT4_SIZE }, // NP
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
298 { BLOC_EP, S_RECT4_SIZE }, // EP
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
299 { BLOC_ADL, S_RECT4_SIZE }, // ADL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
300 { BLOC_AUL, S_RECT4_SIZE }, // AUL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
301 { BLOC_DDL, S_RECT4_SIZE }, // DDL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
302 { BLOC_DUL, S_RECT4_SIZE }, // DUL
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
303 { BLOC_TCHD, BLOC_TCHT_SIZE }, // TCHD
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
304 { BLOC_TCHA, BLOC_TCHA_SIZE }, // TCHA
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
305 { BLOC_TCHTF, BLOC_TCHT_SIZE }, // TCHTF
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
306 { BLOC_TCHTH, BLOC_TCHT_SIZE }, // TCHTH
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
307 { BLOC_BCCHN_TOP,BLOC_BCCHN_TOP_SIZE}, // BCCHN_TOP
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
308 { BLOC_SYNCHRO, BLOC_SYNCHRO_SIZE } // SYNCHRO
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
309 };
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
310
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
311 const UWORD8 DSP_TASK_CODE[NBR_DL_L1S_TASKS] =
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
312 {
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
313 CHECKSUM_DSP_TASK,// HWTEST
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
314 0, // DEDIC (not meaningfull)
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
315 0, // ADC (not meaningfull)
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
316 RACH_DSP_TASK, // RAACC
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
317 RACH_DSP_TASK, // RAHO
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
318 0, // NSYNC (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
319 FB_DSP_TASK, // FBNEW
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
320 SB_DSP_TASK, // SBCONF
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
321 SB_DSP_TASK, // SB2
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
322 TCH_FB_DSP_TASK, // FB26
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
323 TCH_SB_DSP_TASK, // SB26
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
324 TCH_SB_DSP_TASK, // SBCNF26
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
325 FB_DSP_TASK, // FB51
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
326 SB_DSP_TASK, // SB51
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
327 SB_DSP_TASK, // SBCNF51
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
328 NBN_DSP_TASK, // BCCHN
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
329 ALLC_DSP_TASK, // ALLC
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
330 NBS_DSP_TASK, // EBCCHS
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
331 NBS_DSP_TASK, // NBCCHS
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
332 DDL_DSP_TASK, // Temporary (BUG IN SIMULATOR) CB_DSP_TASK, // SMSCB
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
333 NP_DSP_TASK, // NP
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
334 EP_DSP_TASK, // EP
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
335 ADL_DSP_TASK, // ADL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
336 AUL_DSP_TASK, // AUL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
337 DDL_DSP_TASK, // DDL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
338 DUL_DSP_TASK, // DUL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
339 TCHD_DSP_TASK, // TCHD
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
340 TCHA_DSP_TASK, // TCHA
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
341 TCHT_DSP_TASK, // TCHTF
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
342 TCHT_DSP_TASK, // TCHTH
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
343 NBN_DSP_TASK, // BCCHN_TOP == BCCHN
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
344 0, // SYNCHRO (not meaningfull)
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
345 };
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
346 #else
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
347 const T_TASK_MFTAB TASK_ROM_MFTAB[NBR_DL_L1S_TASKS] =
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
348 {
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
349 { BLOC_HWTEST, BLOC_HWTEST_SIZE }, // HWTEST
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Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
350 { BLOC_ADC, BLOC_ADC_SIZE }, // ADC in CS_MODE0
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
351 { NULL, 0 }, // DEDIC (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
352 { BLOC_RAACC, BLOC_RAACC_SIZE }, // RAACC
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
353 { NULL, 0 }, // RAHO (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
354 { NULL, 0 }, // NSYNC (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
355 { BLOC_POLL , BLOC_POLL_SIZE }, // POLL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
356 { BLOC_PRACH, BLOC_PRACH_SIZE }, // PRACH
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
357 { BLOC_ITMEAS, BLOC_ITMEAS_SIZE }, // ITMEAS
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
358 { BLOC_FBNEW, BLOC_FBNEW_SIZE }, // FBNEW
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
359 { BLOC_SBCONF, BLOC_SBCONF_SIZE }, // SBCONF
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
360 { BLOC_SB2, BLOC_SB2_SIZE }, // SB2
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
361 { BLOC_PTCCH, BLOC_PTCCH_SIZE }, // PTCCH
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
362 { BLOC_FB26, BLOC_FB26_SIZE }, // FB26
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
363 { BLOC_SB26, BLOC_SB26_SIZE }, // SB26
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
364 { BLOC_SBCNF26, BLOC_SBCNF26_SIZE }, // SBCNF26
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
365 { BLOC_FB51, BLOC_FB51_SIZE }, // FB51
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
366 { BLOC_SB51, BLOC_SB51_SIZE }, // SB51
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
367 { BLOC_SBCNF51, BLOC_SBCNF51_SIZE }, // SBCNF51
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
368 { BLOC_PDTCH, BLOC_PDTCH_SIZE }, // PDTCH
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
369 { BLOC_BCCHN, BLOC_BCCHN_SIZE }, // BCCHN
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
370 { BLOC_ALLC, S_RECT4_SIZE }, // ALLC
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
371 { BLOC_EBCCHS, S_RECT4_SIZE }, // EBCCHS
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
372 { BLOC_NBCCHS, S_RECT4_SIZE }, // NBCCHS
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
373 { BLOC_ADL, S_RECT4_SIZE }, // ADL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
374 { BLOC_AUL, S_RECT4_SIZE }, // AUL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
375 { BLOC_DDL, S_RECT4_SIZE }, // DDL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
376 { BLOC_DUL, S_RECT4_SIZE }, // DUL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
377 { BLOC_TCHD, BLOC_TCHT_SIZE }, // TCHD
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
378 { BLOC_TCHA, BLOC_TCHA_SIZE }, // TCHA
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
379 { BLOC_TCHTF, BLOC_TCHT_SIZE }, // TCHTF
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
380 { BLOC_TCHTH, BLOC_TCHT_SIZE }, // TCHTH
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
381 { BLOC_PALLC, BLOC_PCCCH_SIZE }, // PALLC
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
382 { BLOC_SMSCB, BLOC_SMSCB_SIZE }, // SMSCB
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
383 { BLOC_PBCCHS, BLOC_PBCCHS_SIZE }, // PBCCHS
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
384 { BLOC_PNP, BLOC_PCCCH_SIZE }, // PNP
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
385 { BLOC_PEP, BLOC_PCCCH_SIZE }, // PEP
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
386 { BLOC_SINGLE, BLOC_SINGLE_SIZE }, // SINGLE
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
387 { BLOC_PBCCHN_TRAN, BLOC_PBCCHN_TRAN_SIZE }, // PBCCHN_TRAN
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
388 { BLOC_PBCCHN_IDLE, BLOC_PBCCHN_IDLE_SIZE }, // PBCCHN_IDLE
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
389 { BLOC_BCCHN_TRAN, BLOC_BCCHN_TRAN_SIZE }, // BCCHN_TRAN
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
390 { BLOC_NP, S_RECT4_SIZE }, // NP
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
391 { BLOC_EP, S_RECT4_SIZE }, // EP
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
392 { BLOC_BCCHN_TOP, BLOC_BCCHN_TOP_SIZE}, // BCCHN_TOP
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
393 { BLOC_SYNCHRO, BLOC_SYNCHRO_SIZE } // SYNCHRO
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
394 };
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
395
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
396 const UWORD8 DSP_TASK_CODE[NBR_DL_L1S_TASKS] =
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
397 {
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
398 CHECKSUM_DSP_TASK,// HWTEST
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
399 0, // ADC (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
400 0, // DEDIC (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
401 RACH_DSP_TASK, // RAACC
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
402 RACH_DSP_TASK, // RAHO
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
403 0, // NSYNC (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
404 0, // POLL (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
405 0, // PRACH (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
406 0, // ITMEAS
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
407 FB_DSP_TASK, // FBNEW
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
408 SB_DSP_TASK, // SBCONF
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
409 SB_DSP_TASK, // SB2
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
410 PTCCHU_DSP_TASK, // PTCCH
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
411 TCH_FB_DSP_TASK, // FB26
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
412 TCH_SB_DSP_TASK, // SB26
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
413 TCH_SB_DSP_TASK, // SBCNF26
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
414 FB_DSP_TASK, // FB51
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
415 SB_DSP_TASK, // SB51
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
416 SB_DSP_TASK, // SBCNF51
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
417 0, // PDTCH (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
418 NBN_DSP_TASK, // BCCHN
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
419 ALLC_DSP_TASK, // ALLC
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
420 NBS_DSP_TASK, // EBCCHS
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
421 NBS_DSP_TASK, // NBCCHS
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
422 ADL_DSP_TASK, // ADL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
423 AUL_DSP_TASK, // AUL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
424 DDL_DSP_TASK, // DDL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
425 DUL_DSP_TASK, // DUL
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
426 TCHD_DSP_TASK, // TCHD
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
427 TCHA_DSP_TASK, // TCHA
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
428 TCHT_DSP_TASK, // TCHTF
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
429 TCHT_DSP_TASK, // TCHTH
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
430 0, // PALLC (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
431 DDL_DSP_TASK, // Temporary (BUG IN SIMULATOR) CB_DSP_TASK, // SMSCB
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
432 DDL_DSP_TASK, // PBCCHS (In order to allow PBCCHS running in CS or Idle mode, we have to specify a valid DSP task in order to request a PBCCHS with the GSM scheduler)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
433 0, // PNP (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
434 0, // PEP (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
435 0, // SINGLE (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
436 0, // PBCCHN_TRAN (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
437 DDL_DSP_TASK, // PBCCHN_IDLE (only for GSM scheduler the task used is the same as SMSCB task)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
438 NBN_DSP_TASK, // BCCHN_TRAN == BCCHN
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
439 NP_DSP_TASK, // NP
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
440 EP_DSP_TASK, // EP
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
441 NBN_DSP_TASK, // BCCHN_TOP == BCCHN
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
442 0 // SYNCHRO (not meaningfull)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
443 };
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
444
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
445 #endif
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
446
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
447 const UWORD8 REPORTING_PERIOD[] =
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
448 {
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
449 255, // INVALID_CHANNEL -> invalid reporting period
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
450 104, // TCH_F
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
451 104, // TCH_H
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
452 102, // SDCCH_4
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
453 102 // SDCCH_8
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
454 };
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
455
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
456 const UWORD8 TOA_PERIOD_LEN[] =
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
457 {
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
458 0, // CS_MODE0 not used for histogram filling
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
459 12, // CS_MODE histogram length
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
460 12, // I_MODE histogram length
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
461 12, // CON_EST_MODE1 histogram length
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
462 144, // CON_EST_MODE2 histogram length
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
463 36, // DEDIC_MODE (Full rate) histogram length
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
464 42 // DEDIC_MODE (Half rate) histogram length
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
465 #if L1_GPRS
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
466 ,16 // PACKET TRANSFER MODE histogram length
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
467 #endif
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
468 };
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
469
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
470 // #if (STD == GSM)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
471 const UWORD8 MIN_TXPWR_GSM[] =
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
472 {
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
473 0, // unused.
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
474 0, // Power class = 1, unused for GSM900
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
475 2, // Power class = 2.
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
476 3, // Power class = 3.
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
477 5, // Power class = 4.
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
478 7 // Power class = 5.
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
479 };
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
480 // #elif (STD == PCS1900)
f93dab57b032 L1/include: TCS211-based version restored
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
481 const UWORD8 MIN_TXPWR_PCS[] =
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482 {
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483 0, // unused.
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484 0, // Power class = 1.
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parents: 0
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485 3, // Power class = 2.
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486 30 // Power class = 3.
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487 };
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488 // #elif (STD == DCS1800)
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489 const UWORD8 MIN_TXPWR_DCS[] =
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490 {
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491 0, // unused.
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492 0, // Power class = 1.
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493 3, // Power class = 2.
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494 29 // Power class = 3.
0
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495 };
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496
3
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497 const UWORD8 MIN_TXPWR_GSM850[] =
0
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498 {
3
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diff changeset
499 0, // unused.
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diff changeset
500 0, // Power class = 1, unused for GSM900
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501 2, // Power class = 2.
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diff changeset
502 3, // Power class = 3.
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503 5, // Power class = 4.
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diff changeset
504 7 // Power class = 5.
0
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505 };
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506
3
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507 // #elif (STD == DUAL)
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508 // const UWORD8 MIN_TXPWR_GSM[] =
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509 // {
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510 // 0, // unused.
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511 // 0, // Power class = 1, unused for GSM900
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diff changeset
512 // 2, // Power class = 2.
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513 // 3, // Power class = 3.
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diff changeset
514 // 5, // Power class = 4.
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515 // 7 // Power class = 5.
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516 // };
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517 // const UWORD8 MIN_TXPWR_DCS[] =
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diff changeset
518 // {
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519 // 0, // unused.
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parents: 0
diff changeset
520 // 0, // Power class = 1.
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parents: 0
diff changeset
521 // 3, // Power class = 2.
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522 // 29 // Power class = 3.
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523 // };
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diff changeset
524 // #endif
0
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525
3
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diff changeset
526 const UWORD8 GAUG_VS_PAGING_RATE[] =
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diff changeset
527 {
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528 4, // bs_pa_mfrms = 2, 1 gauging every 4 Paging blocs
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529 3, // bs_pa_mfrms = 3, 1 gauging every 3 Paging blocs
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parents: 0
diff changeset
530 2, // bs_pa_mfrms = 4, 1 gauging every 2 Paging blocs
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parents: 0
diff changeset
531 1, // bs_pa_mfrms = 5, 1 gauging every 1 Paging bloc
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parents: 0
diff changeset
532 1, // bs_pa_mfrms = 6, 1 gauging every 1 Paging bloc
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parents: 0
diff changeset
533 1, // bs_pa_mfrms = 7, 1 gauging every 1 Paging bloc
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534 1, // bs_pa_mfrms = 8, 1 gauging every 1 Paging bloc
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parents: 0
diff changeset
535 1 // bs_pa_mfrms = 9, 1 gauging every 1 Paging bloc
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parents: 0
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536 };
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parents: 0
diff changeset
537
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538 #else
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539 extern T_IDLE_TASK_INFO IDLE_INFO_COMB[(MAX_AG_BLKS_RES_COMB+1) * (MAX_PG_BLOC_INDEX_COMB+1)];
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540 extern T_IDLE_TASK_INFO IDLE_INFO_NCOMB[(MAX_AG_BLKS_RES_NCOMB+1) * (MAX_PG_BLOC_INDEX_NCOMB+1)];
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diff changeset
541 extern UWORD8 NBPCH_IN_MF51_NCOMB[(MAX_AG_BLKS_RES_NCOMB+1)];
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parents: 0
diff changeset
542 extern UWORD8 NBPCH_IN_MF51_COMB[(MAX_AG_BLKS_RES_COMB+1)];
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diff changeset
543 extern UWORD8 DSC_INIT_VALUE[MAX_BS_PA_MFRMS-2];
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544 extern T_SDCCH_DESC SDCCH_DESC_NCOMB[];
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diff changeset
545 extern T_SDCCH_DESC SDCCH_DESC_COMB[];
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diff changeset
546 extern UWORD8 RNTABLE[114];
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diff changeset
547 extern UWORD8 COMBINED_RA_DISTRIB[51];
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parents: 0
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548 extern T_TASK_MFTAB TASK_ROM_MFTAB[NBR_DL_L1S_TASKS];
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549 extern UWORD8 DSP_TASK_CODE[NBR_DL_L1S_TASKS];
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parents: 0
diff changeset
550 extern UWORD8 REPORTING_PERIOD[];
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diff changeset
551 extern UWORD8 TOA_PERIOD_LEN[];
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diff changeset
552 extern UWORD8 MIN_TXPWR_GSM[];
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parents: 0
diff changeset
553 extern UWORD8 MIN_TXPWR_DCS[];
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parents: 0
diff changeset
554 extern UWORD8 MIN_TXPWR_PCS[];
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diff changeset
555 extern UWORD8 MIN_TXPWR_GSM850[];
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556 extern UWORD8 GAUG_VS_PAGING_RATE[];
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diff changeset
557 #endif