FreeCalypso > hg > freecalypso-citrine
annotate g23m-gsm/alr/alr_trc.c @ 23:7155882cc49d
cfgmagic/processconf.sh: enable L1_DYN_DSP_DWNLD by default
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 10 Jun 2016 09:33:29 +0000 |
parents | 75a11d740a02 |
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1 /* |
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2 +----------------------------------------------------------------------------- |
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3 | Project : GSM-PS |
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4 | Modul : ALR_TRC |
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5 +----------------------------------------------------------------------------- |
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6 | Copyright 2002 Texas Instruments Berlin, AG |
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7 | All rights reserved. |
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8 | |
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9 | This file is confidential and a trade secret of Texas |
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10 | Instruments Berlin, AG |
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11 | The receipt of or possession of this file does not convey |
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12 | any rights to reproduce or disclose its contents or to |
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13 | manufacture, use, or sell anything it may describe, in |
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14 | whole, or in part, without the specific written consent of |
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15 | Texas Instruments Berlin, AG. |
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16 +----------------------------------------------------------------------------- |
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17 | Purpose : This Modul defines functions for the offline trace |
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18 +----------------------------------------------------------------------------- |
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19 */ |
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20 |
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21 #ifndef ALR_TRC_C |
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22 #define ALR_TRC_C |
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23 |
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24 #include "config.h" |
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25 #include "fixedconf.h" |
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26 #include "condat-features.h" |
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27 |
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28 #define ENTITY_PL |
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29 |
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30 /*==== INCLUDES ===================================================*/ |
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31 #include <string.h> |
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32 #include <stdlib.h> |
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33 #include <ctype.h> |
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34 #include "typedefs.h" |
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35 #include "pconst.cdg" |
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36 #include "mconst.cdg" |
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37 #include "message.h" |
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38 #include "ccdapi.h" |
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39 #include "vsi.h" |
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40 #include "custom.h" |
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41 #include "gsm.h" |
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42 #include "prim.h" |
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43 #include "cnf_alr.h" |
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44 #include "mon_alr.h" |
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45 #include "pei.h" |
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46 #include "tok.h" |
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47 #include "pcm.h" |
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48 |
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49 #ifdef GPRS |
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50 #include "alr_gprs.h" |
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51 #endif |
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52 |
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53 #include "alr.h" |
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54 |
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55 #if defined (ALR_TRACE_ENABLED) |
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56 /* |
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57 * The ALR Trace is a cyclic buffer for |
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58 * debugging ALR problems. |
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59 * |
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60 * The buffer will be initialized at startup and will |
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61 * be filled by the function alr_trc_dl_trace() until it is full. |
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62 * The size of the buffer is ALR_TRC_SIZE. |
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63 * |
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64 * The content is |
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65 * |
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66 * actual_channel |
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67 * State |
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68 * sysclock |
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69 * L2 data |
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70 * |
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71 * During IDLE mode (triggered by RX_PERIODIC_IND in ALR/TIL_main.c) |
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72 * an output is written to the _PL.dbg (ALR_TRC_MAX_READED traces each trigger) |
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73 */ |
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74 |
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75 /* prototypes */ |
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76 void alr_trc_clear (void); |
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77 #define ALR_TRC_SIZE 90 |
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78 #define ALR_TRC_MAX_READED 8 |
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79 |
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80 #if (((ALR_TRC_SIZE-1) & (~ALR_TRC_SIZE)) == (ALR_TRC_SIZE-1)) |
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81 #define POWER_OF_2 |
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82 #pragma message("ALR_TRC_SIZE is power of 2") |
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83 #else |
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84 #pragma message("ALR_TRC_SIZE is NOT power of 2") |
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85 #endif |
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86 |
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87 typedef struct |
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88 { |
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89 UCHAR event; |
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90 UCHAR state; |
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91 UCHAR actual_channel; |
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92 USHORT sysclock; |
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93 UCHAR data [ALR_TRC_DATA_SIZE]; |
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94 } T_IDLE_TRACE_DATA; |
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95 |
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96 T_IDLE_TRACE_DATA alr_csIDLE_Trace_buffer [ALR_TRC_SIZE]; |
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97 USHORT alr_csIDLE_Trace_index = 0; |
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98 USHORT alr_csIDLE_Trace_read_index = 0; |
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99 |
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100 static T_HANDLE sem_ALR_TRC; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
101 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
102 #define ENTER_CRITICAL_SECTION(sem) if (alr_trc_enter_critical_section(sem))return; |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
103 #define LEAVE_CRITICAL_SECTION(sem) if (alr_trc_leave_critical_section(sem))return; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
104 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
105 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
106 /* |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
107 +-----------------------------------------------------------------------------+ |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
108 | PROJECT : GSM-PS (6147) MODULE : ALT_TRC | |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
109 | STATE : code ROUTINE : alr_trc_semaphore_err | |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
110 +-----------------------------------------------------------------------------+ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
111 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
112 PURPOSE : Handles semaphore error situation |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
113 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
114 */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
115 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
116 static void alr_trc_semaphore_err (void) |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
117 { |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
118 static UCHAR out = 0; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
119 if (!out) |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
120 { |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
121 out = 1; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
122 vsi_o_ttrace(VSI_CALLER TC_EVENT, "semaphore error"); |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
123 } |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
124 }//endfunc alr_trc_dl_trace_cs_err |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
125 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
126 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
127 /* |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
128 +-----------------------------------------------------------------------------+ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
129 | PROJECT : GSM-PS (6147) MODULE : ALT_TRC | |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
130 | STATE : code ROUTINE : alr_trc_enter_critical_section | |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
131 +-----------------------------------------------------------------------------+ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
132 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
133 PURPOSE : Enters critical section |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
134 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
135 */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
136 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
137 static int alr_trc_enter_critical_section (T_HANDLE sem) |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
138 { |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
139 if (vsi_s_get (VSI_CALLER sem) NEQ VSI_OK) |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
140 { |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
141 alr_trc_semaphore_err(); |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
142 return -1; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
143 } |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
144 else |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
145 { |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
146 return 0; |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
147 } |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
148 }//endfunc alr_trc_enter_critical_section |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
149 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
150 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
151 /* |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
152 +-----------------------------------------------------------------------------+ |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
153 | PROJECT : GSM-PS (6147) MODULE : ALT_TRC | |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
154 | STATE : code ROUTINE : alr_trc_leave_critical_section | |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
155 +-----------------------------------------------------------------------------+ |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
156 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
157 PURPOSE : Leaves critical section |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
158 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
159 */ |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
160 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
161 static int alr_trc_leave_critical_section (T_HANDLE sem) |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
162 { |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
163 if (vsi_s_release (VSI_CALLER sem) NEQ VSI_OK) |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
164 { |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
165 alr_trc_semaphore_err(); |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
166 return -1; |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
167 } |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
168 else |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
169 { |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
170 return 0; |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
171 } |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
172 }//endfunc alr_trc_leave_critical_section |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
173 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
174 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
175 /* |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
176 +--------------------------------------------------------------------+ |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
177 | PROJECT : GSM-PS (6147) MODULE : ALT_TRC | |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
178 | STATE : code ROUTINE : alr_trc_init | |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
179 +--------------------------------------------------------------------+ |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
180 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
181 PURPOSE : Init tracing |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
182 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
183 */ |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
184 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
185 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
186 void alr_trc_init (void) |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
187 { |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
188 sem_ALR_TRC = vsi_s_open (VSI_CALLER "ALR_IDLE_TRACE",1); |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
189 if (sem_ALR_TRC NEQ VSI_ERROR) |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
190 alr_trc_clear (); |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
191 else |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
192 vsi_o_ttrace(VSI_CALLER TC_EVENT, "can't open semaphore \"ALR_IDLE_TRACE\""); |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
193 } |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
194 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
195 /* |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
196 +--------------------------------------------------------------------+ |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
197 | PROJECT : GSM-PS (6147) MODULE : ALT_TRC | |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
198 | STATE : code ROUTINE : alr_trc_exit | |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
199 +--------------------------------------------------------------------+ |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
200 |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
201 PURPOSE : Close tracing |
75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
202 |
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203 */ |
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204 |
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205 void alr_trc_exit (void) |
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206 { |
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207 if (sem_ALR_TRC NEQ VSI_ERROR) |
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208 vsi_s_close (VSI_CALLER sem_ALR_TRC); |
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209 } |
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210 |
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211 /* |
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212 +--------------------------------------------------------------------+ |
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213 | PROJECT : GSM-PS (6147) MODULE : ALT_TRC | |
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214 | STATE : code ROUTINE : alr_trc_clear | |
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215 +--------------------------------------------------------------------+ |
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216 |
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217 PURPOSE : Clears trace index |
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218 |
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219 */ |
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220 |
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221 |
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222 void alr_trc_clear (void) |
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223 { |
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224 ENTER_CRITICAL_SECTION (sem_ALR_TRC); |
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225 alr_csIDLE_Trace_index = alr_csIDLE_Trace_read_index = 0; |
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226 LEAVE_CRITICAL_SECTION (sem_ALR_TRC); |
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227 |
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228 vsi_o_ttrace(VSI_CALLER TC_EVENT, "IDLE_Trace_index reseted"); |
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229 } |
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230 |
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231 #if 0 |
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232 static void alr_trc_sleep_mode (void) |
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233 { |
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234 static UCHAR sleep_mode_disabled = FALSE; |
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235 |
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236 if (!sleep_mode_disabled) |
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237 { |
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238 #define NO_SLEEP 0 |
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239 #define ARMIO_CLK 0x0001 |
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240 #define UWIRE_CLK 0x0020 |
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241 #define SIM_CLK 0x0040 |
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242 #define UART_CLK 0x0400 |
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243 |
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244 #if defined (_TARGET_) |
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245 #if !defined( GPRS ) |
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246 power_down_config(NO_SLEEP, ARMIO_CLK | UWIRE_CLK | SIM_CLK | UART_CLK); |
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247 #endif |
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248 #endif /* _TARGET_ */ |
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249 sleep_mode_disabled = TRUE; |
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250 } |
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251 }//endfunc alr_trc_sleep_mode |
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252 #endif /* 0|1 */ |
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253 /* |
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254 +--------------------------------------------------------------------+ |
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255 | PROJECT : GSM-PS (6147) MODULE : ALT_TRC | |
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256 | STATE : code ROUTINE : alr_trc_store | |
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257 +--------------------------------------------------------------------+ |
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258 |
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259 PURPOSE : Fill in a trace. |
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260 |
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261 */ |
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262 |
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263 void alr_trc_store (UCHAR event, UCHAR actual_channel, UCHAR state, void* data) |
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264 { |
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265 T_IDLE_TRACE_DATA* trace_data; |
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266 USHORT write_index; |
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267 USHORT length; |
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268 T_TIME sysClock; |
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269 |
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270 |
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271 #if 0 |
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272 { |
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273 USHORT semCount; |
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274 |
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275 if (vsi_s_status (VSI_CALLER sem_ALR_TRC, &semCount) NEQ VSI_OK) |
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276 { |
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277 alr_trc_semaphore_err(); |
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278 return; |
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279 } |
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280 if (semCount EQ 0) |
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281 { |
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282 vsi_o_ttrace(VSI_CALLER TC_EVENT, "semCount == 0"); |
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283 return; |
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284 } |
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285 } |
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286 #endif /* 0|1 */ |
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287 |
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288 ENTER_CRITICAL_SECTION (sem_ALR_TRC); |
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289 |
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290 #if defined(POWER_OF_2) |
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291 write_index = (alr_csIDLE_Trace_index + 1) & (ALR_TRC_SIZE - 1); /* if ALR_TRC_SIZE power of 2 */ |
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292 #else |
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293 write_index = (alr_csIDLE_Trace_index + 1) % ALR_TRC_SIZE; /* if ALR_TRC_SIZE not power of 2 */ |
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294 #endif /* POWER_OF_2 */ |
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295 if (write_index NEQ alr_csIDLE_Trace_read_index) |
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296 {/* buffer is not full */ |
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297 trace_data = &alr_csIDLE_Trace_buffer[alr_csIDLE_Trace_index]; |
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298 |
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299 trace_data->event = event; |
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300 if (actual_channel >= ALR_TRC_CH_UNKNOWN) |
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301 trace_data->actual_channel = ALR_TRC_CH_UNKNOWN; |
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302 else |
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|
303 trace_data->actual_channel = actual_channel; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
304 trace_data->state = state; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
305 vsi_t_time (VSI_CALLER &sysClock); |
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parents:
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|
306 trace_data->sysclock = (USHORT)sysClock; |
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parents:
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|
307 |
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parents:
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|
308 if (event EQ ALR_TRC_DOWNLINK OR event EQ ALR_TRC_UPLINK) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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309 length = 23; |
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parents:
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310 else |
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parents:
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311 length = ALR_TRC_DATA_SIZE; |
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parents:
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312 |
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parents:
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|
313 if (event EQ ALR_TRC_STRING) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
314 strncpy ((char*)trace_data->data, (char*)data, length); |
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parents:
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|
315 else |
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parents:
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|
316 memcpy (trace_data->data, (UCHAR*)data, length); |
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parents:
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317 |
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parents:
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|
318 alr_csIDLE_Trace_index = write_index; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
319 }/* endif buffer is not full */ |
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parents:
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|
320 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
321 LEAVE_CRITICAL_SECTION (sem_ALR_TRC); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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322 }/* endfunc alr_trc_store */ |
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parents:
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|
323 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
324 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
325 +--------------------------------------------------------------------+ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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326 | PROJECT : GSM-PS (6147) MODULE : ALT_TRC | |
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parents:
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327 | STATE : code ROUTINE : alr_trc_read | |
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parents:
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|
328 +--------------------------------------------------------------------+ |
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parents:
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|
329 |
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parents:
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330 PURPOSE : Read and output stored trace. |
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parents:
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|
331 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
332 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
333 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
334 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
335 void alr_trc_read_all (void) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
336 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
337 USHORT write_index, read_index; |
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parents:
diff
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|
338 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
339 ENTER_CRITICAL_SECTION (sem_ALR_TRC); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
340 write_index = alr_csIDLE_Trace_index; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
341 read_index = alr_csIDLE_Trace_read_index; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
342 LEAVE_CRITICAL_SECTION (sem_ALR_TRC); |
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parents:
diff
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|
343 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
344 while (read_index NEQ write_index) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
345 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
346 alr_trc_read (20); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
347 vsi_t_sleep(VSI_CALLER 0); |
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parents:
diff
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|
348 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
349 ENTER_CRITICAL_SECTION (sem_ALR_TRC); |
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parents:
diff
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|
350 write_index = alr_csIDLE_Trace_index; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
351 read_index = alr_csIDLE_Trace_read_index; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
352 LEAVE_CRITICAL_SECTION (sem_ALR_TRC); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
353 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
354 }/* endfunc alr_trc_dl_trace_read_all */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
355 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
356 static const char * ALR_TRC_CHANNEL[7] = { " ", "Ff", "Fh", "S4", "S8", "SA", "??" }; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
357 static const char * ALR_TRC_EVENTS[4] = { "UL", "DL", "Ev", "ev" }; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
358 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
359 void alr_trc_read (int count) |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
360 { |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
361 T_IDLE_TRACE_DATA trace_data; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
362 USHORT write_index, read_index; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
363 static char buffer[ALR_TRC_DATA_SIZE*2+50]; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
364 UCHAR j, o, readed = 0; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
365 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
366 ENTER_CRITICAL_SECTION (sem_ALR_TRC); |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
367 write_index = alr_csIDLE_Trace_index; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
368 read_index = alr_csIDLE_Trace_read_index; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
369 LEAVE_CRITICAL_SECTION (sem_ALR_TRC); |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
370 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
371 #if 0 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
372 if (read_index EQ write_index) |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
373 { |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
374 alr_trc_sleep_mode (); |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
375 return; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
376 } |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
377 #endif /* 0|1 */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
378 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
379 while (read_index NEQ write_index) |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
380 { |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
381 ENTER_CRITICAL_SECTION (sem_ALR_TRC); |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
382 trace_data = alr_csIDLE_Trace_buffer[read_index]; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
383 alr_csIDLE_Trace_buffer[read_index].sysclock = 0xffff; /* readed */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
384 alr_csIDLE_Trace_read_index++; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
385 #if defined(POWER_OF_2) |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
386 alr_csIDLE_Trace_read_index&= (ALR_TRC_SIZE-1); /* if power of 2 */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
387 #else |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
388 alr_csIDLE_Trace_read_index%= ALR_TRC_SIZE; /* if not power of 2 */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
389 #endif /* POWER_OF_2 */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
390 read_index = alr_csIDLE_Trace_read_index; |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
391 LEAVE_CRITICAL_SECTION (sem_ALR_TRC); |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
392 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
393 sprintf (buffer, "[%03d]:%05d %d %s %s ", |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
394 #if defined(POWER_OF_2) |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
395 (write_index - read_index) & (ALR_TRC_SIZE-1), /* if ALR_TRC_SIZE power of 2 */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
396 #else |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
397 (ALR_TRC_SIZE + write_index - read_index) % ALR_TRC_SIZE, /* if ALR_TRC_SIZE not power of 2 */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
398 #endif /* POWER_OF_2 */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
399 trace_data.sysclock, |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
400 trace_data.state, |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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401 ALR_TRC_EVENTS[trace_data.event], |
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402 ALR_TRC_CHANNEL[trace_data.actual_channel]); |
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403 o = strlen (buffer); |
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parents:
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404 |
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405 switch (trace_data.event) |
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406 { |
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407 case ALR_TRC_STRING: |
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408 strncpy (buffer+o, (char*)&trace_data.data[0], ALR_TRC_DATA_SIZE); |
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409 buffer[o+ALR_TRC_DATA_SIZE] = 0; |
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410 break; |
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411 case ALR_TRC_DOWNLINK: |
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parents:
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412 case ALR_TRC_UPLINK: |
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413 for (j=0;j<23;j++, o+=2) |
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414 { |
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415 sprintf (buffer+o, "%02x", trace_data.data[j]); |
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parents:
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416 } |
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parents:
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417 break; |
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418 default: |
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419 for (j=0;j<ALR_TRC_DATA_SIZE;j++, o+=2) |
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parents:
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420 { |
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421 sprintf (buffer+o, "%02x", trace_data.data[j]); |
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parents:
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422 } |
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parents:
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423 break; |
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parents:
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|
424 } |
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parents:
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|
425 |
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parents:
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426 if (buffer[0]) |
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parents:
diff
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|
427 { |
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parents:
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428 vsi_o_ttrace(VSI_CALLER TC_EVENT, buffer); |
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parents:
diff
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|
429 } |
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parents:
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|
430 else |
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parents:
diff
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|
431 { |
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parents:
diff
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432 vsi_o_ttrace(VSI_CALLER TC_EVENT, "alr_trc_read() failed"); |
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parents:
diff
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|
433 } |
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parents:
diff
changeset
|
434 |
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parents:
diff
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|
435 ENTER_CRITICAL_SECTION (sem_ALR_TRC); |
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parents:
diff
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|
436 write_index = (UCHAR)alr_csIDLE_Trace_index; |
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parents:
diff
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437 LEAVE_CRITICAL_SECTION (sem_ALR_TRC); |
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parents:
diff
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|
438 |
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parents:
diff
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|
439 if (++readed >= count) |
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parents:
diff
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|
440 break; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
441 }/* endwhile */ |
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parents:
diff
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|
442 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
443 }//endfunc alr_trc_read */ |
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parents:
diff
changeset
|
444 |
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parents:
diff
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|
445 #else /* ALR_TRACE_ENABLED */ |
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parents:
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446 #endif /* ALR_TRACE_ENABLED */ |
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parents:
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|
447 #endif /* ALR_TRC_C */ |