FreeCalypso > hg > freecalypso-citrine

annotate bsp/abb+spi/abb.h @ 30:7fcb2ecddd82

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cdg/cdginc-hybrid: import from Magnetite
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 15 Oct 2016 00:51:04 +0000
parents 75a11d740a02
children
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1 /******************************************************************************/
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2 /* TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION */
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3 /* */
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4 /* Property of Texas Instruments -- For Unrestricted Internal Use Only */
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5 /* Unauthorized reproduction and/or distribution is strictly prohibited. This*/
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6 /* product is protected under copyright law and trade secret law as an*/
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7 /* unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All*/
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8 /* rights reserved. */
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9 /* */
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10 /* */
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11 /* Filename : abb.h */
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12 /* */
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13 /* Description : Analog BaseBand registers and bits definition. */
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14 /* Functions to drive the ABB device. */
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15 /* The Serial Port Interface is used to connect the TI */
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16 /* Analog BaseBand (ABB). */
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17 /* It is assumed that the ABB is connected as the SPI */
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18 /* device 0. */
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19 /* */
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20 /* Author : Pascal PUEL */
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21 /* */
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22 /* Version number : 1.3 */
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23 /* */
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24 /* Date and time : 08/22/03 */
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25 /* */
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26 /* Previous delta : Creation */
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27 /* */
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28 /******************************************************************************/
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29
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30 #ifndef __ABB_H__
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31 #define __ABB_H__
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32
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33 #include "../../include/config.h"
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34 #include "../../include/sys_types.h"
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35
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36 #ifndef _WINDOWS
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37
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38 /*------------------------------------*/
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39 /* SYREN PG Definition */
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40 /*------------------------------------*/
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41
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42 #if (ANALOG == 3) // SYREN
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43 #define S_PG_10 1
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44 #define S_PG_20 2
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45 #endif // (ANALOG == 3)
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46
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47
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48
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49 // DEFINITIONS FOR OMEGA/NAUSICA
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50 #if (ANALOG == 1)
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51 // ABB PAGE
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52 #define PAGE0 0x0001
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53 #define PAGE1 0x0002
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54
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55 // ABB REGISTERS
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56 //=== PAGE 0 =======
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57 #define PAGEREG (1 << 1)
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58 #define APCDEL1 (2 << 1)
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59 #define BULDATA1_2 (3 << 1)
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60 #define TOGBR1 (4 << 1)
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61 #define TOGBR2 (5 << 1)
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62 #define VBDCTRL (6 << 1)
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63 #define AUXAFC1 (7 << 1)
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64 #define AUXAFC2 (8 << 1)
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65 #define AUXAPC (9 << 1)
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66 #define APCRAM (10 << 1)
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67 #define APCOFF (11 << 1)
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68 #define AUXDAC (12 << 1)
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69 #define MADCCTRL1 (13 << 1)
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70 #define MADCCTRL2 (14 << 1)
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71 #define VBATREG (15 << 1)
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72 #define VCHGREG (16 << 1)
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73 #define ICHGREG (17 << 1)
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74 #define VBKPREG (18 << 1)
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75 #define ADIN1REG (19 << 1)
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76 #define ADIN2REG (20 << 1)
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77 #define ADIN3REG (21 << 1)
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78 #define ADIN4XREG (22 << 1)
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79 #define ADIN5YREG (23 << 1)
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80 #define MADCSTAT (24 << 1)
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81 #define CHGREG (25 << 1)
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82 #define ITMASK (26 << 1)
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83 #define ITSTATREG (27 << 1)
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84 #define BCICTL1 (28 << 1)
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85 #define BCICTL2 (29 << 1)
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86 #define VRPCCTL2 (30 << 1)
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87 #define VRPCSTS (31 << 1)
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88
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89 //=== PAGE 1 =======
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90 #define PAGEREG (1 << 1)
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91 #define BULIOFF (2 << 1)
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92 #define BULQOFF (3 << 1)
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93 #define BULQDAC (4 << 1)
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94 #define BULIDAC (5 << 1)
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95 #define BBCTRL (6 << 1)
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96 #define VBUCTRL (7 << 1)
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97 #define VBCTRL (8 << 1)
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98 #define PWDNRG (9 << 1)
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99 #define TSC_TIMER (10 << 1)
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100 #define VRPCCTRL3 (11 << 1)
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101 #define APCOUT (12 << 1)
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102 #define VRPCBGT (18 << 1)
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103 #define TAPCTRL (19 << 1)
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104 #define TAPREG (20 << 1)
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105 #define AFCCTLADD (21 << 1)
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106 #define AFCOUT (22 << 1)
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107 #define VRPCCTRL1 (23 << 1)
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108 #define VRPCCTRL4 (24 << 1)
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109 #define APCDEL2 (26 << 1)
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110 #define ITSTATREG (27 << 1)
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111
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112 // Registers bit definitions
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113 // ABB device bits definition of register VBCTRL
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114 #define VDLAUX 0x001
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115 #define VDLEAR 0x002
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116 #define VBUZ 0x004
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117 #define VULSWITCH 0x008
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118 #define MICBIAS 0x010
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119 #define VALOOP 0x020
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120 #define VCLKMODE 0x040
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121 #define VSYNC 0x080
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122 #define VBDFAUXG 0x100
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123 #define VFBYP 0x200
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124
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125 // ABB device bits definition of register VBUCTRL
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126 #define DXEN 0x200
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127
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128 // ABB device bits definition of register VRPCSTS
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129 #define ONBSTS 0x01 // ON Button push flag
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130 #define ONRSTS 0x02 // Remote ON flag
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131 #define ITWSTS 0x04 // Wake-up IT flag
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132 #define CHGSTS 0x08 // Charger plug flag
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133 #define ONREFLT 0x10 // ON Button current state
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134 #define ORMRFLT 0x20 // Remote ON current state
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135 #define CHGPRES 0x40 // Charger plug current state
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136
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137 // ABB device bits definition of register ITSTATREG
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138 #define REMOT_IT_STS 0x02
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139 #define PUSHOFF_IT_STS 0x04
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140 #define CHARGER_IT_STS 0x08
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141 #define ADCEND_IT_STS 0x20
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142
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diff changeset
143 // On Nausica, if the PWR key is pressed, the bit is set, and cleared when released
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144 #define PWR_OFF_KEY_PRESSED (ONREFLT)
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145
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146 // ABB ADC Interrupts
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147 #define EOC_INTENA 0x03DF
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148 #define EOC_INTMASK 0x0020
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149
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150 // ABB ADC CHANNELS
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151 #define VBATCV 0x0001
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152 #define VCHGCV 0x0002
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153 #define ICHGCV 0x0004
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154 #define VBKPCV 0x0008
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155 #define ADIN1CV 0x0010
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156 #define ADIN2CV 0x0020
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157 #define ADIN3CV 0x0040
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Mychaela Falconia <falcon@freecalypso.org>
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158 #define vADIN4XCV 0x0080
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159 #define ADIN5XCV 0x0100
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160 #define ALL 0x01FF
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161 #define NONE 0x0000
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162
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diff changeset
163 // ABB MODULES
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164 #define MADC 0x8000
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165 #define AFC 0x2000
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166 #define ADAC 0x0800
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167 #define DCDC 0x0080
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diff changeset
168 #define ALLOFF 0x0000
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diff changeset
169
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diff changeset
170 // Definitions of OMEGA test modes for baseband windows
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diff changeset
171 #define TSPTEST1 0x001d
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172 #define TSPTEST2 0x001e
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diff changeset
173 #define AFCTEST 0x0010
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diff changeset
174 #define AFCNORM 0x0000
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diff changeset
175
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diff changeset
176
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diff changeset
177 // DEFINITIONS FOR IOTA
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
178 #elif (ANALOG == 2)
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diff changeset
179 // ABB PAGE
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180 #define PAGE0 0x0001
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diff changeset
181 #define PAGE1 0x0002
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diff changeset
182 #define PAGE2 0x0010
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diff changeset
183
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diff changeset
184 // ABB REGISTERS
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diff changeset
185 //=== PAGE 0 =======
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
186 #define PAGEREG (1 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
187 #define APCDEL1 (2 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
188 #define BULDATA1_2 (3 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
189 #define TOGBR1 (4 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
190 #define TOGBR2 (5 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
191 #define VBDCTRL (6 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 #define AUXAFC1 (7 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 #define AUXAFC2 (8 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 #define AUXAPC (9 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
195 #define APCRAM (10 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
196 #define APCOFF (11 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 #define AUXDAC (12 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
198 #define MADCCTRL (13 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 #define VBATREG (15 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 #define VCHGREG (16 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 #define ICHGREG (17 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 #define VBKPREG (18 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 #define ADIN1REG (19 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 #define ADIN2REG (20 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 #define ADIN3REG (21 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 #define ADIN4REG (22 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 #define MADCSTAT (24 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 #define CHGREG (25 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 #define ITMASK (26 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 #define ITSTATREG (27 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 #define BCICTL1 (28 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 #define BCICTL2 (29 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 #define VRPCDEV (30 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 #define VRPCSTS (31 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 //=== PAGE 1 =======
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 #define PAGEREG (1 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 #define BULIOFF (2 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 #define BULQOFF (3 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 #define BULQDAC (4 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 #define BULIDAC (5 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 #define BBCTRL (6 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 #define VBUCTRL (7 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 #define VBCTRL1 (8 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 #define PWDNRG (9 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 #define VBPOP (10 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 #define VBCTRL2 (11 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 #define APCOUT (12 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 #define BCICONF (13 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 #define BULGCAL (14 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 #define TAPCTRL (19 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 #define TAPREG (20 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233 #define AFCCTLADD (21 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 #define AFCOUT (22 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 #define VRPCSIM (23 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 #define AUXLED (24 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 #define APCDEL2 (26 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 #define ITSTATREG (27 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 #define VRPCMSKABB (29 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 #define VRPCCFG (30 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 #define VRPCMSK (31 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243 // Registers bit definitions
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 // ABB device bits definition of register VBCTRL1
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 #define VDLAUX 0x001
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 #define VDLEAR 0x002
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 #define VBUZ 0x004
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248 #define VULSWITCH 0x008
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249 #define MICBIAS 0x010
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250 #define VALOOP 0x020
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 #define VCLKMODE 0x040
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 #define VSYNC 0x080
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253 #define VBDFAUXG 0x100
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 #define VFBYP 0x200
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256 // ABB device bits definition of register VBCTRL2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257 #define MICBIASEL 0x001
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258 #define VDLHSO 0x002
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259 #define MICNAUX 0x004
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
261 // ABB device bits definition of register VBUCTRL
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
262 #define DXEN 0x200
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 // ABB device bits definition of register VBPOP
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
265 #define HSODIS 0x001
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
266 #define HSOCHG 0x002
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 #define HSOAUTO 0x004
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
268 #define EARDIS 0x008
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
269 #define EARCHG 0x010
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
270 #define EARAUTO 0x020
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 #define AUXDIS 0x040
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272 #define AUXCHG 0x080
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
273 #define AUXAUTO 0x100
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
274
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
275 // ABB device bits definition of register VRPCSTS
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
276 #define ONBSTS 0x01 // ON Button push flag
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
277 #define ONRSTS 0x02 // Remote ON flag
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
278 #define ITWSTS 0x04 // Wake-up IT flag
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
279 #define CHGSTS 0x08 // Charger plug flag
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280 #define ONREFLT 0x10 // ON Button current state
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
281 #define ORMRFLT 0x20 // Remote ON current state
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282 #define CHGPRES 0x40 // Charger plug current state
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
284 // ABB device bits definition of register ITSTATREG
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
285 #define REMOT_IT_STS 0x02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
286 #define PUSHOFF_IT_STS 0x04
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
287 #define CHARGER_IT_STS 0x08
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
288 #define ADCEND_IT_STS 0x20
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
289
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
290 // On Iota, the bit is set when the key is released and set when the key is pressed
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
291 #define PWR_OFF_KEY_PRESSED (0)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
292
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
293 // ABB ADC Interrupts
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
294 #define EOC_INTENA 0x03DF
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
295 #define EOC_INTMASK 0x0020
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
296
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
297 // ABB ADC CHANNELS
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
298 #define VBATCV 0x0001
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
299 #define VCHGCV 0x0002
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
300 #define ICHGCV 0x0004
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
301 #define VBKPCV 0x0008
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
302 #define ADIN1CV 0x0010
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
303 #define ADIN2CV 0x0020
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
304 #define ADIN3CV 0x0040
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
305 #define ADIN4CV 0x0080
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
306 #define ALL 0x00FF
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
307 #define NONE 0x0000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
308
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
309 // ABB MODULES
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
310 #define MADC 0x8000
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
311 #define AFC 0x2000
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
312 #define ADAC 0x0800
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
313 #define DCDC 0x0080
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
314 #define ALLOFF 0x0000
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
315
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
316 // Definitions of IOTA test modes
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
317 #define TSPTEST1 0x001d
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
318 #define TSPTEST2 0x001e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
319 #define AFCTEST 0x0010
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
320 #define AFCNORM 0x0000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
321
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
322 // Definition for IOTA test modes
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
323 #define TSPEN 0x001a
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
324 #define MADCTEST 0x0012
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
325 #define TSPADC 0x0015
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
326 #define TSPUP 0x0017
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
327 #define TSPDN 0x0018
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
328
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
329 // Definition for IOTA Power Management
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
330
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
331 //The duration of the SLPDLY counter must be greater than the process execution time:
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
332 //DBB deep sleep routine included the IT check = DBB sleep routine and IT check
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
333 //+ the seven 32Khz clock cycle interval needed to ABB in order to make effective the sleep abort write access in VRPCDEV ++ // register -> 7*T32Khz = = ABB IBIC propagation delay
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
334 //+ 150us of short asynchronous wake-up time (approximately 4*T32Khz) = ULPD short sleep where Syren/IOTA aborts sleep and
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
335 // write DEVSLEEP = 0
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
336
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
337
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
338
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
339
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
340 #define SLPDLY 0x001F // delay to set IOTA in sleep mode (unit: 20*T32Khz)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
341 #define MASK_SLEEP_MODE 0x0000 // set the regulators in low consumption in sleep mode
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
342
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
343
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
344 // DEFINITIONS FOR SYREN
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
345 #elif (ANALOG == 3)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
346
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
347 // ABB PAGE
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
348 #define PAGE0 0x0001
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
349 #define PAGE1 0x0002
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
350 #define PAGE2 0x0010
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
351
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
352 // ABB REGISTERS
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
353 //=== PAGE 0 =======
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
354 #define PAGEREG (1 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
355 #define APCDEL1 (2 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
356 #define BULDATA1_2 (3 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
357 #define TOGBR1 (4 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
358 #define TOGBR2 (5 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
359 #define VBDCTRL (6 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
360 #define AUXAFC1 (7 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
361 #define AUXAFC2 (8 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
362 #define AUXAPC (9 << 1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
363 #define APCRAM (10 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
364 #define APCOFF (11 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
365 #define AUXDAC (12 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
366 #define MADCCTRL (13 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
367 #define CHGIREG (14 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
368 #define VBATREG (15 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
369 #define VCHGREG (16 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
370 #define ICHGREG (17 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
371 #define VBKPREG (18 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
372 #define ADIN1REG (19 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
373 #define ADIN2REG (20 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
374 #define ADIN3REG (21 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
375 #define ADIN4REG (22 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
376 #define ADIN5REG (23 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
377 #define MADCSTAT (24 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
378 #define CHGVREG (25 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
379 #define ITMASK (26 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
380 #define ITSTATREG (27 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
381 #define BCICTL1 (28 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
382 #define BCICTL2 (29 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
383 #define VRPCDEV (30 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
384 #define VRPCSTS (31 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
385
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
386 //=== PAGE 1 =======
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
387 #define PAGEREG (1 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
388 #define BULIOFF (2 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
389 #define BULQOFF (3 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
390 #define BULQDAC (4 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
391 #define BULIDAC (5 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
392 #define BBCTRL (6 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
393 #define VBUCTRL (7 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
394 #define VBCTRL1 (8 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
395 #define PWDNRG (9 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
396 #define VBPOP (10 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
397 #define VBCTRL2 (11 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
398 #define APCOUT (12 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
399 #define BCICONF (13 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
400 #define BULGCAL (14 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
401 #define VAUDCTRL (15 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
402 #define VAUSCTRL (16 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
403 #define VAUOCTRL (17 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
404 #define VAUDPLL (18 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
405 #define TAPCTRL (19 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
406 #define TAPREG (20 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
407 #define AFCCTLADD (21 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
408 #define AFCOUT (22 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
409 #define VRPCSIMR (23 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
410 #define BCIWDOG (24 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
411 #define NONE8 (25 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
412 #define APCDEL2 (26 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
413 #define ITSTATREG (27 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
414
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
415 #if (ANLG_PG == S_PG_20) // SYREN PG2.0 ON EVACONSO
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
416 #define BBCFG (28 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
417 #else
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
418 #define NONE9 (28 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
419 #endif
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
420
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
421 #define VRPCMSKOFF (29 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
422 #define VRPCCFG (30 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
423 #define VRPCMSKSLP (31 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
424
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
425 //=== PAGE 2 =======
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
426
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
427 #if (ANLG_PG == S_PG_10) // SYREN PG1.0 ON ESAMPLE
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
428 #define BBCFG (5 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
429 #endif
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
430
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
431 #define VRPCABBTST (25 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
432 #define VRPCAUX (30 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
433 #define VRPCLDO (31 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
434
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
435 /* INSERT HERE OTHER DEVICES REGISTERS */
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
436
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
437
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
438 // Registers bit definitions
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
439 /*** SYREN internal control bits ***/
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
440
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
441 /** For reg. VBCTRL1 **/
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
442 #define VULSWITCH 0x008
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
443 #define MICBIAS 0x010
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
444 #define VALOOP 0x020
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
445 #define VCLKMODE 0x040
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
446 #define VSYNC 0x080
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
447 #define VBDFAUXG 0x100
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
448 #define VFBYP 0x200
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
449
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
450 /** For reg. VBCTRL2 **/
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
451 #define HSMICSEL 0x001
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
452 #define MICBIASEL 0x004
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
453 #define SPKG 0x008
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
454 #define HSOVMID 0x010
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
455 #define HSDIF 0x020
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
456
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
457 /** For reg. VBUCTRL **/
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
458 #define DXEN 0x200
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
459
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
460 /** For reg. VBPOP **/
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
461 #define HSODIS 0x001
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
462 #define HSOCHG 0x002
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
463 #define HSOAUTO 0x004
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
464 #define EARDIS 0x008
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
465 #define EARCHG 0x010
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
466 #define EARAUTO 0x020
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
467 #define AUXFDIS 0x040
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
468 #define AUXAUTO 0x080
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
469 #define AUXFBYP 0x200
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
470
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
471 // ABB device bits definition of register VRPCCFG
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
472 #define PWOND 0x20 // ON Button current state
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
473 #define CHGPRES 0x40
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
474
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
475 // ABB device bits definition of register ITSTATREG
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
476 #define REMOT_IT_STS 0x02
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
477 #define PUSHOFF_IT_STS 0x04
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
478 #define CHARGER_IT_STS 0x08
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
479 #define ADCEND_IT_STS 0x20
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
480
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
481 // ABB device bits definition of register VRPCSTS
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
482 #define ITWSTS 0x10 // Wake-up IT flag
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
483 #define PWONBSTS 0x20 // ON Button push flag
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
484 #define CHGSTS 0x40 // Charger plug flag
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
485 #define RPSTS 0x100 // Remote ON flag
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
486
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
487 // ABB ADC Interrupts
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
488 #define EOC_INTENA 0x03DF
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
489 #define EOC_INTMASK 0x0020
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
490
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
491 // ABB ADC CHANNELS (reg. MADCCTRL)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
492 #define VBATCV 0x0001
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
493 #define VCHGCV 0x0002
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
494 #define ICHGCV 0x0004
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
495 #define VBKPCV 0x0008
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
496 #define ADIN1CV 0x0010
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
497 #define ADIN2CV 0x0020
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
498 #define ADIN3CV 0x0040
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
499 #define ADIN4CV 0x0080
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
500 #define ADIN5CV 0x0100
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
501 #define ALL 0x01FF
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
502 #define NONE 0x0000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
503
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
504 // ABB MODULES
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
505 #define MADC 0x8000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
506 #define AFC 0x2000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
507 #define ADAC 0x0800
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
508 #define DCDC 0x0080
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
509 #define ALLOFF 0x0000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
510
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
511 // Definitions of SYREN test modes
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
512 #define TSPTEST1 0x001d
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
513 #define TSPTEST2 0x001e
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
514 #define AFCTEST 0x0010
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
515 #define AFCNORM 0x0000
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
516
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
517 #define TSPEN 0x001a
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
518 #define MADCTEST 0x0012
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
519 #define TSPADC 0x0015
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
520 #define TSPUP 0x0017
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
521 #define TSPDN 0x0018
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
522
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
523 // Definition for SYREN Power Management
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
524
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
525 //The duration of the SLPDLY counter must be greater than the process execution time:
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
526 //DBB deep sleep routine included the IT check = DBB sleep routine and IT check
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
527 //+ the seven 32Khz clock cycle interval needed to ABB in order to make effective the sleep abort write access in VRPCDEV ++ // register -> 7*T32Khz = = ABB IBIC propagation delay
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
528 //+ 150us of short asynchronous wake-up time (approximately 4*T32Khz) = ULPD short sleep where Syren/IOTA aborts sleep and
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
529 // write DEVSLEEP = 0
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
530
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
531 #define SLPDLY 0x001F // delay to set SYREN in sleep mode (unit: 20*T32Khz)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
532 #define MASK_SLEEP_MODE 0x0000 // set the regulators in low consumption in sleep mode
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
533
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
534 #define LOCORE_SLEEP 0x01
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
535 #define NORMAL_SLEEP 0x00
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
536
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
537 #define MAIN_BG 0x01,
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
538 #define SLEEP_BG 0x00
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
539
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
540 #endif // ANALOG == 1,2,3
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
541
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
542
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
543 // Define the level of semaphore protection for all accesses to the ABB
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
544 // 0 for no protection
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
545 // 1 for protection low
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
546 // 2 for protection medium
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
547 // 3 for protection high
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
548 #if (OP_L1_STANDALONE == 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
549 #define ABB_SEMAPHORE_PROTECTION (0)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
550 #else
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
551 #define ABB_SEMAPHORE_PROTECTION (1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
552 #endif
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
553
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
554
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
555
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
556 // PROTOTYPES
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
557 #if (ABB_SEMAPHORE_PROTECTION)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
558 void ABB_Sem_Create(void);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
559 #endif
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
560 void ABB_Wait_IBIC_Access(void);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
561 void ABB_Write_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id, SYS_UWORD16 value);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
562 SYS_UWORD16 ABB_Read_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
563 void ABB_free_13M(void);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
564 void ABB_stop_13M(void);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
565 SYS_UWORD16 ABB_Read_Status(void);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
566 void ABB_Conf_ADC(SYS_UWORD16 Channels, SYS_UWORD16 ItVal);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
567 void ABB_Read_ADC(SYS_UWORD16 *Buff);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
568 void ABB_on(SYS_UWORD16 modules, SYS_UWORD8 bRecoveryFlag);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
569 SYS_UWORD32 ABB_sleep(SYS_UWORD8 sleep_performed, SYS_WORD16 afc);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
570 void ABB_wakeup(SYS_UWORD8 sleep_performed, SYS_WORD16 afc);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
571 void ABB_wa_VRPC(SYS_UWORD16 value);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
572 void ABB_Write_Uplink_Data(SYS_UWORD16 *TM_ul_data);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
573 #if (OP_L1_STANDALONE == 0)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
574 void ABB_Power_Off(void);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
575 #endif
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
576 #if (ANALOG ==3)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
577 void Syren_Sleep_Config(SYS_UWORD16 sleep_type,SYS_UWORD16 bg_select, SYS_UWORD16 sleep_delay);
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
578 #endif
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
579
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
580 #else // _WINDOWS
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
581 // DEFINITIONS FOR IOTA
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
582 // ABB PAGE
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
583 #define PAGE0 0x0001
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
584 #define PAGE1 0x0002
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
585 #define PAGE2 0x0010
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
586
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
587 // ABB REGISTERS
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
588 //=== PAGE 0 =======
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
589 #define PAGEREG (1 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
590 #define APCDEL1 (2 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
591 #define BULDATA1_2 (3 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
592 #define TOGBR1 (4 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
593 #define TOGBR2 (5 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
594 #define VBDCTRL (6 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
595 #define AUXAFC1 (7 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
596 #define AUXAFC2 (8 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
597 #define AUXAPC (9 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
598 #define APCRAM (10 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
599 #define APCOFF (11 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
600 #define AUXDAC (12 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
601 #define MADCCTRL (13 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
602 #define VBATREG (15 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
603 #define VCHGREG (16 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
604 #define ICHGREG (17 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
605 #define VBKPREG (18 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
606 #define ADIN1REG (19 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
607 #define ADIN2REG (20 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
608 #define ADIN3REG (21 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
609 #define ADIN4REG (22 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
610 #define MADCSTAT (24 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
611 #define CHGREG (25 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
612 #define ITMASK (26 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
613 #define ITSTATREG (27 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
614 #define BCICTL1 (28 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
615 #define BCICTL2 (29 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
616 #define VRPCDEV (30 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
617 #define VRPCSTS (31 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
618
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
619 //=== PAGE 1 =======
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
620 #define PAGEREG (1 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
621 #define BULIOFF (2 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
622 #define BULQOFF (3 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
623 #define BULQDAC (4 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
624 #define BULIDAC (5 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
625 #define BBCTRL (6 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
626 #define VBUCTRL (7 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
627 #define VBCTRL1 (8 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
628 #define PWDNRG (9 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
629 #define VBPOP (10 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
630 #define VBCTRL2 (11 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
631 #define APCOUT (12 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
632 #define BCICONF (13 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
633 #define BULGCAL (14 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
634 #define TAPCTRL (19 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
635 #define TAPREG (20 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
636 #define AFCCTLADD (21 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
637 #define AFCOUT (22 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
638 #define VRPCSIM (23 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
639 #define AUXLED (24 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
640 #define APCDEL2 (26 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
641 #define ITSTATREG (27 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
642 #define VRPCMSKABB (29 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
643 #define VRPCCFG (30 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
644 #define VRPCMSK (31 << 1)
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
645
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
646 // ABB device bits definition of register VBUCTRL
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
647 #define DXEN 0x200
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
648
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
649 // ABB device bits definition of register VRPCSTS
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
650 #define ONBSTS 0x01 // ON Button push flag
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
651 #define ONRSTS 0x02 // Remote ON flag
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
652 #define ITWSTS 0x04 // Wake-up IT flag
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
653 #define CHGSTS 0x08 // Charger plug flag
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
654 #define ONREFLT 0x10 // ON Button current state
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
655 #define ORMRFLT 0x20 // Remote ON current state
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
656 #define CHGPRES 0x40 // Charger plug current state
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
657
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
658 // ABB device bits definition of register ITSTATREG
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
659 #define REMOT_IT_STS 0x02
75a11d740a02 initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
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660 #define PUSHOFF_IT_STS 0x04
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661 #define CHARGER_IT_STS 0x08
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662 #define ADCEND_IT_STS 0x20
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663
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664
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665 // PROTOTYPES
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666 void ABB_Write_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id, SYS_UWORD32 value);
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667 SYS_UWORD16 ABB_Read_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id);
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668 SYS_UWORD16 ABB_Read_Status(void);
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669 void ABB_Conf_ADC(SYS_UWORD16 Channels, SYS_UWORD16 ItVal);
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670 void ABB_Read_ADC(SYS_UWORD16 *Buff);
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671
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672 #endif // _WINDOWS
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673
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674 #endif // __ABB_H__