FreeCalypso > hg > freecalypso-citrine
annotate lldbg/serio.S @ 13:a2723de00e06
L1/audio_cfile: untouched LoCosto source modules removed
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 10 Jun 2016 06:21:21 +0000 |
parents | 75a11d740a02 |
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rev | line source |
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75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
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1 #include "../include/config.h" |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
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2 #include "ns16550.h" |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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3 |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
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4 /* this module implements the elementary serial I/O operations */ |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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5 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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6 .text |
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Mychaela Falconia <falcon@freecalypso.org>
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7 .code 32 |
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Mychaela Falconia <falcon@freecalypso.org>
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8 .globl lldbg_serial_out |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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9 lldbg_serial_out: |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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10 ldr r2, =CONFIG_LLDBG_UART_BASE |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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11 1: ldrb r3, [r2, #NS16550_LSR] |
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Mychaela Falconia <falcon@freecalypso.org>
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12 tst r3, #NS16550_LSR_THRE |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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13 beq 1b |
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Mychaela Falconia <falcon@freecalypso.org>
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14 strb r0, [r2, #NS16550_THR] |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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15 bx lr |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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16 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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17 .globl lldbg_serial_in_poll |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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18 lldbg_serial_in_poll: |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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19 ldr r2, =CONFIG_LLDBG_UART_BASE |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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20 ldrb r3, [r2, #NS16550_LSR] |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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21 tst r3, #NS16550_LSR_DR |
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Mychaela Falconia <falcon@freecalypso.org>
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22 ldrneb r0, [r2, #NS16550_RBR] |
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Mychaela Falconia <falcon@freecalypso.org>
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23 mvneq r0, #0 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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24 bx lr |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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25 |
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Mychaela Falconia <falcon@freecalypso.org>
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26 #if 0 // not needed currently |
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Mychaela Falconia <falcon@freecalypso.org>
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27 .globl lldbg_serial_flush |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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28 lldbg_serial_flush: |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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29 ldr r2, =CONFIG_LLDBG_UART_BASE |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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30 1: ldrb r3, [r2, #NS16550_LSR] |
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Mychaela Falconia <falcon@freecalypso.org>
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31 tst r3, #NS16550_LSR_TEMP |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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32 beq 1b |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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33 bx lr |
75a11d740a02
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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34 #endif |