FreeCalypso > hg > freecalypso-citrine

comparison L1/cfile/l1_api_hisr.c @ 0:75a11d740a02

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 09 Jun 2016 00:02:41 +0000
parents
children b36540edb046
comparison
equal deleted inserted replaced
-1:000000000000 0:75a11d740a02
1 /************* Revision Controle System Header *************
2 * GSM Layer 1 software
3 * L1_API_HISR.C
4 *
5 * Filename l1_api_hisr.c
6 * Copyright 2003 (C) Texas Instruments
7 *
8 ************* Revision Controle System Header *************/
9
10 #include "config.h"
11 #include "l1_confg.h"
12 #include "../../nucleus/nucleus.h"
13 #include "sys_types.h"
14 #include "l1_types.h"
15 #include "l1audio_cust.h"
16 #include "l1audio_defty.h"
17 #include "l1audio_const.h"
18 #include "l1_const.h"
19 #include "../../gpf/inc/cust_os.h"
20 #include "l1tm_defty.h"
21 #if (L1_GTT == 1)
22 #include "l1gtt_const.h"
23 #include "l1gtt_defty.h"
24 #endif
25 #if (L1_MP3 == 1)
26 #include "l1mp3_const.h"
27 #include "l1mp3_signa.h"
28 #include "l1mp3_defty.h"
29 #include "l1mp3_proto.h"
30 #endif
31 #if (L1_MIDI == 1)
32 #include "l1midi_const.h"
33 #include "l1midi_signa.h"
34 #include "l1midi_defty.h"
35 #include "l1midi_proto.h"
36 #endif
37 #if (L1_AAC == 1)
38 #include "l1aac_const.h"
39 #include "l1aac_signa.h"
40 #include "l1aac_defty.h"
41 #include "l1aac_proto.h"
42 #endif
43 #if (L1_DYN_DSP_DWNLD==1)
44 #include "l1_dyn_dwl_defty.h"
45 #include "l1_dyn_dwl_msgty.h"
46 #include "l1_dyn_dwl_const.h"
47 #include "l1_dyn_dwl_signa.h"
48 #include "l1_dyn_dwl_error.h"
49 #include "l1_dyn_dwl_proto.h"
50 #include "l1_api_hisr.h"
51 #endif
52 #include "l1_defty.h"
53 #include "l1_api_hisr.h"
54 #include "l1audio_signa.h"
55 #include "l1_varex.h"
56 #include "l1_macro.h"
57 #include "../../bsp/mem.h"
58
59
60 /*-------------------------------------------------------------*/
61 /* l1_api_handler() */
62 /*-------------------------------------------------------------*/
63 /* */
64 /* Parameters : none */
65 /* */
66 /* Return : n/a */
67 /* */
68 /* Description : API interrupt handler, multiplexed for: */
69 /* 1) audio sources: MP3 or AAC */
70 /* 2) modem sources: USF */
71 /* */
72 // The API Interrupt is multiplexed between (DYN DWNLD, MP3 ,AAC) and FAST USF.
73 // DYN DWNLD, MP3 and AAC are mutually exclusive and hence only one would be
74 // active at one time. But FAST USF would co-exist with any of the them and hence
75 // there needs to be a way to distinguish the two sources of the API Interrupt. A flag
76 // d_dsp_hint_flag is used by the DSP to signify the source of the interrupt. The bit
77 // configuration of d_dsp_hint_flag is
78 // 15 14 13 12 | 11 10 9 8 | 7 6 5 4 | 3 2 1 0
79 // | |____> Fast USF
80 // |______> (DYN DWNLD, MP3, AAC)
81
82
83 void l1_api_handler()
84 {
85 #if (FF_L1_IT_DSP_USF == 1) || (FF_L1_IT_DSP_DTX == 1) || (FF_L1_FAST_DECODING == 1)
86 extern NU_HISR api_modemHISR;
87 #endif
88
89 #if ( (L1_MP3 == 1) || (L1_AAC == 1) || (L1_MIDI == 1) || (L1_DYN_DSP_DWNLD == 1) )
90 extern NU_HISR apiHISR;
91 #endif
92
93 #if (FF_L1_IT_DSP_USF == 1) || (FF_L1_IT_DSP_DTX == 1) || (FF_L1_FAST_DECODING == 1)
94 #if (FF_L1_FAST_DECODING == 1)
95 if (l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag & (1 << B_FAST_DECODING_FLAG))
96 {
97 // Flag HISR to be scheduled
98 l1a_apihisr_com.fast_decoding.pending = TRUE;
99 // Clear API ISR condition
100 l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag &= ~(1 << B_FAST_DECODING_FLAG);
101 l1a_apihisr_com.fast_decoding.crc_error =
102 l1s_dsp_com.dsp_ndb_ptr->d_fast_paging_data & (C_FAST_DECODING_CRC_FIRE1);
103 NU_Activate_HISR(&api_modemHISR); // activate API modem HISR
104 }
105 #endif /* FF_L1_FAST_DECODING */
106 #if (FF_L1_IT_DSP_USF == 1)
107 if (l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag & (1 << B_USF_HINT_ISSUED))
108 {
109 // Flag HISR to be scheduled
110 l1a_apihisr_com.usf.pending = TRUE;
111 // Clear API ISR condition
112 l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag &= ~(1 << B_USF_HINT_ISSUED);
113 NU_Activate_HISR(&api_modemHISR); // activate API modem HISR
114 }
115 #endif //(FF_L1_IT_DSP_USF == 1)
116 #if (FF_L1_IT_DSP_DTX == 1)
117
118 if ((l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag & 0x4 ) != 0) // DTX interrupt set by 3rd bit position from left
119 {
120 // Flag HISR to be scheduled
121 l1a_apihisr_com.dtx.pending = TRUE;
122 // Clear API ISR condition
123
124 l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag &= 0xFB; //reset the 3rd bit position
125 NU_Activate_HISR(&api_modemHISR); // activate API modem HISR
126 }
127 #endif //(FF_L1_IT_DSP_DTX == 1)
128 // Call the API HISR when MP3, AAC, DYN DWNLD comes
129 #if ( (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1) )
130
131
132
133
134 if (l1s_dsp_com.dsp_ndb_ptr->d_dsp_aud_hint_flag & (1 << B_NON_USF_HINT_ISSUED))
135 {
136 // Clear API ISR condition
137 l1s_dsp_com.dsp_ndb_ptr->d_dsp_aud_hint_flag = 0;
138 //Activate the API HISR
139 NU_Activate_HISR(&apiHISR);
140 }
141 #endif // (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_DYN_DSP_DWNLD == 1)
142 #endif //(FF_L1_IT_DSP_USF == 1) || //(FF_L1_IT_DSP_DTX == 1)
143
144
145 //When Fast USF is not enabled, then the API HISR needs to be called every time the DSP
146 //sends a HINT interrupt.
147 #if (!FF_L1_IT_DSP_USF) && (!FF_L1_IT_DSP_DTX)
148 #if ( (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1) )
149 NU_Activate_HISR(&apiHISR);
150 #endif
151 #endif
152 //NU_Activate_HISR(&apiHISR); //hack remove
153 return;
154 }
155
156 /*-------------------------------------------------------------*/
157 /* api_hisr() */
158 /*-------------------------------------------------------------*/
159 /* */
160 /* Parameters : none */
161 /* */
162 /* Return : n/a */
163 /* */
164 /* Description : main function dealing with DSP->MCU interrupt */
165 /* */
166 /*-------------------------------------------------------------*/
167 void api_hisr(void)
168 {
169 #if (L1_MP3 == 1)
170 if(l1a_apihisr_com.mp3.running==TRUE)
171 {
172 l1mp3_apihisr();
173 }
174 #endif
175 #if (L1_MIDI == 1)
176 if(l1_apihisr.midi.running==TRUE)
177 {
178 l1midi_apihisr();
179 }
180 #endif
181 #if (L1_AAC == 1)
182 if(l1a_apihisr_com.aac.running==TRUE)
183 {
184 l1aac_apihisr();
185 }
186 #endif
187 #if (L1_DYN_DSP_DWNLD == 1)
188 if( l1_apihisr.dyn_dwnld.running == TRUE )
189 {
190 l1_dyn_dwnld_apihisr();
191 }
192 #endif
193
194 }
195
196 /*-------------------------------------------------------------*/
197 /* api_modem_hisr() */
198 /*-------------------------------------------------------------*/
199 /* */
200 /* Parameters : none */
201 /* */
202 /* Return : n/a */
203 /* */
204 /* Description : main function dealing with DSP->MCU interrupt */
205 /* */
206 /*-------------------------------------------------------------*/
207 void api_modem_hisr(void)
208 {
209 #if (FF_L1_FAST_DECODING == 1)
210 if(l1a_apihisr_com.fast_decoding.pending == TRUE)
211 {
212 extern void l1_fast_decoding_apihisr(void);
213 l1_fast_decoding_apihisr();
214 }
215
216 #endif /* FF_L1_FAST_DECODING */
217 #if (FF_L1_IT_DSP_USF == 1)
218 if(l1a_apihisr_com.usf.pending == TRUE)
219 {
220 extern void l1usf_apihisr(void);
221 l1usf_apihisr();
222 }
223 #endif
224 #if (FF_L1_IT_DSP_DTX == 1)
225 if(l1a_apihisr_com.dtx.pending == TRUE)
226 {
227 extern void l1dtx_apihisr(void);
228 l1dtx_apihisr();
229 }
230 #endif
231 }
232
233 /*-------------------------------------------------------------*/
234 /* l1_trigger_api_interrupt() */
235 /*-------------------------------------------------------------*/
236 /* */
237 /* Parameters : none */
238 /* */
239 /* Return : n/a */
240 /* */
241 /* Description : Trigger an MCU->DSP interrupt */
242 /* */
243 /*-------------------------------------------------------------*/
244 void l1_trigger_api_interrupt()
245 {
246 #if (CODE_VERSION == SIMULATION)
247 extern void sim_it_mcu_to_dsp();
248 sim_it_mcu_to_dsp();
249 #else
250 #if (L1_DYN_DSP_DWNLD == 1)
251 *((volatile UWORD32 *)MEM_APIC_REG)|=ID_API_INT;
252 #else
253 *((volatile UWORD32 *)MEM_APIC_REG)|=0x4;
254 #endif
255 #endif
256
257 }