comparison L1/cfile/l1_small_asm.S @ 0:75a11d740a02

initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 09 Jun 2016 00:02:41 +0000
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-1:000000000000 0:75a11d740a02
1 /*
2 * Assembly code extracted out of TI's l1_small.c
3 *
4 * This code is correct ONLY for CHIPSET 10 or 11 as currently used
5 * by FreeCalypso; see TI's original code for what changes would be
6 * needed to support other CHIPSETs.
7 */
8
9 .text
10 .code 32
11
12 /*-------------------------------------------------------*/
13 /* _GSM_Small_Sleep */
14 /* (formerly INT_Small_Sleep) */
15 /*-------------------------------------------------------*/
16 /* */
17 /* Description: small sleep */
18 /* ------------ */
19 /* Called by TCT_Schedule main loop of Nucleus */
20 /*-------------------------------------------------------*/
21
22 #define SMALL_SLEEP 0x01
23 #define ALL_SLEEP 0x04
24 #define PWR_MNGT 0x01
25
26 .globl _GSM_Small_Sleep
27 _GSM_Small_Sleep:
28
29 ldr r0,Switch
30 ldr r0,[r0]
31 ldrb r1,[r0]
32 cmp r1,#PWR_MNGT
33 bne TCT_Schedule_Loop
34
35 ldr r0,Mode
36 ldr r0,[r0]
37 ldrb r1,[r0]
38 cmp r1,#SMALL_SLEEP
39 beq Small_sleep_ok
40 cmp r1,#ALL_SLEEP
41 bne TCT_Schedule_Loop
42
43 Small_sleep_ok:
44
45 // *****************************************************
46 //reset the DEEP_SLEEP bit 12 of CNTL_ARM_CLK register
47 // (Cf BUG_1278)
48
49 ldr r0,addrCLKM @ pick up CNTL_ARM_CLK register address
50 ldrh r1,[r0] @ take the current value of the register
51 orr r1,r1,#0x1000 @ reset the bit
52 strh r1,[r0] @ store the result
53
54 ldr r0,addrCLKM @ pick up CLKM clock register address
55 ldrh r1,[r0] @ take the current value of the register
56 bic r1,r1,#1 @ disable ARM clock
57 strh r1,[r0]
58
59 B TCT_Schedule_Loop @ Return to TCT_Schedule main loop
60
61 addrCLKM: .word 0xfffffd00 @ CLKM clock register address
62
63 Mode: .word mode_authorized
64 Switch: .word switch_PWR_MNGT