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comparison L1/include/l1_const.h @ 0:75a11d740a02

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initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 09 Jun 2016 00:02:41 +0000
parents
children f93dab57b032
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-1:000000000000 0:75a11d740a02
1 /************* Revision Controle System Header *************
2 * GSM Layer 1 software
3 * L1_CONST.H
4 *
5 * Filename l1_const.h
6 * Copyright 2003 (C) Texas Instruments
7 *
8 ************* Revision Controle System Header *************/
9 #ifndef L1_CONST_H
10 #define L1_CONST_H
11
12 #ifdef __MSDOS__ // Running BORLANDC compiler.
13 #ifdef MVC
14 #define EXIT exit(0)
15 #define FAR
16 #else
17 #define EXIT DOS_Exit(0)
18 #define FAR far
19 #endif
20 #else // Running ARM compiler.
21 #define FAR
22 #define EXIT exit(0)
23 #undef stricmp // appease gcc
24 #define stricmp strcmp
25 #endif
26
27
28 #if (CODE_VERSION != SIMULATION)
29 #undef NULL // appease gcc
30 #define NULL 0
31 #endif
32
33 #define NO_PAR 0
34
35 #define NO_TASK 0
36 #define ALL_TASK 0xffffffff
37 #define ALL_PARAM 0xffffffff
38
39 #define TRUE 1
40 #define TRUE_L 1L
41 #define FALSE 0
42
43 #define NOT_PENDING 0
44 #define PENDING 1
45
46 #define INACTIVE 2
47 #define ACTIVE 3
48 #define RE_ENTERED 4
49 #define WAIT_IQ 5
50
51 //---------------------------------------------
52 // MCU-DSP bit-field bit position definitions
53 //---------------------------------------------
54 #if L1_GPRS
55 #define GPRS_SCHEDULER 1 // Select GPRS scheduler
56 #endif
57 #define GSM_SCHEDULER 2 // Select GSM scheduler
58
59 //-----------------------------
60 // POWER MANAGEMENT............
61 //-----------------------------
62 #define MIN_SLEEP_TIME (SETUP_FRAME+2+l1_config.params.rf_wakeup_tpu_scenario_duration) //HW WAKE-UP+MIN_SLEEP(2)+AFC RESTORE(rf_wakeup_tpu_scenario_duration)
63 #define TPU_LOAD 01
64 #define TPU_FREEZE 02
65
66 // SLEEP ALGO SWITCH
67 #define NO_SLEEP 00 // ------ + ------ + ------
68 #define SMALL_SLEEP 01 // SMALL + ------ + ------
69 #define BIG_SLEEP 02 // ------ + BIG + ------
70 #define DEEP_SLEEP 03 // ------ + BIG + DEEP
71 #define ALL_SLEEP 04 // SMALL + BIG + DEEP
72
73 // GAUGING SAMPLES
74 #define SIZE_HIST 10
75 #define MAX_BAD_GAUGING 3
76
77 // GAUG_IN_32T = (HF in clock of 13Mhz*dpll) * ( LF in Khz)
78 // Leonardo version had it set to 1348, but TCS3.2 (LoCosto) has it set
79 // to 605 instead. I'll revert it to the Leonardo value for now.
80 // -- Space Falcon
81 #define GAUG_IN_32T 1348 // gauging duration is 1348*T32 measured on eva4
82
83 // DSP state need to be used to enter Deep Sleep mode
84 #if (W_A_DSP_IDLE3 == 1)
85 #define C_DSP_IDLE3 3
86 #endif
87
88 //-------------------------------------------------
89 // INIT: value is 32.768Khz at [-500 ppm, +100 ppm]
90 // to face temperature variation
91 //
92 // ACQUIS: variations allowed 32.768Khz +- 50 ppm
93 // 9 frames gauging is 1348*T32 (measured on eva4)
94 // UPDATE: variation allowed is +- 6 ppm jitter
95 //-------------------------------------------------
96
97 #define MCUCLK 13000 // 13 Mhz
98 #define LF 32.768
99 #define LF_100PPM 32.7712768 // 32.768*(1+100*10E-6)
100 #define LF_500PPM 32.751616 // 32.768*(1-500*10E-6)
101 #define LF_50PPM 32.7696384 // 32.768*(1+50*10E-6)
102 #define LF_6PPM 32.76819661 // 32.768*(1+6*10E-6)
103
104 #define NB_INIT 5 // nbr of gauging to pass to ACQUIS
105 #define NB_ACQU 10 // nbr of gauging to pass to UPDATE
106
107 #if (CHIPSET ==2 || CHIPSET ==3 || CHIPSET == 5 || CHIPSET == 6 || CHIPSET == 9) // PLL is at 65 Mhz !!!!!!
108 #define PLL 5 // 5*13Mhz = 65 Mhz
109 //-------------------------------------------------
110 // INIT: value is 32.768Khz at [-500 ppm, +100 ppm]
111 //
112 // ACQUIS: variations allowed 32.768Khz +- 50 ppm
113 // 9 frames gauging is 1348*T32 (measured on eva4)
114 // UPDATE: variation allowed is +- 6 ppm jitter
115 //-------------------------------------------------
116 #define C_CLK_MIN 1983 // 65000/32.7712768 = 1983.444234
117 #define C_CLK_INIT_MIN 29113 // 0.444234*2^16
118 #define C_CLK_MAX 1984 // 65000 / 32.751616 = 1984.634896
119 #define C_CLK_INIT_MAX 41608 // 0.634896*2^16
120 #define C_DELTA_HF_ACQUIS 130 // 1348/32.768-1348/32.7696384 = 0.002056632ms
121 // 0.002056632/0.0001538 = 130 T65Mhz
122 #define C_DELTA_HF_UPDATE 15 // 1348/32.768-1348/32.76819661 =0.00024691ms
123 // 0.00024691/0.0001538 = 15 T65Mhz
124 #endif
125
126 #define ARMIO_CLK_CUT 0x0001
127 #define UWIRE_CLK_CUT 0x0002
128
129 //-----------------------------
130 // Neighbour cell sync. reading
131 //-----------------------------
132 #if (L1_12NEIGH)
133 #define NBR_NEIGHBOURS 12
134 #else
135 #define NBR_NEIGHBOURS 6
136 #endif
137
138 //-----------------------------
139 // LAYER 1 MEASUREMENT TASKS...
140 //-----------------------------
141 #define NBR_L1S_MEAS_TASKS 4
142
143 #define FSMS 0
144 #define I_BAMS 1
145 #define D_BAMS 2
146 #define SERVMS 3
147
148 #define FSMS_MEAS (TRUE_L << FSMS) // Measurement task on FULL list (Cell Selection/Idle).
149 #define I_BAMS_MEAS (TRUE_L << I_BAMS) // Measurement task on BA list in Idle.
150 #define D_BAMS_MEAS (TRUE_L << D_BAMS) // Measurement task on BA list in Dedicated.
151 #define SERVMS_MEAS (TRUE_L << SERVMS) // Measurement task for Serving.
152
153 #define FSMS_MEAS_MASK ALL_TASK ^ FSMS_MEAS
154 #define I_BAMS_MEAS_MASK ALL_TASK ^ I_BAMS_MEAS
155 #define D_BAMS_MEAS_MASK ALL_TASK ^ D_BAMS_MEAS
156 #define SERVMS_MEAS_MASK ALL_TASK ^ SERVMS_MEAS
157
158 #define A_D_BLEN 456 // SACCH/SDCCH data block length (GSM 5.01 $7)
159 #define TCH_FS_BLEN 378 // TCH FULL SPEECH block length
160 #define TCH_HS_BLEN 211 // TCH HALF SPEECH block length
161 #define TCH_F_D_BLEN 456 // FACCH, TCH_DATA block length
162 #define MIN_ACCEPTABLE_SNR_FOR_SB 200 // threshold under which a SB shall be considered as not found
163
164 // Define max PM/TDMA according to DSP code and TPU RAM size
165 //----------------------------------------------------------
166
167 // NOTE: we should use a global variable initialized at L1 start and function of rx synth setup time.
168
169 #if ((CHIPSET == 2) || (CHIPSET == 3) || (CHIPSET == 4))
170
171 // TPU RAM size limitation
172
173 #define NB_MEAS_MAX 4
174 #define NB_MEAS_MAX_GPRS 4
175
176 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15))
177
178 #if (DSP >= 33)
179
180 // DSP code 33: upto 8 PMs with GSM and GPRS scheduler
181
182 #define NB_MEAS_MAX 8
183 #define NB_MEAS_MAX_GPRS 8
184
185 #elif (DSP == 32)
186
187 // DSP code prior to code 33 support upto 4 PMs with GSM scheduler
188 // and 8 PMs with GPRS scheduler, 6 for DSP 32 because of CPU load
189
190 #define NB_MEAS_MAX 4
191 #define NB_MEAS_MAX_GPRS 6
192
193 #else
194
195
196 // DSP code prior to code 33 support upto 4 PMs with GSM scheduler
197 // and 8 PMs with GPRS scheduler
198
199 #define NB_MEAS_MAX 4
200 #define NB_MEAS_MAX_GPRS 8
201
202 #endif
203 #endif
204 #if (AMR == 1)
205 #define SID_UPDATE_BLEN 212 // SID UPDATE block length
206 #define RATSCCH_BLEN 212 // RATSCCH block length
207 #define TCH_AFS_BLEN 448 // TCH Adaptative Full rate Speech block length
208 // Note: the d_nerr value is calculated thanks to the bit class 1 of the block.
209 // But the number AHS bit class 1 depends on the type of vocoder currently used (c.f. 5.03 &3.10.7.2)
210 #define TCH_AHS_7_95_BLEN 188 // TCH AHS 7.95 Speech block length
211 #define TCH_AHS_7_4_BLEN 196 // TCH AHS 7.4 Speech block length
212 #define TCH_AHS_6_7_BLEN 200 // TCH AHS 6.7 Speech block length
213 #define TCH_AHS_5_9_BLEN 208 // TCH AHS 5.9 Speech block length
214 #define TCH_AHS_5_15_BLEN 212 // TCH AHS 5.15 Speech block length
215 #define TCH_AHS_4_75_BLEN 212 // TCH AHS 4.75 Speech block length
216 #endif
217 //----------------------------------------
218 // LAYER 1 Asynchronous processes names...
219 //----------------------------------------
220 #define NBR_L1A_PROCESSES 63
221
222 #define FULL_MEAS 0 // l1a_full_list_meas_process(msg)
223 #define CS_NORM 1 // l1a_cs_bcch_process(msg)
224 #define I_6MP 2 // l1a_idle_6strongest_monitoring_process(msg)
225 #define I_SCP 3 // l1a_idle_serving_cell_paging_process(msg)
226 #define I_SCB 4 // l1a_idle_serving_cell_bcch_reading_process(msg)
227 #define I_SMSCB 5 // l1a_idle_smscb_process(msg)
228 #define CR_B 6 // l1a_cres_process(msg)
229 #define ACCESS 7 // l1a_access_process(msg)
230 #define DEDICATED 8 // l1a_dedicated_process(msg)
231 #define I_FULL_MEAS 9 // l1a_dedicated_process(msg)
232 #define I_NMEAS 10 // l1a_idle_ba_meas_process(msg)
233 #define DEDIC_6 11 // l1a_dedic6_process(msg)
234 #define D_NMEAS 12 // l1a_dedic_ba_list_meas_process(msg)
235 #define HW_TEST 13 // l1a_test_process(msg)
236 #define I_BCCHN 14 // l1a_idle_neighbour_cell_bcch_reading_process(msg)
237 #define I_ADC 15 // l1a_mmi_adc_req(msg)
238 #define TMODE_FB0 16 // l1a_tmode_fb0_process(msg)
239 #define TMODE_FB1 17 // l1a_tmode_fb1_process(msg)
240 #define TMODE_SB 18 // l1a_tmode_sb_process(msg)
241 #define TMODE_BCCH 19 // l1a_tmode_bcch_reading_process(msg)
242 #define TMODE_RA 20 // l1a_tmode_access_process(msg)
243 #define TMODE_DEDICATED 21 // l1a_tmode_dedicated_process(msg)
244 #define TMODE_FULL_MEAS 22 // l1a_tmode_full_list_meas_process(msg)
245 #define TMODE_PM 23 // l1a_tmode_meas_process(msg)
246 #define TMODE_TRANSFER 24 // l1a_tmode_transfer_process(msg)
247 #define L1A_KEYBEEP_STATE 25 // l1a_mmi_keybeep_process(msg)
248 #define L1A_TONE_STATE 26 // l1a_mmi_tone_process(msg)
249 #define L1A_MELODY0_STATE 27 // l1a_mmi_melody0_process(msg)
250 #define L1A_MELODY1_STATE 28 // l1a_mmi_melody1_process(msg)
251 #define L1A_VM_PLAY_STATE 29 // l1a_mmi_vm_playing_process(msg)
252 #define L1A_VM_RECORD_STATE 30 // l1a_mmi_vm_recording_process(msg)
253 #define L1A_SR_ENROLL_STATE 31 // l1a_mmi_sr_enroll_process(msg)
254 #define L1A_SR_UPDATE_STATE 32 // l1a_mmi_sr_update_process(msg)
255 #define L1A_SR_RECO_STATE 33 // l1a_mmi_sr_reco_process(msg)
256 #define L1A_SR_UPDATE_CHECK_STATE 34 // l1a_mmi_sr_update_check_process(msg)
257 #define L1A_AEC_STATE 35 // l1a_mmi_aec_process(msg)
258 #define L1A_FIR_STATE 36 // l1a_mmi_fir_process(msg)
259 #define L1A_AUDIO_MODE_STATE 37 // l1a_mmi_audio_mode_process(msg)
260 #define L1A_MELODY0_E2_STATE 38 // l1a_mmi_melody0_e2_process(msg)
261 #define L1A_MELODY1_E2_STATE 39 // l1a_mmi_melody1_e2_process(msg)
262 #define L1A_VM_AMR_PLAY_STATE 40 // l1a_mmi_vm_amr_playing_process(msg)
263 #define L1A_VM_AMR_RECORD_STATE 41 // l1a_mmi_vm_amr_recording_process(msg)
264 #define L1A_CPORT_STATE 42 // l1a_mmi_cport_process(msg)
265 #define L1A_AUDIO_ONOFF_STATE 43 // l1a_mmi_audio_onoff_process(msg)
266 #define L1A_GTT_STATE 44 // l1a_mmi_gtt_process(msg)
267 #define INIT_L1 45 // l1a_init_layer1_process(msg)
268 #define HSW_CONF 46 // l1a_test_config_process(msg)
269 #define L1A_MP3_STATE 47 // l1a_mmi_mp3_process(msg)
270 #define TMODE_AUDIO_STEREOPATH_DRV_STATE 48 // l1a_tmode_audio_stereopath_process(msg)
271 #define L1A_EXT_AUDIO_MGT_STATE 49 // l1a_mmi_ext_audio_mgt_process(msg)
272 #define L1A_ANR_STATE 50 // l1a_mmi_anr_process(msg)
273 #define L1A_IIR_STATE 51 // l1a_mmi_iir_process(msg)
274 #define L1A_LIMITER_STATE 52 // l1a_mmi_limiter_process(msg)
275 #define L1A_ES_STATE 53 // l1a_mmi_es_process(msg)
276 #define L1A_MIDI_STATE 54 // l1a_mmi_midi_process(msg)
277 #define L1A_AGC_UL_STATE 55 // l1a_mmi_agc_ul_process(msg)
278 #define L1A_AGC_DL_STATE 56 // l1a_mmi_agc_dl_process(msg)
279 #define L1A_DRC_STATE 57 // l1a_mmi_drc_process(msg)
280 #define L1A_WCM_STATE 58 // l1a_mmi_wcm_process(msg)
281 #define L1A_AAC_STATE 59 // l1a_mmi_aac_process(msg)
282 #if (L1_VOCODER_IF_CHANGE == 1)
283 #define L1A_VOCODER_CFG_STATE 60 // l1a_mmi_vocoder_cfg_process
284 #endif
285 #if (L1_PCM_EXTRACTION)
286 #define L1A_PCM_DOWNLOAD_STATE 61
287 #define L1A_PCM_UPLOAD_STATE 62
288 #endif
289
290
291 #if TESTMODE
292 #define TMODE_UPLINK (1<<0)
293 #define TMODE_DOWNLINK (1<<1)
294 #endif
295
296 //------------------------------------
297 // LAYER 1 DOWNLINK & UPLINK TASKS...
298 //------------------------------------
299 #define TASK_DISABLED 0
300 #define TASK_ENABLED 1
301
302 #define SEMAPHORE_RESET 0
303 #define SEMAPHORE_SET 1
304
305 #define NO_NEW_TASK -1
306
307
308 // Tasks in the order of their priority (low to high).
309
310 #if (GSM_IDLE_RAM != 0)
311 #define INT_RAM_GSM_IDLE_L1S_PROCESSES1 0x00000618 // PNP, PEP, NP, EP only are supported
312 #endif
313
314
315 #if !L1_GPRS
316
317 #if ((REL99 == 1) && (FF_BHO == 1))
318 #define NBR_DL_L1S_TASKS 33
319 #else //#if ((REL99 == 1) && (FF_BHO == 1))
320 #define NBR_DL_L1S_TASKS 32
321 #endif //#if ((REL99 == 1) && (FF_BHO == 1))
322
323 //GSM_TASKS/
324 #define HWTEST 0 // DSP checksum reading
325 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode
326 #define DEDIC 2 // Global Dedicated mode switch
327 #define RAACC 3 // Channel access (ul)
328 #define RAHO 4 // Handover access (ul)
329 #define NSYNC 5 // Global Neighbour cell synchro switch
330 #define FBNEW 6 // Frequency burst search (Idle mode)
331 #define SBCONF 7 // Synchro. burst confirmation
332 #define SB2 8 // Synchro. burst read (1 frame uncertainty / SB position)
333 #define FB26 9 // Frequency burst search, dedic/transfer mode MF26 or MF52
334 #define SB26 10 // Synchro burst search, dedic/transfer mode MF26 or MF52
335 #define SBCNF26 11 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52
336 #define FB51 12 // Frequency burst search, dedic mode MF51
337 #define SB51 13 // Synchro burst search, dedic MF51
338 #define SBCNF51 14 // Synchro burst confirmation, dedic MF51
339 #define BCCHN 15 // BCCH Neighbor in GSM Idle
340 #define ALLC 16 // All CCCH Reading
341 #define EBCCHS 17 // Extended BCCH Serving Reading
342 #define NBCCHS 18 // Normal BCCH ServingReading
343 #define SMSCB 19 // CBCH serving Reading
344 #define NP 20 // Normal paging Reading
345 #define EP 21 // Extended pagingReading
346 #define ADL 22 // SACCH(SDCCH) DL
347 #define AUL 23 // SACCH(SDCCH) UL
348 #define DDL 24 // SDCCH DL
349 #define DUL 25 // SDCCH UL
350 #define TCHD 26 // Dummy for TCH Half rate
351 #define TCHA 27 // SACCH(TCH)
352 #define TCHTF 28 // TCH Full rate
353 #define TCHTH 29 // TCH Half rate
354 #define BCCHN_TOP 30 // BCCH Neighbour TOP priority in Idle mode
355 #if ((REL99 == 1) && (FF_BHO == 1))
356 #define FBSB 31 // Freq + Synchro Burst Reading in Blind Handover
357 #define SYNCHRO 32 // synchro task: L1S reset
358 #else //#if ((REL99 == 1) && (FF_BHO == 1))
359 #define SYNCHRO 31 // synchro task: L1S reset
360 #endif //#if ((REL99 == 1) && (FF_BHO == 1))
361 //END_GSM_TASKS/
362
363 #else
364
365 #if ((REL99 == 1) && (FF_BHO == 1))
366 #define NBR_DL_L1S_TASKS 46
367 #else //#if ((REL99 == 1) && (FF_BHO == 1))
368 #define NBR_DL_L1S_TASKS 45
369 #endif //#if ((REL99 == 1) && (FF_BHO == 1))
370
371 #if (FF_REPEATED_SACCH == 1 )
372 #define REPEATED_SACCH_ENABLE 1
373 #endif /* FF_REPEATED_SACCH */
374 //GPRS_TASKS/
375 #define HWTEST 0 // DSP checksum reading
376 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode
377 #define DEDIC 2 // Global Dedicated mode switch
378 #define RAACC 3 // Channel access (ul)
379 #define RAHO 4 // Handover access (ul)
380 #define NSYNC 5 // Global Neighbour cell synchro switch
381 #define POLL 6 // Packet Polling (Access)
382 #define PRACH 7 // Packet Random Access Channel
383 #define ITMEAS 8 // Interference measurements
384 #define FBNEW 9 // Frequency burst search (Idle mode)
385 #define SBCONF 10 // Synchro. burst confirmation
386 #define SB2 11 // Synchro. burst read (1 frame uncertainty / SB position)
387 #define PTCCH 12 // Packet Timing Advance control channel
388 #define FB26 13 // Frequency burst search, dedic/transfer mode MF26 or MF52
389 #define SB26 14 // Synchro burst search, dedic/transfer mode MF26 or MF52
390 #define SBCNF26 15 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52
391 #define FB51 16 // Frequency burst search, dedic mode MF51
392 #define SB51 17 // Synchro burst search, dedic MF51
393 #define SBCNF51 18 // Synchro burst confirmation, dedic MF51
394 #define PDTCH 19 // Packet Data channel
395 #define BCCHN 20 // BCCH Neighbor in GSM Idle
396 #define ALLC 21 // All CCCH Reading
397 #define EBCCHS 22 // Extended BCCH Serving Reading
398 #define NBCCHS 23 // Normal BCCH Serving Reading
399 #define ADL 24 // SACCH(SDCCH) DL
400 #define AUL 25 // SACCH(SDCCH) UL
401 #define DDL 26 // SDCCH DL
402 #define DUL 27 // SDCCH UL
403 #define TCHD 28 // Dummy for TCH Half rate
404 #define TCHA 29 // SACCH(TCH)
405 #define TCHTF 30 // TCH Full rate
406 #define TCHTH 31 // TCH Half rate
407 #define PALLC 32 // All PCCCH reading
408 #define SMSCB 33 // CBCH serving Reading
409 #define PBCCHS 34 // PBCCH serving reading
410 #define PNP 35 // Packet Normal paging Reading
411 #define PEP 36 // Packet Extended paging Reading
412 #define SINGLE 37 // Single Block for GPRS
413 #define PBCCHN_TRAN 38 // Packet BCCH Neighbor in Packet Transfer mode.
414 #define PBCCHN_IDLE 39 // Packet BCCH Neighbor in Idle mode.
415 #define BCCHN_TRAN 40 // BCCH Neighbour in Packet Transfer mode
416 #define NP 41 // Normal paging Reading
417 #define EP 42 // Extended paging Reading
418 #define BCCHN_TOP 43 // BCCH Neighbour TOP priority in Idle mode
419 #if ((REL99 == 1) && (FF_BHO == 1))
420 #define FBSB 44 // Freq + Synchro Burst Reading in Blind Handover
421 #define SYNCHRO 45 // synchro task: L1S reset
422 #else //#if ((REL99 == 1) && (FF_BHO == 1))
423 #define SYNCHRO 44 // synchro task: L1S reset
424 #endif //#if ((REL99 == 1) && (FF_BHO == 1))
425 //END_GPRS_TASKS/
426
427 #endif
428
429 #if (GSM_IDLE_RAM != 0)
430 #define SIZE_TAB_L1S_MONITOR (((NBR_DL_L1S_TASKS-1) >> 5) + 1)
431 #endif
432
433 //------------------------------------
434 // LAYER 1 API
435 //------------------------------------
436 #define MCSI_PORT1 0
437 #define MCSI_PORT2 1
438
439
440 #if (W_A_DSP_PR20037 == 1)
441 //---------------------------------
442 // DSP vocoder Enable/ Disable
443 //---------------------------------
444 #if (FF_L1_TCH_VOCODER_CONTROL == 1)
445 #if (L1_VOCODER_IF_CHANGE == 0)
446 #define TCH_VOCODER_DISABLE_REQ 0
447 #define TCH_VOCODER_ENABLE_REQ 1
448 #define TCH_VOCODER_ENABLED 2
449 #define TCH_VOCODER_DISABLED 3
450 #else
451 #define TCH_VOCODER_RESET_COMMAND 0
452 #define TCH_VOCODER_ENABLE_COMMAND 1
453 #define TCH_VOCODER_DISABLE_COMMAND 2
454 #endif // L1_VOCODER_IF_CHANGE == 0
455
456 #if (W_A_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE ==1)
457 // Number of TDMA wait frames until the DSP output is steady
458 #define DSP_VOCODER_ON_TRANSITION 165
459 #endif
460 #endif // FF_L1_TCH_VOCODER_CONTROL
461 #endif // W_A_DSP_PR20037
462
463
464 //---------------------------------
465 // Handover Finished cause defines.
466 //---------------------------------
467 #define HO_COMPLETE 0
468 #define HO_TIMEOUT 1
469 #if ((REL99 == 1) && (FF_BHO == 1))
470 #define HO_FB_FAIL 2
471 #define HO_SB_FAIL 3
472
473 #define NORMAL_HANDOVER 0
474 #define BLIND_HANDOVER 1
475 #endif
476
477 //---------------------------------
478 // FB detection algorithm defines.
479 //---------------------------------
480 #define FB_MODE_0 0 // FB detec. mode 0.
481 #define FB_MODE_1 1 // FB detec. mode 1.
482
483 //---------------------------------
484 // SB acquisition phase.
485 //---------------------------------
486 #if ((REL99 == 1) && ((FF_BHO == 1) || (FF_RTD == 1)))
487 #define SB_ACQUISITION_PHASE 5
488 #endif
489
490 //---------------------------------
491 // AFC control defines.
492 //---------------------------------
493 #define AFC_INIT 1
494 #define AFC_OPEN_LOOP 2
495 #define AFC_CLOSED_LOOP 3
496
497 // For VCXO algo.
498 #if (VCXO_ALGO)
499 #define AFC_INIT_CENTER 4
500 #define AFC_INIT_MAX 5
501 #define AFC_INIT_MIN 6
502 #endif
503
504 #if 0
505 // For Locosto
506 #define L1_AFC_MANUAL_MODE 0
507 #define L1_AFC_SCRIPT_MODE 1
508 #define L1_AFC_NONE 2
509
510 #define L1_CTL_ZERO_IF 2
511 #define L1_CTL_LOW_IF 1
512
513 #define L1_IL_INVALID 0
514 #define L1_IL_VALID 1
515
516 // End Locosto
517 #endif
518
519 //---------------------------------
520 // TOA control defines.
521 //---------------------------------
522 #define TOA_INIT 1
523 #define TOA_RUN 2
524 #if (TOA_ALGO == 2)
525 // In this version TOA is refreshed every 2 seconds
526 #define L1_TOA_UPDATE_TIME ((UWORD32)(433))
527 #endif
528
529 //---------------------------------
530 // Neighbour Synchro possible status.
531 //---------------------------------
532 #define NSYNC_FREE 0
533 #define NSYNC_PENDING 1
534 #define NSYNC_COMPLETED 2
535 #if (L1_12NEIGH ==1)
536 #define NSYNC_WAIT 3
537 #endif
538
539 /************************************/
540 /* Layer 1 constants declaration... */
541 /************************************/
542 #define MAX_FN ((UWORD32)26*51*2048)
543
544 #if L1_GPRS
545 #define MAX_BLOCK_ID ((UWORD32) (3 * (UWORD32) (MAX_FN / 13))) // Block ID corresponding to fn = FN MAX
546 #endif
547
548 #if FF_L1_IT_DSP_DTX
549 // dtx_status states
550 #define DTX_AVAILABLE 0
551 #define DTX_AWAITED 1
552 #define DTX_IT_DSP 2
553
554 // Latency time for Fast DTX availability upon channel start (TDMAs)
555 #define FAST_DTX_LATENCY 10 //chaged from value-4 -CQ- 74387
556 #endif
557
558 //--------------------------------------------------------
559 // standard specific constants used in l1_config.std.xxx
560 //--------------------------------------------------------
561 #if (L1_FF_MULTIBAND == 0)
562
563 // GSM
564 #define FIRST_ARFCN_GSM 1 // 1st arfcn is 1
565 #define NBMAX_CARRIER_GSM 124 // 124 for GSM, 174 for E_GSM, 374 for DCS1800.
566 #define MAX_TXPWR_GSM 19 // lowest power ctrl level value in GSM band
567 // GSM_E
568 #define FIRST_ARFCN_EGSM 1 // 1st arfcn is 1
569 #define NBMAX_CARRIER_EGSM 174 // 174 carriers for GSM_E.
570 #define MAX_TXPWR_EGSM 19 // lowest power ctrl level value in GSM-E band
571 // PCS1900
572 #define FIRST_ARFCN_PCS 512 // 1st arfcn is 512
573 #define NBMAX_CARRIER_PCS 299 // 299 carriers for PCS1900.
574 #define MAX_TXPWR_PCS 15 // lowest power ctrl level value in PCS band
575 #define TXPWR_TURNING_POINT_PCS 21
576 // DCS1800
577 #define FIRST_ARFCN_DCS 512 // 1st arfcn is 512
578 #define NBMAX_CARRIER_DCS 374 // 374 carriers for DCS1800.
579 #define MAX_TXPWR_DCS 15 // lowest power ctrl level value in DCS band
580 #define TXPWR_TURNING_POINT_DCS 28
581 // GSM850
582 #define FIRST_ARFCN_GSM850 128 // 1st arfcn is 128
583 #define NBMAX_CARRIER_GSM850 124 // 124 carriers for GSM850
584 #define NBMEAS_GSM850 3 // 3 measurement per frame TBD
585 #define MAX_TXPWR_GSM850 19 // lowest power ctrl level value in GSM band
586 // DUAL
587 #define FIRST_DCS_INDEX_DUAL 125 // 1st DCS index within the 498 continu list
588 #define NBMAX_CARRIER_DUAL 124+374 // 374 carriers for DCS1800 + 124 carriers for GSM900 Band
589 #define TXPWR_TURNING_POINT_DUAL 28
590 // DUALEXT
591 #define FIRST_DCS_INDEX_DUALEXT 175 // 1st DCS index within the 548 continu list
592 #define NBMAX_CARRIER_DUALEXT 174+374 // 374 carriers for DCS1800 + 174 carriers for E-GSM900 Band
593 #define TXPWR_TURNING_POINT_DUALEXT 28
594 // DUAL_US
595 #define FIRST_ARFCN_GSM850_DUAL_US 1 // 1st GSM850 index within the 423 continu list
596 #define FIRST_PCS_INDEX_DUAL_US 125 // 1st PCS index within the 423 continu list
597 #define NBMAX_CARRIER_DUAL_US 124+299 // 299 carriers for PCS1900 + 124 carriers for GSM850\ Band
598 #define NBMEAS_DUAL_US 4 // 4 measurements per frames.
599 #define TXPWR_TURNING_POINT_DUAL_US 28 // TBD
600
601
602 #define NBMAX_CARRIER NBMAX_CARRIER_DUALEXT //used in arrays for power measurement
603 //non optimized!!! (dynamic memory allocation to optimize)
604 #define BAND1 1
605 #define BAND2 2
606
607 #else // L1_FF_MULTIBAND == 1 below
608
609 /***** GSM Band Identifiers to be communicated to the L3, these indexes are fixed *****************/
610 #define PGSM900 0
611 #define GSM850 1
612 #define PCS1900 2
613 #define DCS1800 3
614 #define GSM750 4
615 #define GSM480 5
616 #define GSM450 6
617 #define T_GSM380 7
618 #define T_GSM410 8
619 #define T_GSM900 9
620 #define EGSM900 10
621 #define RGSM900 11
622
623 /***** PGSM900, EGSM900 and RGSM900 are seen a single band GSM900 **********************************/
624 #define GSM900 12
625
626 /***** The total number of bands specified in the 3GPP Specs ***************************************/
627 #define NB_MAX_GSM_BANDS 12
628
629 #if 0
630 /********************************* Physical_band_ids to be supported Definition *******************/
631 #define RGSM900_SUPPORTED 0
632 #define EGSM900_SUPPORTED 1
633 #define PGSM900_SUPPORTED 0
634 #define GSM850_SUPPORTED 1
635 #define PCS1900_SUPPORTED 1
636 #define DCS1800_SUPPORTED 1
637 #define GSM750_SUPPORTED 0
638 #define GSM710_SUPPORTED 0
639 #define GSM480_SUPPORTED 0
640 #define T_GSM380_SUPPORTED 0
641 #define T_GSM410_SUPPORTED 0
642 #define GSM450_SUPPORTED 0
643 #define T_GSM900_SUPPORTED 0
644
645 /***** Bands to be supported Eror Cases ******************************************/
646
647 #if (RGSM900_SUPPORTED + EGSM900_SUPPORTED + PGSM900_SUPPORTED > 1)
648 #error " Only one of the RGSM900 or EGSM900 or PGSM900 bands is supported"
649 #endif/*if(RGSM900_SUPPORTED + EGSM900_SUPPORTED + PGSM900_SUPPORTED > 1)*/
650
651
652 /***** GSM900_SUPPORTED means one of P, E or R GSM900 is supported ***/
653 #if ((PGSM900_SUPPORTED == 1) || (EGSM900_SUPPORTED == 1) || (RGSM900_SUPPORTED == 1))
654 #define GSM900_SUPPORTED 1
655 #endif
656
657 #endif // if 0
658
659 /***** Number of Physical Bands Supported by the L1 Calculation, this constant is less than NB_MAX_GSM_BANDS**********/
660 #define NB_MAX_SUPPORTED_BANDS (GSM900_SUPPORTED +\
661 GSM850_SUPPORTED + \
662 PCS1900_SUPPORTED + \
663 DCS1800_SUPPORTED + \
664 GSM750_SUPPORTED + \
665 GSM480_SUPPORTED + \
666 GSM450_SUPPORTED + \
667 T_GSM410_SUPPORTED + \
668 T_GSM380_SUPPORTED + \
669 T_GSM900_SUPPORTED)
670
671 /*****
672 EGSM and RGSM have two separate ranges of ARFCN's that are considered by L1 as
673 separate bands. Hence number of supported bands is one more if E or R GSM900 is
674 supported.
675 *****/
676 #if (PGSM900_SUPPORTED == 1)// This means E or R GSM900 is not supported
677 #define NB_MAX_EFFECTIVE_SUPPORTED_BANDS NB_MAX_SUPPORTED_BANDS
678 #endif
679
680 #if ((EGSM900_SUPPORTED == 1) || (RGSM900_SUPPORTED == 1))
681 #define NB_MAX_EFFECTIVE_SUPPORTED_BANDS (NB_MAX_SUPPORTED_BANDS + 1)
682 #endif
683
684 #if 0
685 /*The following constants allows the indexing of the physical bands in the MULTIBAND rf table located in l1_cust.c*/
686 /*The bands positionning order is related to the bands ENUMERATION here below*/
687 /*Changing the bands positions in this table implies changing the the band ENUMERATION in the file l1_const.h*/
688 /*Changing the the band ENUMERATION in the file l1_const.h implies changing the bands positions in the table below*/
689 enum
690 {
691 #if (GSM900_SUPPORTED == 1)
692 GSM900_ID,
693 #endif /*if (GSM900_SUPPORTED == 1)*/
694
695 #if (GSM850_SUPPORTED == 1)
696 GSM850_ID,
697 #endif /*if (GSM850_SUPPORTED == 1)*/
698
699 #if (DCS1800_SUPPORTED == 1)
700 DCS1800_ID,
701 #endif /*if (DCS1800_SUPPORTED == 1)*/
702
703 #if (PCS1900_SUPPORTED == 1)
704 PCS1900_ID,
705 #endif /*if (PCS1900_SUPPORTED == 1)*/
706
707 #if (GSM750_SUPPORTED == 1)
708 GSM750_ID,
709 #endif /*if (GSM750_SUPPORTED == 1)*/
710
711 #if (GSM480_SUPPORTED == 1)
712 GSM480_ID,
713 #endif /*if (GSM480_SUPPORTED == 1)*/
714
715 #if GSM450_SUPPORTED
716 GSM450_ID,
717 #endif /*if (GSM450_SUPPORTED == 1)*/
718
719 #if (T_GSM410_SUPPORTED == 1)
720 T_GSM410_ID,
721 #endif /*if (T_GSM410_SUPPORTED == 1)*/
722
723 #if (T_GSM380_SUPPORTED == 1)
724 T_GSM380_ID,
725 #endif /*if (T_GSM380_SUPPORTED == 1)*/
726
727 #if (T_GSM900_SUPPORTED == 1)
728 T_GSM900_ID,
729 #endif /*if (T_GSM900_SUPPORTED == 1)*/
730 };
731 #endif
732 /***********************************Calculation of the number of carriers per Effective Band*********/
733 #if 0
734
735 #if (PGSM900_SUPPORTED == 1)
736 #define NB_CARRIER_900_LOW_SUB_BAND 124
737 #define NB_CARRIER_900_HIGH_SUB_BAND 0
738 #endif /*if (PGSM900_SUPPORTED == 1)*/
739
740 #if (EGSM900_SUPPORTED == 1)
741 #define NB_CARRIER_900_LOW_SUB_BAND 125
742 #define NB_CARRIER_900_HIGH_SUB_BAND 49
743 #endif /*if (EGSM900_SUPPORTED == 1)*/
744
745 #if (RGSM900_SUPPORTED == 1)
746 #define NB_CARRIER_900_LOW_SUB_BAND 125
747 #define NB_CARRIER_900_HIGH_SUB_BAND 69
748 #endif /*if (RGSM900_SUPPORTED == 1)*/
749
750 #define NB_CARRIER_850 124
751 #define NB_CARRIER_1800 344
752 #define NB_CARRIER_1900 299
753 #define NB_CARRIER_750 74
754 #define NB_CARRIER_480 35
755 #define NB_CARRIER_450 35
756 #define NB_CARRIER_T_410 47
757 #define NB_CARRIER_T_380 47
758 #define NB_CARRIER_T_900 27
759
760 /****** NBMAX_CARRIER is the total number of carriers supported based on band support *********/
761
762 #define NBMAX_CARRIER (((NB_CARRIER_900_LOW_SUB_BAND + NB_CARRIER_900_HIGH_SUB_BAND) * GSM900_SUPPORTED) \
763 + (NB_CARRIER_850 * GSM850_SUPPORTED) \
764 + (NB_CARRIER_1800 * DCS1800_SUPPORTED)\
765 + (NB_CARRIER_1900 * PCS1900_SUPPORTED) \
766 + (NB_CARRIER_750 * GSM750_SUPPORTED) \
767 + (NB_CARRIER_480 * GSM480_SUPPORTED) \
768 + (NB_CARRIER_450 * GSM450_SUPPORTED) \
769 + (NB_CARRIER_T_410 * T_GSM410_SUPPORTED) \
770 + (NB_CARRIER_T_380 * T_GSM380_SUPPORTED) \
771 + (NB_CARRIER_T_900 * T_GSM900_SUPPORTED))
772
773
774 /**
775 The multiband frequency numbers exchanged across L3-L1 I/F are the 3GPP ARFCN numbers
776 with exceptiopn of 1900 where the numbers start from 1024 onwards. This results in
777 holes in the numbering given from L3 and hence cannot be used for indexing arrays of
778 carriers. To index arrays the frequency numbers from L3 are translated to 'operative radio
779 frequencies'. For any band configuration supported, this is a continuos number from
780 0 to NBMAX_CARRIER (The sum of number of carriers in all supported bands)
781 The defines below are for finding the first operative frequency corresponding to each band
782 **/
783
784 #define FIRST_OPERATIVE_RADIO_FREQ_900_LOW_SUB_BAND 0
785 #define FIRST_OPERATIVE_RADIO_FREQ_900_HIGH_SUB_BAND (FIRST_OPERATIVE_RADIO_FREQ_900_LOW_SUB_BAND + NB_CARRIER_900_LOW_SUB_BAND) * GSM900_SUPPORTED
786 #define FIRST_OPERATIVE_RADIO_FREQ_850 (FIRST_OPERATIVE_RADIO_FREQ_900_HIGH_SUB_BAND + NB_CARRIER_900_HIGH_SUB_BAND) * GSM850_SUPPORTED
787 #define FIRST_OPERATIVE_RADIO_FREQ_1900 (FIRST_OPERATIVE_RADIO_FREQ_850 + NB_CARRIER_850) * PCS1900_SUPPORTED
788 #define FIRST_OPERATIVE_RADIO_FREQ_1800 (FIRST_OPERATIVE_RADIO_FREQ_1900 + NB_CARRIER_1900) * DCS1800_SUPPORTED
789 #define FIRST_OPERATIVE_RADIO_FREQ_750 (FIRST_OPERATIVE_RADIO_FREQ_1800 + NB_CARRIER_1800) * GSM750_SUPPORTED
790 #define FIRST_OPERATIVE_RADIO_FREQ_480 (FIRST_OPERATIVE_RADIO_FREQ_750 + NB_CARRIER_750) * GSM480_SUPPORTED
791 #define FIRST_OPERATIVE_RADIO_FREQ_450 (FIRST_OPERATIVE_RADIO_FREQ_480 + NB_CARRIER_480) * GSM450_SUPPORTED
792 #define FIRST_OPERATIVE_RADIO_FREQ_T_410 (FIRST_OPERATIVE_RADIO_FREQ_450 + NB_CARRIER_450) * T_GSM410_SUPPORTED
793 #define FIRST_OPERATIVE_RADIO_FREQ_T_380 (FIRST_OPERATIVE_RADIO_FREQ_T_410 + NB_CARRIER_T_410) * T_GSM380_SUPPORTED
794 #define FIRST_OPERATIVE_RADIO_FREQ_T_900 (FIRST_OPERATIVE_RADIO_FREQ_T_380 + NB_CARRIER_T_380) * T_GSM900_SUPPORTED
795
796 /********************** Definition of the first radio freqs as per L3-L1 interface *********/
797
798 #if (PGSM900_SUPPORTED == 1)
799 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 1
800 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 0
801 #endif /*if (PGSM900_SUPPORTED == 1)*/
802
803 #if (EGSM900_SUPPORTED == 1)
804 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 0
805 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 975
806 #endif /*if (EGSM900_SUPPORTED == 1)*/
807
808 #if (RGSM900_SUPPORTED == 1)
809 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 0
810 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 955
811 #endif /* (RGSM900_SUPPORTED == 1)*/
812
813 #define FIRST_RADIO_FREQ_850 128
814 #define FIRST_RADIO_FREQ_1800 512
815 #define FIRST_RADIO_FREQ_1900 1024
816 #define FIRST_TPU_RADIO_FREQ_1900 512 /* TBD The GSM1900 is the unique band in which the FIRST_TPU_RADIO is not equal to FIRST_RADIO_FREQ*/
817
818 #endif // if 0
819
820 #endif // L1_FF_MULTIBAND == 0
821
822 #if (L1_FF_MULTIBAND == 0)
823 #else
824 /* Prototypes */
825
826 #define l1_multiband_radio_freq_convert_into_effective_band_id(radio_freq) \
827 rf_convert_rffreq_to_l1subband(radio_freq)
828
829 #define l1_multiband_radio_freq_convert_into_physical_band_id(radio_freq) \
830 ((UWORD8)rf_convert_l1freq_to_rf_band_idx(rf_convert_rffreq_to_l1freq(radio_freq)))
831
832 #define l1_multiband_radio_freq_convert_into_operative_radio_freq(radio_freq) \
833 rf_convert_rffreq_to_l1freq(radio_freq)
834
835 #if (CODE_VERSION != SIMULATION)
836 UWORD8 rf_convert_rffreq_to_l1subband(UWORD16 rf_freq);
837 UWORD8 rf_convert_l1freq_to_l1subband(UWORD16 l1_freq);
838 WORD8 rf_convert_l1freq_to_rf_band_idx(UWORD16 l1_freq);
839 UWORD16 rf_convert_l1freq_to_rffreq(UWORD16 l1_freq );
840 UWORD16 rf_convert_l1freq_to_rffreq_rfband(UWORD16 l1_freq, WORD8 *rf_band_index);
841 UWORD16 rf_convert_l1freq_to_arfcn_rfband(UWORD16 l1_freq, WORD8 *rf_band_index);
842 UWORD16 rf_convert_rffreq_to_l1freq(UWORD16 rf_freq);
843 UWORD16 rf_convert_rffreq_to_l1freq_rfband(UWORD16 rf_freq, WORD8 *rf_band_index);
844 UWORD16 rf_convert_tmarfcn_to_l1freq(UWORD16 tm_arfcn, WORD8 * error_flag);
845 #endif
846
847 /* RF defines */
848 /******************************Physical_band_ids to be supported Definition****************************************/
849 #define RGSM900_SUPPORTED 0
850 #define PGSM900_SUPPORTED 0
851 #define GSM750_SUPPORTED 0
852 #define GSM710_SUPPORTED 0
853 #define GSM480_SUPPORTED 0
854 #define T_GSM380_SUPPORTED 0
855 #define T_GSM410_SUPPORTED 0
856 #define GSM450_SUPPORTED 0
857 #define T_GSM900_SUPPORTED 0
858 #if 0
859 #if (RF_BAND_SYSTEM_INDEX == RF_DCS1800_850_DUALBAND)
860 #define GSM900_SUPPORTED 0
861 #define GSM850_SUPPORTED 1
862 #define PCS1900_SUPPORTED 0
863 #define DCS1800_SUPPORTED 1
864 #elif (RF_BAND_SYSTEM_INDEX == RF_PCS1900_900_DUALBAND)
865 #define GSM900_SUPPORTED 1
866 #define GSM850_SUPPORTED 0
867 #define PCS1900_SUPPORTED 1
868 #define DCS1800_SUPPORTED 0
869 #elif (RF_BAND_SYSTEM_INDEX == RF_US_DUALBAND)
870 #define GSM900_SUPPORTED 0
871 #define GSM850_SUPPORTED 1
872 #define PCS1900_SUPPORTED 1
873 #define DCS1800_SUPPORTED 0
874 #elif (RF_BAND_SYSTEM_INDEX == RF_US_TRIBAND)
875 #define GSM900_SUPPORTED 0
876 #define GSM850_SUPPORTED 1
877 #define PCS1900_SUPPORTED 1
878 #define DCS1800_SUPPORTED 1
879 #elif (RF_BAND_SYSTEM_INDEX == RF_EU_DUALBAND)
880 #define GSM900_SUPPORTED 1
881 #define GSM850_SUPPORTED 0
882 #define PCS1900_SUPPORTED 0
883 #define DCS1800_SUPPORTED 1
884 #elif (RF_BAND_SYSTEM_INDEX == RF_EU_TRIBAND)
885 #define GSM900_SUPPORTED 1
886 #define GSM850_SUPPORTED 0
887 #define PCS1900_SUPPORTED 1
888 #define DCS1800_SUPPORTED 1
889 #elif (RF_BAND_SYSTEM_INDEX == RF_QUADBAND)
890 #define GSM900_SUPPORTED 1
891 #define GSM850_SUPPORTED 1
892 #define PCS1900_SUPPORTED 1
893 #define DCS1800_SUPPORTED 1
894 #endif
895 #endif // if 0 TBD
896 #define GSM900_SUPPORTED 1
897 #define GSM850_SUPPORTED 1
898 #define PCS1900_SUPPORTED 1
899 #define DCS1800_SUPPORTED 1
900
901 /* The physical RF bands are enumerated in order of increasing frequencies */
902 /* The same order must be used in l1_rf61, l1_cust, and l1_const */
903 enum
904 {
905 #if (GSM900_SUPPORTED == 1)
906 RF_GSM900,
907 #endif
908 #if (GSM850_SUPPORTED == 1)
909 RF_GSM850,
910 #endif
911 #if (DCS1800_SUPPORTED == 1)
912 RF_DCS1800,
913 #endif
914 #if (PCS1900_SUPPORTED == 1)
915 RF_PCS1900,
916 #endif
917 RF_NB_SUPPORTED_BANDS /* The number of supported physical bands */
918 };
919
920 #if GSM900_SUPPORTED
921 #define RF_NB_SUBBANDS (RF_NB_SUPPORTED_BANDS + 1)
922 #else
923 #define RF_NB_SUBBANDS (RF_NB_SUPPORTED_BANDS)
924 #endif
925
926 /***********************************Calculation of the number of carriers per Effective Band*********/
927 #define NB_CHAN_900L 125
928 #define NB_CHAN_900H 49
929 #define NB_CHAN_850 124
930 #define NB_CHAN_1800 374
931 #define NB_CHAN_1900 299
932
933 /**
934 The multiband frequency numbers exchanged across L3-L1 I/F are the 3GPP ARFCN numbers
935 except for DCS1900 where the numbers start from 1024 onwards, i.e. ARFCN+512.
936 L1 cannot have holes in the numbering, so a different L1 internal one is needed to build arrays in L1.
937 This numbering is similar to ARFCN numbering, except the high part of GSM900 channel numbers
938 are mapped between low part of GSM900 numbers and the GSM850 numbers.
939 For any band configuration supported, this is a continuos number from
940 0 to NB_CARRIERS (The sum of number of carriers in all supported bands)
941 **/
942 /****** L1_NB_CARRIER is the total number of carriers supported based on band support *********/
943 #define L1_FREQ_1ST_900L 0
944 #define L1_FREQ_1ST_900H (L1_FREQ_1ST_900L + NB_CHAN_900L * GSM900_SUPPORTED)
945 #define L1_FREQ_1ST_850 (L1_FREQ_1ST_900H + NB_CHAN_900H * GSM900_SUPPORTED)
946 #define L1_FREQ_1ST_1800 (L1_FREQ_1ST_850 + NB_CHAN_850 * GSM850_SUPPORTED)
947 #define L1_FREQ_1ST_1900 (L1_FREQ_1ST_1800 + NB_CHAN_1800 * DCS1800_SUPPORTED)
948 #define NBMAX_CARRIER (L1_FREQ_1ST_1900 + NB_CHAN_1900 * PCS1900_SUPPORTED)
949
950 #define ARFCN_1ST_900L 0
951 #define ARFCN_1ST_900H 975
952 #define ARFCN_1ST_850 128
953 #define ARFCN_1ST_1800 512
954 #define ARFCN_1ST_1900 512
955
956 #define RF_FREQ_1ST_900L ARFCN_1ST_900L
957 #define RF_FREQ_1ST_900H ARFCN_1ST_900H
958 #define RF_FREQ_1ST_850 ARFCN_1ST_850
959 #define RF_FREQ_1ST_1800 ARFCN_1ST_1800
960 #define RF_FREQ_1ST_1900 (ARFCN_1ST_1900 + 512)
961
962
963 typedef struct
964 {
965 UWORD16 first_rf_freq;
966 UWORD16 last_rf_freq;
967 UWORD16 first_l1_freq;
968 WORD16 l1freq2rffreq;
969 }
970 T_MULTIBAND_CONVERT;
971
972 typedef struct
973 {
974 UWORD8 power_class;
975 UWORD8 tx_turning_point;
976 UWORD8 max_txpwr;
977 UWORD8 gsm_band_identifier;
978 char* name;
979 }
980 T_MULTIBAND_RF;
981
982 #endif /*if (L1_FF_MULTIBAND == 1)*/
983
984
985
986 #define NO_TXPWR 255 // sentinal value used with UWORD8 type.
987
988
989 //--------------------------------------------------------
990 // Receive level values.
991 //--------------------------------------------------------
992 #define RXLEV63 63 // max value for RXLEV.
993 #define IL_MIN 240 // minimum input level is -120 dbm.
994
995 /*--------------------------------------------------------*/
996 /* Max value for GSM Paging Parameters. */
997 /*--------------------------------------------------------*/
998 #define MAX_AG_BLKS_RES_NCOMB 7
999 #define MAX_AG_BLKS_RES_COMB 2
1000 #define MAX_PG_BLOC_INDEX_NCOMB 8
1001 #define MAX_PG_BLOC_INDEX_COMB 2
1002 #define MAX_BS_PA_MFRMS 9
1003
1004 /*--------------------------------------------------------*/
1005 /* Position of different blocs in a MF51. */
1006 /*--------------------------------------------------------*/
1007 #define NBCCH_POSITION 2 // Normal BCCH position in a MF51.
1008 #define EBCCH_POSITION 6 // Extended BCCH position in a MF51.
1009 #define CCCH_0 6
1010 #define CCCH_1 12
1011 #define CCCH_2 16
1012 #define CCCH_3 22
1013 #define CCCH_4 26
1014 #define CCCH_5 32
1015 #define CCCH_6 36
1016 #define CCCH_7 42
1017 #define CCCH_8 46
1018 #define FB_0 0
1019 #define FB_1 10
1020 #define FB_2 20
1021 #define FB_3 30
1022 #define FB_4 40
1023 #define SB_0 1
1024 #define SB_1 11
1025 #define SB_2 21
1026 #define SB_3 31
1027 #define SB_4 41
1028
1029 /*--------------------------------------------------------*/
1030 /* System information position in the "si_bit_map". */
1031 /*--------------------------------------------------------*/
1032 #define SI_1 0x0001
1033 #define SI_2 0x0002
1034 #define SI_2BIS 0x0100
1035 #define SI_2TER 0x0200
1036 #define SI_3 0x0004
1037 #define SI_4 0x0008
1038 #define SI_7 0x0040
1039 #define SI_8 0x0080
1040 #define ALL_SI SI_1 | SI_2 | SI_2BIS | SI_2TER | SI_3 | SI_4 | SI_7 | SI_8
1041
1042 /*--------------------------------------------------------*/
1043 /* CBCH position in the "smscb_bit_map". */
1044 /*--------------------------------------------------------*/
1045 #define CBCH_TB1 0x0001
1046 #define CBCH_TB2 0x0002
1047 #define CBCH_TB3 0x0004
1048 #define CBCH_TB5 0x0008
1049 #define CBCH_TB6 0x0010
1050 #define CBCH_TB7 0x0020
1051
1052 #if FF_TBF
1053 /*--------------------------------------------------------*/
1054 /* Access burst types on the RACH/PRACH */
1055 /*--------------------------------------------------------*/
1056 #define ACC_BURST_8 0
1057 #define ACC_BURST_11 1
1058 #define ACC_BURST_11_TS1 2
1059 #define ACC_BURST_11_TS2 3
1060 #endif
1061 #define CBCH_CONTINUOUS_READING 0
1062 #define CBCH_SCHEDULED 1
1063 #define CBCH_INACTIVE 2
1064
1065 /*--------------------------------------------------------*/
1066 /* Channel type definitions for DEDICATED mode. */
1067 /*--------------------------------------------------------*/
1068
1069 //TABLE/ CHAN TYPE
1070 #define INVALID_CHANNEL 0
1071 #define TCH_F 1
1072 #define TCH_H 2
1073 #define SDCCH_4 3
1074 #define SDCCH_8 4
1075 //END_TABLE/
1076
1077 /*--------------------------------------------------------*/
1078 /* Channel mode definitions for DEDICATED. */
1079 /*--------------------------------------------------------*/
1080 #define SIG_ONLY_MODE 0 // signalling only
1081 #define TCH_FS_MODE 1 // speech full rate
1082 #define TCH_HS_MODE 2 // speech half rate
1083 #define TCH_96_MODE 3 // data 9,6 kb/s
1084 #define TCH_48F_MODE 4 // data 4,8 kb/s full rate
1085 #define TCH_48H_MODE 5 // data 4,8 kb/s half rate
1086 #define TCH_24F_MODE 6 // data 2,4 kb/s full rate
1087 #define TCH_24H_MODE 7 // data 2,4 kb/s half rate
1088 #define TCH_EFR_MODE 8 // enhanced full rate
1089 #define TCH_144_MODE 9 // data 14,4 kb/s half rate
1090 #if (AMR == 1)
1091 #define TCH_AHS_MODE 10 // adaptative speech half rate
1092 #define TCH_AFS_MODE 11 // adaptative speech full rate
1093 #endif
1094
1095
1096 /*--------------------------------------------------------*/
1097 /* Layer 1 functional modes for "mode" setting pupose. */
1098 /*--------------------------------------------------------*/
1099 #define CS_MODE0 0 // functional mode at reset.
1100 #define CS_MODE 1 // functional mode in CELL SELECTION.
1101 #define I_MODE 2 // functional mode in IDLE.
1102 #define CON_EST_MODE1 3 // functional mode in ACCESS (before 1st RA, for TOA convergency).
1103 #define CON_EST_MODE2 4 // functional mode in ACCESS (after 1st RA).
1104 #define DEDIC_MODE 5 // functional mode in DEDICATED.
1105 #define DEDIC_MODE_HALF_DATA 6 // used only for TOA histogram length purpose.
1106 #if L1_GPRS
1107 #define PACKET_TRANSFER_MODE 7 //
1108 #endif
1109
1110 /*--------------------------------------------------------*/
1111 /* Error causes for MPHC_NO_BCCH message. */
1112 /*--------------------------------------------------------*/
1113 #define NO_FB_SB 0 // FB or SB not found.
1114 #define NCC_NOT_PERMITTED 1 // Synchro OK! but PLMN not permitted.
1115
1116 /*--------------------------------------------------------*/
1117 /* MFTAB constants and flags. */
1118 /*--------------------------------------------------------*/
1119 #define L1_MAX_FCT 5 /* Max number of fctions in a frame */
1120 #define MFTAB_SIZE 20
1121
1122 /********************************/
1123 /* Software register/flags */
1124 /* definitions. */
1125 /********************************/
1126 #define NO_CTRL (TRUE_L << 0)
1127 #define CTRL_MS (TRUE_L << 1)
1128 #define CTRL_TX (TRUE_L << 2)
1129 #define CTRL_RX (TRUE_L << 3)
1130 #define CTRL_ADC (TRUE_L << 4)
1131 #define CTRL_SYNC (TRUE_L << 5)
1132 #define CTRL_ABORT (TRUE_L << 6)
1133 #define CTRL_TEST (TRUE_L << 7)
1134 #define CTRL_SYCB (TRUE_L << 8)
1135 #define CTRL_FB_ABORT (TRUE_L << 9)
1136 #if L1_GPRS
1137 #define CTRL_PRACH (TRUE_L << 10)
1138 #define CTRL_SYSINGLE (TRUE_L << 11)
1139 #endif
1140 #if ((REL99 == 1) && (FF_BHO == 1))
1141 #define CTRL_FBSB_ABORT (TRUE_L << 12)
1142 #endif
1143
1144 /********************************/
1145 /* MISC management */
1146 /********************************/
1147 #define GSM_CTL 0 // DSP ctrl for a GSM task
1148 #define MISC_CTL 1 // DSP ctrl for a MISC task
1149 #define GSM_MISC_CTL 2 // DSP ctrl for a GSM and MISC tasks
1150
1151 /********************************/
1152 /* TOA management */
1153 /********************************/
1154 #define ISH_INVALID 128 // value used to disable the toa offset
1155
1156 /********************************/
1157 /* AGC management */
1158 /********************************/
1159 #define DPAGC_FIFO_LEN 4
1160 #define DPAGC_MAX_FLAG 1
1161 #if (AMR == 1)
1162 #define DPAGC_AMR_FIFO_LEN 4
1163 #endif
1164
1165 /********************************/
1166 /* ADC management */
1167 /********************************/
1168 #define ADC_DISABLED 0x0000
1169 // Traffic part
1170 #define ADC_MASK_RESET_TRAFFIC 0xFF00
1171 #define ADC_NEXT_TRAFFIC_UL 0x0001
1172 #define ADC_EACH_TRAFFIC_UL 0x0002
1173 #define ADC_NEXT_TRAFFIC_DL 0x0004
1174 #define ADC_EACH_TRAFFIC_DL 0x0008
1175 #define ADC_EACH_RACH 0x0010
1176
1177
1178 // Idle part
1179 #define ADC_MASK_RESET_IDLE 0x00FF
1180 #define ADC_NEXT_NORM_PAGING 0x0100
1181 #define ADC_EACH_NORM_PAGING 0x0200
1182 #define ADC_NEXT_MEAS_SESSION 0x0400
1183 #define ADC_EACH_MEAS_SESSION 0x0800
1184 #define ADC_NEXT_NORM_PAGING_REORG 0x1000
1185 #define ADC_EACH_NORM_PAGING_REORG 0x2000
1186
1187
1188 // CS_MODE0 part
1189 #define ADC_NEXT_CS_MODE0 0x4000
1190 #define ADC_EACH_CS_MODE0 0x8000
1191
1192
1193 /********************************/
1194 /* Neighbor BCCH priorities */
1195 /********************************/
1196
1197 #define TOP_PRIORITY 0
1198 #define HIGH_PRIORITY 1
1199 #define NORMAL_PRIORITY 2
1200
1201 /********************************/
1202 /* Driver constants definitions */
1203 /********************************/
1204
1205 // Used to identify the 1st and last burst for offset management in Drivers.
1206 #define BURST_1 0
1207 #define BURST_2 1
1208 #define BURST_3 2
1209 #define BURST_4 3
1210
1211
1212 // Identifier for all DSP tasks.
1213 // ...RX & TX tasks identifiers.
1214 #define NO_DSP_TASK 0 // No task.
1215 #define NP_DSP_TASK 21 // Normal Paging reading task.
1216 #define EP_DSP_TASK 22 // Extended Paging reading task.
1217 #define NBS_DSP_TASK 19 // Normal BCCH serving reading task.
1218 #define EBS_DSP_TASK 20 // Extended BCCH serving reading task.
1219 #define NBN_DSP_TASK 17 // Normal BCCH neighbour reading task.
1220 #define EBN_DSP_TASK 18 // Extended BCCH neighbour reading task.
1221 #define ALLC_DSP_TASK 24 // CCCH reading task while performing FULL BCCH/CCCH reading task.
1222 #define CB_DSP_TASK 25 // CBCH reading task.
1223 #define DDL_DSP_TASK 26 // SDCCH/D (data) reading task.
1224 #define ADL_DSP_TASK 27 // SDCCH/A (SACCH) reading task.
1225 #define DUL_DSP_TASK 12 // SDCCH/D (data) transmit task.
1226 #define AUL_DSP_TASK 11 // SDCCH/A (SACCH) transmit task.
1227 #define RACH_DSP_TASK 10 // RACH transmit task.
1228 #define TCHT_DSP_TASK 13 // TCH Traffic data DSP task id (RX or TX)
1229 #define TCHA_DSP_TASK 14 // TCH SACCH data DSP task id (RX or TX)
1230 #define TCHD_DSP_TASK 28 // TCH Traffic data DSP task id (RX or TX)
1231
1232 #define TCH_DTX_UL 15 // Replace UL task in DSP->MCU com. to say "burst not transmitted".
1233
1234 #if (L1_GPRS)
1235 // Identifier for DSP tasks Packet dedicated.
1236 // ...RX & TX tasks identifiers.
1237 //------------------------------------------------------------------------
1238 // WARNING ... Need to aligned following macro with MCU/DSP GPRS Interface
1239 //------------------------------------------------------------------------
1240 #define PNP_DSP_TASK 30
1241 #define PEP_DSP_TASK 31
1242 #define PALLC_DSP_TASK 32
1243 #define PBS_DSP_TASK 33
1244
1245 #define PTCCH_DSP_TASK 33
1246
1247 #endif
1248
1249 // Identifier for measurement, FB / SB search tasks.
1250 // Values 1,2,3 reserved for "number of measurements".
1251 #define FB_DSP_TASK 5 // Freq. Burst reading task in Idle mode.
1252 #define SB_DSP_TASK 6 // Sync. Burst reading task in Idle mode.
1253 #define TCH_FB_DSP_TASK 8 // Freq. Burst reading task in Dedicated mode.
1254 #define TCH_SB_DSP_TASK 9 // Sync. Burst reading task in Dedicated mode.
1255 #if ((REL99 == 1) && (FF_BHO == 1))
1256 #define FBSB_DSP_TASK 16 // Freq.+Sync. Burst reading task in Blind Handover.
1257 #endif
1258 #define IDLE1 1
1259
1260 // Debug tasks
1261 #define CHECKSUM_DSP_TASK 33
1262 #define TST_NDB 35 // Checksum DSP->MCU
1263 #define TST_DB 36 // DB communication check
1264 #define INIT_VEGA 37
1265 #define DSP_LOOP_C 38
1266
1267 // Identifier for measurement, FB / SB search tasks.
1268 // Values 1,2,3 reserved for "number of measurements".
1269 #define TCH_LOOP_A 31
1270 #define TCH_LOOP_B 32
1271
1272 #if (DSP >= 33)
1273 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x08DB - 0x800)))
1274 #else
1275 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x09A0 - 0x800)))
1276 #endif
1277
1278 // bits in d_gsm_bgd_mgt - background task management
1279 #define B_DSPBGD_RECO 1 // start of reco in dsp background
1280 #define B_DSPBGD_UPD 2 // start of alignement update in dsp background
1281 #define B_DSPBGD_STOP_RECO 256 // stop of reco in dsp background
1282 #define B_DSPBGD_STOP_UPD 512 // stop of alignement update in dsp background
1283
1284 // bit in d_pll_config
1285 #define B_32KHZ_CALIB (TRUE_L << 14) // force DSP in Idle1 during 32 khz calibration
1286 // ****************************************************************
1287 // NDB AREA (PARAM) MCU<->DSP COMMUNICATION DEFINITIONS
1288 // ****************************************************************
1289 // bits in d_tch_mode
1290 #define B_EOTD (TRUE_L << 0) // EOTD mode
1291 #define B_PLAY_UL (TRUE_L << 3) // Play UL
1292 #define B_DCO_ON (TRUE_L << 4) // DCO ON/OFF
1293 #define B_AUDIO_ASYNC (TRUE_L << 1) // WCP reserved
1294
1295 // ****************************************************************
1296 // PARAMETER AREA (PARAM) MCU<->DSP COMMUNICATION DEFINITIONS
1297 // ****************************************************************
1298 #define C_POND_RED 1L
1299 // below values are defined in the file l1_time.h
1300 //#define D_NSUBB_IDLE 296L
1301 //#define D_NSUBB_DEDIC 30L
1302 #define D_FB_THR_DET_IACQ 0x3333L
1303 #define D_FB_THR_DET_TRACK 0x28f6L
1304
1305 #if (RF_FAM == 60)
1306 // UPPCosto without dc offset compensation (DSP algo)
1307 #define D_DC_OFF_THRES 0x0000L
1308 #else
1309 #define D_DC_OFF_THRES 0x7fffL
1310 #endif
1311
1312 #define D_DUMMY_THRES 17408L
1313 #define D_DEM_POND_GEWL 26624L
1314 #define D_DEM_POND_RED 20152L
1315 #define D_HOLE 0L
1316 #define D_TRANSFER_RATE 0x6666L
1317
1318 // Full Rate vocoder definitions.
1319 #define D_MACCTHRESH1 7872L
1320 #define D_MLDT -4L
1321 #define D_MACCTHRESH 7872L
1322 #define D_GU 5772L
1323 #define D_GO 7872L
1324 #define D_ATTMAX 53L
1325 #define D_SM -892L
1326 #define D_B 208L
1327 #define D_SD_MIN_THR_TCHFS 15L //(24L *C_POND_RED)
1328 #define D_MA_MIN_THR_TCHFS 738L //(1200L *C_POND_RED)
1329 #define D_MD_MAX_THR_TCHFS 1700L //(2000L *C_POND_RED)
1330 #define D_MD1_MAX_THR_TCHFS 99L //(160L *C_POND_RED)
1331
1332 #if (DSP >= 33)
1333 // Frequency burst definitions
1334 #define D_FB_MARGIN_BEG 24
1335 #define D_FB_MARGIN_END 22
1336
1337 // V42bis definitions
1338 #define D_V42B_SWITCH_HYST 16L
1339 #define D_V42B_SWITCH_MIN 64L
1340 #define D_V42B_SWITCH_MAX 250L
1341 #define D_V42B_RESET_DELAY 10L
1342
1343 // Latencies definitions
1344 #if (DSP >= 33)
1345 // C.f. BUG1404
1346 #define D_LAT_MCU_BRIDGE 0x000FL
1347 #else
1348 #define D_LAT_MCU_BRIDGE 0x0009L
1349 #endif
1350
1351 #define D_LAT_MCU_HOM2SAM 0x000CL
1352
1353 #define D_LAT_MCU_BEF_FAST_ACCESS 0x0005L
1354 #define D_LAT_DSP_AFTER_SAM 0x0004L
1355
1356 // Background Task in GSM mode: Initialization.
1357 #define D_GSM_BGD_MGT 0L
1358
1359 #if (CHIPSET == 4)
1360 #define D_MISC_CONFIG 0L
1361 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)
1362 // This variable is basically used for Samson. If SAMSON should be zero.
1363 // A variable for making DSP not go to IDLE3 when DMA is on
1364 #define D_MISC_CONFIG 1L
1365 #else
1366 #define D_MISC_CONFIG 0L
1367 #endif
1368
1369 #endif
1370
1371 // Hall Rate vocoder and ched definitions.
1372
1373 #define D_SD_MIN_THR_TCHHS 37L
1374 #define D_MA_MIN_THR_TCHHS 344L
1375 #define D_MD_MAX_THR_TCHHS 2175L
1376 #define D_MD1_MAX_THR_TCHHS 138L
1377 #define D_SD_AV_THR_TCHHS 1845L
1378 #define D_WED_FIL_TC 0x7c00L
1379 #define D_WED_FIL_INI 4650L
1380 #define D_X_MIN 15L
1381 #define D_X_MAX 23L
1382 #define D_Y_MIN 703L
1383 #define D_Y_MAX 2460L
1384 #define D_SLOPE 135L
1385 #define D_WED_DIFF_THRESHOLD 406L
1386 #define D_MABFI_MIN_THR_TCHHS 5320L
1387 #define D_LDT_HR -5
1388 #define D_MACCTRESH_HR 6500
1389 #define D_MACCTRESH1_HR 6500
1390 #define D_GU_HR 2620
1391 #define D_GO_HR 3700
1392 #define D_B_HR 182
1393 #define D_SM_HR -1608
1394 #define D_ATTMAX_HR 53
1395
1396 // Enhanced Full Rate vocoder and ched definitions.
1397
1398 #define C_MLDT_EFR -4
1399 #define C_MACCTHRESH_EFR 8000
1400 #define C_MACCTHRESH1_EFR 8000
1401 #define C_GU_EFR 4522
1402 #define C_GO_EFR 6500
1403 #define C_B_EFR 174
1404 #define C_SM_EFR -878
1405 #define C_ATTMAX_EFR 53
1406 #define D_SD_MIN_THR_TCHEFS 15L //(24L *C_POND_RED)
1407 #define D_MA_MIN_THR_TCHEFS 738L //(1200L *C_POND_RED)
1408 #define D_MD_MAX_THR_TCHEFS 1230L //(2000L *C_POND_RED)
1409 #define D_MD1_MAX_THR_TCHEFS 99L //(160L *C_POND_RED)
1410
1411
1412 // Integrated Data Services definitions.
1413 #define D_MAX_OVSPD_UL 8
1414 // Detect frames containing 90% of 1s as synchro frames
1415 #define D_SYNC_THRES 0x3f50
1416 // IDLE frames are only frames with 100 % of 1s
1417 #define D_IDLE_THRES 0x4000
1418 #define D_M1_THRES 5
1419 #define D_MAX_OVSP_DL 8
1420
1421 // d_ra_act: bit field definition
1422 #define B_F48BLK 5
1423 #if REL99
1424 #if FF_EMR
1425 #define B_F48BLK_DL 6
1426 #endif
1427 #endif
1428
1429
1430 // Mask for b_itc information (d_ra_conf)
1431 #define CE_MASK 0x04
1432
1433 #define D_FACCH_THR 0
1434 #define D_DSP_TEST 0
1435 #define D_VERSION_NUMBER 0
1436 #define D_TI_VERSION 0
1437
1438
1439 /*----------------------------------------------------------------------------*/
1440 /* */
1441 /* DEFINITIONS FOR DSP <-> MCU COMMUNICATION. */
1442 /* ++++++++++++++++++++++++++++++++++++++++++ */
1443 /* */
1444 /*----------------------------------------------------------------------------*/
1445 // COMMUNICATION Interrupt definition
1446 //------------------------------------
1447 #define ALL_16BIT 0xffffL
1448 #define B_GSM_PAGE (TRUE_L << 0)
1449 #define B_GSM_TASK (TRUE_L << 1)
1450 #define B_MISC_PAGE (TRUE_L << 2)
1451 #define B_MISC_TASK (TRUE_L << 3)
1452
1453 #define B_GSM_PAGE_MASK (ALL_16BIT ^ B_GSM_PAGE)
1454 #define B_GSM_TASK_MASK (ALL_16BIT ^ B_GSM_TASK)
1455 #define B_MISC_PAGE_MASK (ALL_16BIT ^ B_MISC_PAGE)
1456 #define B_MISC_TASK_MASK (ALL_16BIT ^ B_MISC_TASK)
1457
1458 // Common definition
1459 //----------------------------------
1460 // Index to *_DEMOD* arrays.
1461 #define D_TOA 0 // Time Of Arrival.
1462 #define D_PM 1 // Power Measurement.
1463 #define D_ANGLE 2 // Angle (AFC correction)
1464 #define D_SNR 3 // Signal / Noise Ratio.
1465
1466 #if REL99
1467 #if FF_EMR
1468 #define D_CV_BEP 2
1469 #define D_MEAN_BEP_MSW 0
1470 #define D_MEAN_BEP_LSW 1
1471 #endif
1472 #endif //L1_R99
1473
1474 // Bit name/position definitions.
1475 #define B_JOINT 4 // Chase combining flag
1476 #define B_FIRE0 5 // Fire result bit 0. (00 -> NO ERROR) (01 -> ERROR CORRECTED)
1477 #define B_FIRE1 6 // Fire result bit 1. (10 -> ERROR) (11 -> unused)
1478 #define B_SCH_CRC 8 // CRC result for SB decoding. (1 for ERROR).
1479 #define B_BLUD 15 // Uplink,Downlink data block Present. (1 for PRESENT).
1480 #define B_AF 14 // Activity bit: 1 if data block is valid.
1481 #define B_BFI 2 // Bad Frame Indicator
1482 #define B_UFI 0 // UNRELIABLE FRAME Indicator
1483 #define B_ECRC 9 // Enhanced full rate CRC bit
1484 #define B_EMPTY_BLOCK 10 // for voice memo purpose, this bit is used to determine
1485
1486 #if REL99
1487 #if FF_EMR
1488 #define MEAN_BEP_FORMAT 5 // mean_bep is received in F1.31 format from DSP and should be
1489 // reported in F6.26 format to L2.
1490 #define CV_BEP_FORMAT 5 // cv_bep is received in F3.13 format from DSP and should be
1491 // reported in F8.8 format to L2.
1492 #define B_SID1 4 // SID1 bit.
1493 #define B_M1 0 // M1 bit.
1494 #define B_CE 8 // Connection element
1495 #define B_FCS_OK 3 // Frame check sequence bit
1496 #define WORD_SHIFT 16 // Shift word
1497 #endif
1498 #endif //L1_R99
1499
1500
1501 #if (DEBUG_DEDIC_TCH_BLOCK_STAT == 1)
1502 #define FACCH_GOOD 10
1503 #define FACCH_BAD 11
1504 #endif
1505
1506 #if (AMR == 1)
1507 // Place of the RX type in the AMR block header
1508 #define RX_TYPE_SHIFT 3
1509 #define RX_TYPE_MASK 0x0038
1510
1511 // Place of the vocoder type in the AMR block header
1512 #define VOCODER_TYPE_SHIFT 0
1513 #define VOCODER_TYPE_MASK 0x0007
1514
1515 // List of the possible RX types in a_dd block
1516 #define SPEECH_GOOD 0
1517 #define SPEECH_DEGRADED 1
1518 #define ONSET 2
1519 #define SPEECH_BAD 3
1520 #define SID_FIRST 4
1521 #define SID_UPDATE 5
1522 #define SID_BAD 6
1523 #define AMR_NO_DATA 7
1524 #define AMR_INHIBIT 8
1525
1526 // List of possible RX types in RATSCCH block
1527 #define C_RATSCCH_GOOD 5
1528
1529 #if REL99
1530 #if FF_EMR
1531 #define RATSCCH_GOOD 5
1532 #define RATSCCH_BAD 6
1533 #endif
1534 #endif //L1_R99
1535
1536
1537
1538 // List of the possible AMR channel rate
1539 #define AMR_CHANNEL_4_75 0
1540 #define AMR_CHANNEL_5_15 1
1541 #define AMR_CHANNEL_5_9 2
1542 #define AMR_CHANNEL_6_7 3
1543 #define AMR_CHANNEL_7_4 4
1544 #define AMR_CHANNEL_7_95 5
1545 #define AMR_CHANNEL_10_2 6
1546 #define AMR_CHANNEL_12_2 7
1547
1548
1549 // Types of RATSCCH blocks
1550 #define C_RATSCCH_UNKNOWN 0
1551 #define C_RATSCCH_CMI_PHASE_REQ 1
1552 #define C_RATSCCH_AMR_CONFIG_REQ_MAIN 2
1553 #define C_RATSCCH_AMR_CONFIG_REQ_ALT 3
1554 #define C_RATSCCH_AMR_CONFIG_REQ_ALT_IGNORE 4 // Alternative AMR_CONFIG_REQ with updates coming in the next THRES_REQ block
1555 #define C_RATSCCH_THRES_REQ 5
1556
1557 // These flags define a bitmap that indicates which AMR parameters are being modified by a RATSCCH
1558 #define C_AMR_CHANGE_CMIP 0
1559 #define C_AMR_CHANGE_ACS 1
1560 #define C_AMR_CHANGE_ICM 2
1561 #define C_AMR_CHANGE_THR1 3
1562 #define C_AMR_CHANGE_THR2 4
1563 #define C_AMR_CHANGE_THR3 5
1564 #define C_AMR_CHANGE_HYST1 6
1565 #define C_AMR_CHANGE_HYST2 7
1566 #define C_AMR_CHANGE_HYST3 8
1567
1568 // CMIP default value
1569 #define C_AMR_CMIP_DEFAULT 1 // According to ETSI specification 05.09, cmip is always 1 by default (new channel, handover...)
1570
1571 #endif
1572 // "d_ctrl_tch" bits positions for TCH configuration.
1573 #define B_CHAN_MODE 0
1574 #define B_CHAN_TYPE 4
1575 #define B_RESET_SACCH 6
1576 #define B_VOCODER_ON 7
1577 #define B_SYNC_TCH_UL 8
1578 #if (AMR == 1)
1579 #define B_SYNC_AMR 9
1580 #else
1581 #define B_SYNC_TCH_DL 9
1582 #endif
1583 #define B_STOP_TCH_UL 10
1584 #define B_STOP_TCH_DL 11
1585 #define B_TCH_LOOP 12
1586 #define B_SUBCHANNEL 15
1587
1588 // "d_ctrl_abb" bits positions for conditionnal loading of abb registers.
1589 #define B_RAMP 0
1590 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
1591 #define B_BULRAMPDEL 3 // Note: this name is changed
1592 #define B_BULRAMPDEL2 2 // Note: this name is changed
1593 #define B_BULRAMPDEL_BIS 9
1594 #define B_BULRAMPDEL2_BIS 10
1595 #endif
1596 #if ((RF_FAM == 61) && ((DSP == 38) || (DSP == 39)))
1597 #define B_BULRAMPDEL 3 // Note: this name is changed
1598 #define B_BULRAMPDEL2 2 // Note: this name is changed
1599 #define B_BULRAMPDEL_BIS 9
1600 #define B_BULRAMPDEL2_BIS 10
1601 #endif
1602 #define B_AFC 4
1603
1604 // "d_ctrl_system" bits positions.
1605 #define B_TSQ 0
1606 #define B_BCCH_FREQ_IND 3
1607 #define B_TASK_ABORT 15 // Abort RF tasks for DSP.
1608 #define B_SWH_APPLY_WHITENING 4 // SWH control(enable, disable)
1609
1610 #if (NEW_SNR_THRESHOLD == 1) && (L1_SAIC == 0)
1611 #error "SNR threshold valid only for SAIC build"
1612 #endif
1613
1614 //SAIC related
1615 #define B_SWH 1 /* SWH bit position */
1616 #define B_NEW_POND 2 /* NEW_POND bit position*/
1617 #define B_SWH_DOUBLE_INTERPOLATION 3 /* Single or Double Interpolation*/
1618 #define B_SWH_INTERPOLATE 4 /* interpolate or not*/
1619 #define B_TOA_ALMNT 5 /* New TOA alignment from DSP for non saic mode*/
1620 #define B_SNR_ALMNT 6 /* New SNR threshold set to 1024 for AFC and TOA*/
1621
1622 // DB Area
1623 #define B_SAIC_DB 0
1624 #define B_NEW_POND_DB 1
1625 #define B_SWH_DB 4
1626 #define B_SWH_CHANTAP 12
1627 #define SAIC_ENABLE_DB ((0x01 << B_SAIC_DB) | (0x01 << B_NEW_POND_DB))
1628
1629 #if (NEW_SNR_THRESHOLD == 1)
1630 #if (ONE_THIRD_INTRPOL ==1 )
1631 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1<< B_SWH_DOUBLE_INTERPOLATION)) | (1 << B_SWH_INTERPOLATE) |(1<< B_TOA_ALMNT) | (1 << B_SNR_ALMNT)
1632 #else /* ONE_THIRD_INTRPOL == 0*/
1633 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1 << B_SWH_INTERPOLATE) |(1<< B_TOA_ALMNT) | (1 << B_SNR_ALMNT)
1634 #endif /* ONE_THIRD_INTRPOL*/
1635 #else /* NEW_SNR_THRESHOLD == 0 */
1636 #if (ONE_THIRD_INTRPOL ==1 )
1637 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1<< B_SWH_DOUBLE_INTERPOLATION)) | (1 << B_SWH_INTERPOLATE) /* added for CQ-95275 & 93303 */
1638 #else
1639 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)) | (1 << B_SWH_INTERPOLATE)
1640 #endif//ONE_THIRD_INTRPOL
1641 #endif /*NEW_SNR_THRESHOLD*/
1642 #if (FF_L1_FAST_DECODING == 1)
1643 #define B_FAST_DECODING_FLAG (5)
1644 #define C_FAST_DECODING_CRC_FIRE1 (0x02)
1645
1646 /* Fast decoding states */
1647 #define C_FAST_DECODING_NONE 0
1648 #define C_FAST_DECODING_AWAITED 1
1649 #define C_FAST_DECODING_PROCESSING 2
1650 #define C_FAST_DECODING_COMPLETE 3
1651 #define C_FAST_DECODING_FORBIDDEN 4
1652
1653 #endif /* FF_L1_FAST_DECODING */
1654
1655 #if (FF_L1_FAST_DECODING == 1)
1656 #define C_BA_PM_MEAS (4)
1657 #else
1658 #define C_BA_PM_MEAS (2)
1659 #endif /* FF_L1_FAST_DECODING */
1660
1661 #if FF_L1_IT_DSP_USF
1662 // d_dsp_hint_flag word definition
1663 #define B_USF_HINT_ISSUED 0
1664 #define B_NON_USF_HINT_ISSUED 1
1665 #endif
1666 #if FF_L1_IT_DSP_DTX
1667 // d_fast_dtx_hint word definition- now d_fast_dtx_hint is not used- same as- d_dsp_hint_flag
1668 #define B_DTX_HINT_ISSUED 0
1669 #define B_DTX_STATE 1
1670
1671 // d_tch_mode_ext word definition
1672 #define B_FAST_DTX_ENABLED 0
1673 #define B_NON_USF_HINT_ISSUED 1
1674 #endif
1675 // ****************************************************************
1676 // POLESTAR EVABOARD 3 REGISTERS & ADRESSES DEFINITIONS
1677 // ****************************************************************
1678
1679
1680 // DSP ADRESSES
1681 //--------------------
1682
1683 #define DB_SIZE (4*20L) // 4 pages of 20 words...
1684
1685 #if (DSP >= 33)
1686 #define MCU_API_BASE_ADDRESS 0xFFD00000L
1687 #define DSP_API_BASE_ADDRESS 0x800
1688 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long
1689 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long
1690 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long
1691 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long
1692 #define NDB_ADR 0xFFD001A8L // NDB start address : 268 words
1693 #define PARAM_ADR 0xFFD00862L // PARAM start address : 57 words
1694
1695 #if (DSP_DEBUG_TRACE_ENABLE == 1)
1696 #define DB2_R_PAGE_0 0xFFD00184L
1697 #define DB2_R_PAGE_1 0xFFD00188L
1698 #endif
1699
1700 #if (DSP >= 38)
1701 /* DSP CPU load measurement */
1702 #define DSP_CPU_LOAD_MCU_API_BASE_ADDRESS 0xFFD01DE0L
1703 #define DSP_CPU_LOAD_DB_W_PAGE_0 0xFFD01DE0L // DB page 0 write : 4 words long
1704 #define DSP_CPU_LOAD_DB_W_PAGE_1 0xFFD01DE8L // DB page 1 write : 4 words long
1705 #define DSP_CPU_LOAD_MCU_W_CTRL 0xFFD01DF0L // DSP CPU load feature control
1706 #define DSP_CPU_LOAD_MCU_W_TDMA_FN 0xFFD01DF2L // MCU TDMA frame number
1707 #endif
1708
1709 #else
1710 #define MCU_API_BASE_ADDRESS 0xFFD00000L
1711 #define DSP_API_BASE_ADDRESS 0x800
1712 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long
1713 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long
1714 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long
1715 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long
1716 #define NDB_ADR 0xFFD000a0L // NDB start address : 268 words
1717 #define PARAM_ADR 0xFFD002b8L // PARAM start address : 57 words
1718 #endif
1719
1720 #if (DSP == 38) || (DSP == 39)
1721 // a DB common is used by the GSM and GPRS for the common feature
1722 #define DB_COMMON_W_PAGE_0 0xFFD00760L // DB common page 0
1723 #define DB_COMMON_W_PAGE_1 0xFFD00780L // DB common page 1
1724 #endif
1725
1726 // ****************************************************************
1727 // ADC reading definitions
1728 // ****************************************************************
1729
1730 #define ADC_READ_PERIOD (40) //30 * 4.615 = 140ms
1731
1732
1733 // ****************************************************************
1734 // AGC: IL table identifier used by function Cust_get_agc_from_IL
1735 // ****************************************************************
1736 #define MAX_ID 1
1737 #define AV_ID 2
1738 #define PWR_ID 3
1739
1740 #if TESTMODE
1741 // ****************************************************************
1742 // Testmode: State of the continous mode
1743 // ****************************************************************
1744 #define TM_NO_CONTINUOUS 1 // continuous mode isn't active
1745 #define TM_START_RX_CONTINUOUS 2 // start the Rx continuous mode
1746 #define TM_START_TX_CONTINUOUS 3 // start the Tx continuous mode
1747 #define TM_CONTINUOUS 4 // Rx or Tx continuous mode
1748 #endif
1749 #if (AMR == 1)
1750 // ****************************************************************
1751 // AMR: Position of each AMR parameters in the AMR API buffer
1752 // ****************************************************************
1753 #define NSCB_INDEX 0
1754 #define NSCB_SHIFT 6
1755 #define ICMUL_INDEX 0
1756 #define ICMUL_SHIFT 4
1757 #define ICMDL_INDEX 0
1758 #define ICMDL_SHIFT 1
1759 #define ICMIUL_INDEX 0
1760 #define ICMIUL_SHIFT 3
1761 #define ICMIDL_INDEX 0
1762 #define ICMIDL_SHIFT 0
1763 #define ACSUL_INDEX 1
1764 #define ACSUL_SHIFT 0
1765 #define ACSDL_INDEX 1
1766 #define ACSDL_SHIFT 8
1767 #define THR1_INDEX 2
1768 #define THR1_SHIFT 0
1769 #define THR2_INDEX 2
1770 #define THR2_SHIFT 6
1771 #define THR3_INDEX 3
1772 #define THR3_SHIFT 8
1773 #define HYST1_INDEX 3
1774 #define HYST1_SHIFT 0
1775 #define HYST2_INDEX 3
1776 #define HYST2_SHIFT 4
1777 #define HYST3_INDEX 2
1778 #define HYST3_SHIFT 12
1779 #define NSYNC_INDEX 3
1780 #define NSYNC_SHIFT 14
1781 #define CMIP_INDEX 3
1782 #define CMIP_SHIFT 15
1783
1784 #define NSCB_MASK 0x0001
1785 #define ICM_MASK 0x0003
1786 #define ICMI_MASK 0x0001
1787 #define ACS_MASK 0x00FF
1788 #define THR_MASK 0x003F
1789 #define HYST_MASK 0x000F
1790 #define CMIP_MASK 0x0001
1791
1792 #endif
1793
1794 #if (L1_RF_KBD_FIX == 1)
1795
1796 #define FRAME_DURATION 5000
1797 #define CUST_DEBOUNCE_TIME 64
1798
1799 #endif
1800
1801 #endif // L1_CONST_H