FreeCalypso > hg > freecalypso-citrine

comparison L1/include/leo-based/fc-diffs @ 0:75a11d740a02

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initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 09 Jun 2016 00:02:41 +0000
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-1:000000000000 0:75a11d740a02
1 diff l1_const.h
2 --- ../../../../leo2moko/chipsetsw/layer1/include/l1_const.h 2009-11-07 06:38:12.000000000 -0800
3 +++ l1_const.h 2014-07-14 17:41:39.772709632 -0800
4 @@ -18,11 +18,13 @@
5 #else // Running ARM compiler.
6 #define FAR
7 #define EXIT exit(0)
8 + #undef stricmp // appease gcc
9 #define stricmp strcmp
10 #endif
11
12
13 #if (CODE_VERSION != SIMULATION)
14 + #undef NULL // appease gcc
15 #define NULL 0
16 #endif
17
18 @@ -1264,7 +1266,7 @@
19
20 // "d_ctrl_abb" bits positions for conditionnal loading of abb registers.
21 #define B_RAMP 0
22 -#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
23 +#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
24 #define B_BULRAMPDEL 3 // Note: this name is changed
25 #define B_BULRAMPDEL2 2 // Note: this name is changed
26 #define B_BULRAMPDEL_BIS 9
27 diff l1_ctl.h
28 --- ../../../../leo2moko/chipsetsw/layer1/include/l1_ctl.h 2009-11-07 06:38:12.000000000 -0800
29 +++ l1_ctl.h 2013-11-16 20:27:53.000000000 -0800
30 @@ -50,10 +50,8 @@
31 #define ALGO_AFC_KALMAN_PREDICTOR 3 // Kalman filter + rgap predictor
32 #endif
33
34 -#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
35 +#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
36 // clipping related to AFC DAC linearity range
37 #define C_max_step 32000 // 4000 * 2**3
38 #define C_min_step -32000 // -4000 * 2**3
39 #endif
40 -
41 -
42 diff l1_defty.h
43 --- ../../../../leo2moko/chipsetsw/layer1/include/l1_defty.h 2009-11-07 06:38:12.000000000 -0800
44 +++ l1_defty.h 2014-07-10 07:19:36.915001165 -0800
45 @@ -7,7 +7,7 @@
46 *
47 ************* Revision Controle System Header *************/
48 #if(L1_DYN_DSP_DWNLD == 1)
49 - #include "l1_dyn_dwl_defty.h"
50 + #include "../dyn_dwl_include/l1_dyn_dwl_defty.h"
51 #endif
52
53 typedef struct
54 @@ -421,7 +421,7 @@
55 // bit [12.13] -> b_tch_loop, tch loops A/B/C.
56 API hole; // (10) unused hole.
57
58 -#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
59 +#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
60 API d_ctrl_abb; // (11) Bit field indicating the analog baseband register to send.
61 // bit [0] -> b_ramp: the ramp information(a_ramp[]) is located in NDB
62 // bit [1.2] -> unused
63 @@ -552,9 +552,9 @@
64 API d_dai_onoff;
65 API d_auxdac;
66
67 - #if (ANLG_FAM == 1)
68 + #if (ANALOG == 1)
69 API d_vbctrl;
70 - #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
71 + #elif ((ANALOG == 2) || (ANALOG == 3))
72 API d_vbctrl1;
73 #endif
74
75 @@ -660,7 +660,7 @@
76 API d_gea_mode_ovly;
77 API a_gea_kc_ovly[4];
78
79 -#if (ANLG_FAM == 3)
80 +#if (ANALOG == 3)
81 // SYREN specific registers
82 API d_vbpop;
83 API d_vau_delay_init;
84 @@ -669,7 +669,7 @@
85 API d_vaus_vol;
86 API d_vaud_pll;
87 API d_hole3_ndb[1];
88 -#elif ((ANLG_FAM == 1) || (ANLG_FAM == 2))
89 +#elif ((ANALOG == 1) || (ANALOG == 2))
90
91 API d_hole3_ndb[7];
92
93 @@ -896,9 +896,9 @@
94 API d_dai_onoff;
95 API d_auxdac;
96
97 - #if (ANLG_FAM == 1)
98 + #if (ANALOG == 1)
99 API d_vbctrl;
100 - #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
101 + #elif ((ANALOG == 2) || (ANALOG == 3))
102 API d_vbctrl1;
103 #endif
104
105 @@ -1157,7 +1157,7 @@
106 // bit [2] -> b_dtx.
107
108 // OMEGA...........................(MCU -> DSP).
109 - #if ((ANLG_FAM == 1) || (ANLG_FAM == 2))
110 + #if ((ANALOG == 1) || (ANALOG == 2))
111 API a_ramp[16];
112 #if (MELODY_E1)
113 API d_melo_osc_used;
114 @@ -1215,9 +1215,9 @@
115 API d_dai_onoff;
116 API d_auxdac;
117
118 - #if (ANLG_FAM == 1)
119 + #if (ANALOG == 1)
120 API d_vbctrl;
121 - #elif (ANLG_FAM == 2)
122 + #elif (ANALOG == 2)
123 API d_vbctrl1;
124 #endif
125
126 @@ -1387,7 +1387,7 @@
127
128 // OMEGA...........................(MCU -> DSP).
129
130 -#if ((ANLG_FAM == 1) || (ANLG_FAM == 2))
131 +#if ((ANALOG == 1) || (ANALOG == 2))
132 API a_ramp[16];
133 #if (MELODY_E1)
134 API d_melo_osc_used;
135 @@ -1443,9 +1443,9 @@
136 API d_bulqoff;
137 API d_dai_onoff;
138 API d_auxdac;
139 - #if (ANLG_FAM == 1)
140 + #if (ANALOG == 1)
141 API d_vbctrl;
142 - #elif (ANLG_FAM == 2)
143 + #elif (ANALOG == 2)
144 API d_vbctrl1;
145 #endif
146 API d_bbctrl;
147 @@ -2834,7 +2834,7 @@
148 BOOL dco_enabled;
149 #endif
150
151 - #if (ANLG_FAM == 1)
152 + #if (ANALOG == 1)
153 UWORD16 debug1;
154 UWORD16 afcctladd;
155 UWORD16 vbuctrl;
156 @@ -2848,7 +2848,7 @@
157 UWORD16 vbctrl;
158 UWORD16 apcdel1;
159 #endif
160 - #if (ANLG_FAM == 2)
161 + #if (ANALOG == 2)
162 UWORD16 debug1;
163 UWORD16 afcctladd;
164 UWORD16 vbuctrl;
165 @@ -2865,7 +2865,7 @@
166 UWORD16 apcdel1;
167 UWORD16 apcdel2;
168 #endif
169 - #if (ANLG_FAM == 3)
170 + #if (ANALOG == 3)
171 UWORD16 debug1;
172 UWORD16 afcctladd;
173 UWORD16 vbuctrl;
174 diff l1_macro.h
175 --- ../../../../leo2moko/chipsetsw/layer1/include/l1_macro.h 2009-11-07 06:38:12.000000000 -0800
176 +++ l1_macro.h 2013-11-16 12:55:51.000000000 -0800
177 @@ -10,7 +10,7 @@
178 #include "l1_confg.h"
179
180 #if(L1_DYN_DSP_DWNLD == 1)
181 - #include "l1_dyn_dwl_const.h"
182 + #include "../dyn_dwl_include/l1_dyn_dwl_const.h"
183 #endif
184
185 #if (TRACE_TYPE==5) && NUCLEUS_TRACE
186 diff l1_proto.h
187 --- ../../../../leo2moko/chipsetsw/layer1/include/l1_proto.h 2009-11-07 06:38:12.000000000 -0800
188 +++ l1_proto.h 2014-07-10 07:18:34.489000271 -0800
189 @@ -134,7 +134,7 @@
190 /* prototypes of L1_FUNC functions */
191 /**************************************/
192 void dsp_power_on (void);
193 -#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
194 +#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
195 void l1_abb_power_on (void);
196 #endif
197 void tpu_init (void);
198 @@ -517,7 +517,7 @@
199 WORD8 l1ctl_encode_delta1 (UWORD16 radio_freq);
200 WORD8 l1ctl_encode_delta2 (UWORD16 radio_freq);
201 void Cust_get_ramp_tab (API *a_ramp, UWORD8 txpwr_ramp_up, UWORD8 txpwr_ramp_down, UWORD16 radio_freq);
202 -#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
203 +#if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
204 UWORD16 Cust_get_pwr_data(UWORD8 txpwr, UWORD16 radio_freq);
205 #endif
206
207 diff l1_time.h
208 --- ../../../../leo2moko/chipsetsw/layer1/include/l1_time.h 2009-11-07 06:38:12.000000000 -0800
209 +++ l1_time.h 2014-07-10 07:18:53.908001527 -0800
210 @@ -140,7 +140,7 @@
211 #if (CODE_VERSION==SIMULATION)
212 #define TULSET_DURATION ( 16L ) // Uplink power on setup time
213 #define BULRUDEL_DURATION ( 2L )
214 - #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
215 + #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
216 // 16 qbits are added because the Calibration time is reduced of 4 GSM bit
217 // due to a slow APC ramp of OMEGA (Cf. START_TX_NB)
218 #define UL_VEGA_DELAY ( TULSET_DURATION + BULRUDEL_DURATION +16L ) // = 18qbits, TX Vega delay
219 diff l1_trace.h
220 --- ../../../../leo2moko/chipsetsw/layer1/include/l1_trace.h 2009-11-07 06:38:12.000000000 -0800
221 +++ l1_trace.h 2014-07-14 23:32:39.826002442 -0800
222 @@ -11,7 +11,7 @@
223 #ifndef __L1_TRACE_H__
224 #define __L1_TRACE_H__
225
226 -#include "rvt_gen.h"
227 +#include "../../riviera/rvt/rvt_gen.h"
228 #include <string.h>
229
230 #if (defined RVM_RTT_SWE || (OP_L1_STANDALONE == 1))