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comparison bsp/abb+spi/abb.c @ 0:75a11d740a02

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initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 09 Jun 2016 00:02:41 +0000
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-1:000000000000 0:75a11d740a02
1 /******************************************************************************/
2 /* TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION */
3 /* */
4 /* Property of Texas Instruments -- For Unrestricted Internal Use Only */
5 /* Unauthorized reproduction and/or distribution is strictly prohibited. This*/
6 /* product is protected under copyright law and trade secret law as an*/
7 /* unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All*/
8 /* rights reserved. */
9 /* */
10 /* */
11 /* Filename : abb.c */
12 /* */
13 /* Description : Functions to drive the ABB device. */
14 /* The Serial Port Interface is used to connect the TI */
15 /* Analog BaseBand (ABB). */
16 /* It is assumed that the ABB is connected as the SPI */
17 /* device 0. */
18 /* */
19 /* Author : Pascal PUEL */
20 /* */
21 /* Version number : 1.3 */
22 /* */
23 /* Date and time : 08/22/03 */
24 /* */
25 /* Previous delta : Creation */
26 /* */
27 /******************************************************************************/
28
29 #include "../../include/config.h"
30 #include "../../include/sys_types.h"
31 #include "../../riviera/rv/general.h"
32 #include "../../nucleus/nucleus.h" // for NUCLEUS functions and types
33
34 #include "../../L1/include/l1_confg.h"
35 #include "../../L1/include/l1_macro.h"
36
37 #include "abb.h"
38 #include "../clkm.h" // for wait_ARM_cycles function
39 #include "abb_inline.h"
40 #include "../ulpd.h" // for FRAME_STOP definition
41
42 #include "../../L1/include/l1_types.h"
43
44 #if 0 // FreeCalypso
45 #include "buzzer/buzzer.h" // for BZ_KeyBeep_OFF function
46 #endif
47
48 #if (VCXO_ALGO == 1)
49 #include "../../L1/include/l1_ctl.h"
50 #endif
51
52 #if (RF_FAM == 35)
53 #include "../../L1/cust0/l1_rf35.h"
54 #endif
55
56 #if (RF_FAM == 12)
57 #include "../../L1/tpudrv/tpudrv12.h"
58 #include "../../L1/cust0/l1_rf12.h"
59 #endif
60
61 #if (RF_FAM == 10)
62 #include "../../L1/cust0/l1_rf10.h"
63 #endif
64
65 #if (RF_FAM == 8)
66 #include "../../L1/cust0/l1_rf8.h"
67 #endif
68
69 #if (RF_FAM == 2)
70 #include "../../L1/cust0/l1_rf2.h"
71 #endif
72
73 #if (ABB_SEMAPHORE_PROTECTION)
74
75 static NU_SEMAPHORE abb_sem;
76
77 /*-----------------------------------------------------------------------*/
78 /* ABB_Sem_Create() */
79 /* */
80 /* This function creates the Nucleus semaphore to protect ABB accesses */
81 /* against preemption. */
82 /* No check on the result. */
83 /* */
84 /*-----------------------------------------------------------------------*/
85 void ABB_Sem_Create(void)
86 {
87 // create a semaphore with an initial count of 1 and with FIFO type suspension.
88 NU_Create_Semaphore(&abb_sem, "ABB_SEM", 1, NU_FIFO);
89 }
90
91 #endif // ABB_SEMAPHORE_PROTECTION
92
93 /*-----------------------------------------------------------------------*/
94 /* ABB_Wait_IBIC_Access() */
95 /* */
96 /* This function waits for the first IBIC access. */
97 /* */
98 /*-----------------------------------------------------------------------*/
99 void ABB_Wait_IBIC_Access(void)
100 {
101 #if (ANALOG ==1)
102 // Wait 6 OSCAS cycles (100 KHz) for first IBIC access
103 // (i.e wait 60us + 10% security marge = 66us)
104 wait_ARM_cycles(convert_nanosec_to_cycles(66000));
105 #elif ((ANALOG ==2) || (ANALOG == 3))
106 // Wait 6 x 32 KHz clock cycles for first IBIC access
107 // (i.e wait 187us + 10% security marge = 210us)
108 wait_ARM_cycles(convert_nanosec_to_cycles(210000));
109 #endif
110 }
111
112
113
114 /*-----------------------------------------------------------------------*/
115 /* ABB_Write_Register_on_page() */
116 /* */
117 /* This function manages all the spi serial transfer to write to an */
118 /* ABB register on a specified page. */
119 /* */
120 /*-----------------------------------------------------------------------*/
121 void ABB_Write_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id, SYS_UWORD16 value)
122 {
123 volatile SYS_UWORD16 status;
124
125 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
126 SPI_Ready_for_WR
127 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
128
129 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
130
131 // check if the semaphore has been correctly created and try to obtain it.
132 // if the semaphore cannot be obtained, the task is suspended and then resumed
133 // as soon as the semaphore is released.
134 if(&abb_sem != 0)
135 {
136 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
137 }
138 #endif // ABB_SEMAPHORE_PROTECTION
139
140 // set the ABB page for register access
141 ABB_SetPage(page);
142
143 // Write value in reg_id
144 ABB_WriteRegister(reg_id, value);
145
146 // set the ABB page for register access at page 0
147 ABB_SetPage(PAGE0);
148
149 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
150 // release the semaphore only if it has correctly been created.
151 if(&abb_sem != 0)
152 {
153 NU_Release_Semaphore(&abb_sem);
154 }
155 #endif // ABB_SEMAPHORE_PROTECTION
156
157 // Stop the SPI clock
158 #ifdef SPI_CLK_LOW_POWER
159 SPI_CLK_DISABLE
160 #endif
161 }
162
163
164 /*-----------------------------------------------------------------------*/
165 /* ABB_Read_Register_on_page() */
166 /* */
167 /* This function manages all the spi serial transfer to read one */
168 /* ABB register on a specified page. */
169 /* */
170 /* Returns the real data value of the register. */
171 /* */
172 /*-----------------------------------------------------------------------*/
173 SYS_UWORD16 ABB_Read_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id)
174 {
175 volatile SYS_UWORD16 status;
176 SYS_UWORD16 reg_val;
177
178 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
179 SPI_Ready_for_RDWR
180 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
181
182 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
183
184 // check if the semaphore has been correctly created and try to obtain it.
185 // if the semaphore cannot be obtained, the task is suspended and then resumed
186 // as soon as the semaphore is released.
187 if(&abb_sem != 0)
188 {
189 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
190 }
191 #endif // ABB_SEMAPHORE_PROTECTION
192
193 /* set the ABB page for register access */
194 ABB_SetPage(page);
195
196 /* Read selected ABB register */
197 reg_val = ABB_ReadRegister(reg_id);
198
199 /* set the ABB page for register access at page 0 */
200 ABB_SetPage(PAGE0);
201
202 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
203 // release the semaphore only if it has correctly been created.
204 if(&abb_sem != 0)
205 {
206 NU_Release_Semaphore(&abb_sem);
207 }
208 #endif // ABB_SEMAPHORE_PROTECTION
209
210 // Stop the SPI clock
211 #ifdef SPI_CLK_LOW_POWER
212 SPI_CLK_DISABLE
213 #endif
214
215 return (reg_val); // Return result
216 }
217
218 /*------------------------------------------------------------------------*/
219 /* ABB_free_13M() */
220 /* */
221 /* This function sets the 13M clock working in ABB. A wait loop */
222 /* is required to allow first slow access to ABB clock register. */
223 /* */
224 /* WARNING !! : this function must not be protected by semaphore !! */
225 /* */
226 /*------------------------------------------------------------------------*/
227 void ABB_free_13M(void)
228 {
229 volatile SYS_UWORD16 status;
230
231 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
232 SPI_Ready_for_WR
233 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
234
235 ABB_SetPage(PAGE0);
236
237 // This transmission frees the CLK13 in ABB.
238 ABB_WriteRegister(TOGBR2, 0x08);
239
240 // Wait for first IBIC access
241 ABB_Wait_IBIC_Access();
242
243 // SW Workaround : This transmission has to be done twice.
244 ABB_WriteRegister(TOGBR2, 0x08);
245
246 // Wait for first IBIC access
247 ABB_Wait_IBIC_Access();
248
249 // Stop the SPI clock
250 #ifdef SPI_CLK_LOW_POWER
251 SPI_CLK_DISABLE
252 #endif
253 }
254
255
256
257 /*------------------------------------------------------------------------*/
258 /* ABB_stop_13M() */
259 /* */
260 /* This function stops the 13M clock in ABB. */
261 /* */
262 /*------------------------------------------------------------------------*/
263 void ABB_stop_13M(void)
264 {
265 volatile SYS_UWORD16 status;
266
267 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
268 SPI_Ready_for_WR
269 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
270
271 ABB_SetPage(PAGE0);
272
273 // Set ACTIVMCLK = 0.
274 ABB_WriteRegister(TOGBR2, 0x04);
275
276 // Wait for first IBIC access
277 ABB_Wait_IBIC_Access();
278
279 // Stop the SPI clock
280 #ifdef SPI_CLK_LOW_POWER
281 SPI_CLK_DISABLE
282 #endif
283 }
284
285
286
287 /*------------------------------------------------------------------------*/
288 /* ABB_Read_Status() */
289 /* */
290 /* This function reads and returns the value of VRPCSTS ABB register. */
291 /* */
292 /*------------------------------------------------------------------------*/
293 SYS_UWORD16 ABB_Read_Status(void)
294 {
295 volatile SYS_UWORD16 status;
296 SYS_UWORD16 reg_val;
297
298 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
299 SPI_Ready_for_WR
300 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
301
302 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
303
304 // check if the semaphore has been correctly created and try to obtain it.
305 // if the semaphore cannot be obtained, the task is suspended and then resumed
306 // as soon as the semaphore is released.
307 if(&abb_sem != 0)
308 {
309 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
310 }
311 #endif // ABB_SEMAPHORE_PROTECTION
312
313 ABB_SetPage(PAGE0);
314
315 #if (ANALOG == 1) || (ANALOG == 2)
316 ABB_SetPage(PAGE0);
317 reg_val = ABB_ReadRegister(VRPCSTS);
318 #elif (ANALOG == 3)
319 ABB_SetPage(PAGE1);
320 reg_val = ABB_ReadRegister(VRPCCFG);
321 #endif
322
323 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
324 // release the semaphore only if it has correctly been created.
325 if(&abb_sem != 0)
326 {
327 NU_Release_Semaphore(&abb_sem);
328 }
329 #endif // ABB_SEMAPHORE_PROTECTION
330
331 // Stop the SPI clock
332 #ifdef SPI_CLK_LOW_POWER
333 SPI_CLK_DISABLE
334 #endif
335
336 return (reg_val);
337 }
338
339 /*------------------------------------------------------------------------*/
340 /* ABB_on() */
341 /* */
342 /* This function configures ABB registers to work in ON condition */
343 /* */
344 /*------------------------------------------------------------------------*/
345 void ABB_on(SYS_UWORD16 modules, SYS_UWORD8 bRecoveryFlag)
346 {
347 volatile SYS_UWORD16 status;
348 #if ((ANALOG ==2) || (ANALOG == 3))
349 SYS_UWORD32 reg;
350 #endif
351
352 // a possible cause of the recovery is that ABB is on Oscas => switch from Oscas to CLK13
353 if (bRecoveryFlag)
354 {
355 // RESTITUTE 13MHZ CLOCK TO ABB
356 //---------------------------------------------------
357 ABB_free_13M();
358
359 // RESTITUTE 13MHZ CLOCK TO ABB AGAIN (C.F. BUG1719)
360 //---------------------------------------------------
361 ABB_free_13M();
362 }
363
364 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
365 SPI_Ready_for_RDWR
366 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
367
368 #if (ABB_SEMAPHORE_PROTECTION == 3)
369
370 // check if the semaphore has been correctly created and try to obtain it.
371 // if the semaphore cannot be obtained, the task is suspended and then resumed
372 // as soon as the semaphore is released.
373 if(&abb_sem != 0)
374 {
375 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
376 }
377 #endif // ABB_SEMAPHORE_PROTECTION
378
379 ABB_SetPage(PAGE0);
380
381 // This transmission disables MADC,AFC,VDL,VUL modules.
382 ABB_WriteRegister(TOGBR1, 0x0155);
383
384 #if (ANALOG == 1)
385 // This transmission disables Band gap fast mode Enable BB charge.
386 ABB_WriteRegister(VRPCCTL2, 0x1fc);
387
388 /* *********** DC/DC enabling selection ************************************************************** */
389 // This transmission changes the register page in OMEGA for usp to pg1.
390 ABB_SetPage(PAGE1);
391
392 /* Insert here accesses to modify DC/DC parameters. Default is a switching frequency of 240 Khz */
393 {
394 SYS_UWORD8 vrpcctrl3_data;
395
396 #if (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)
397 vrpcctrl3_data = 0x007d; // core voltage 1.4V for C035
398 #else
399 vrpcctrl3_data = 0x00bd; // core voltage 1.8V for C05
400 #endif
401
402 if(modules & DCDC) // check if the DCDC is enabled
403 {
404 vrpcctrl3_data |= 0x0002; // set DCDCEN
405 }
406
407 // This access disables the DCDC.
408 ABB_WriteRegister(VRPCCTRL3, vrpcctrl3_data);
409 }
410
411 /* ************************ SELECTION OF TEST MODE FOR ABB **************************************** */
412 /* This test configuration allows visibility on BULENA,BULON,BDLON,BDLENA on test pins */
413 /* ***************************************************************************************************/
414 #if (BOARD==6)&& (ANALOG==1) //BUG01967 to remove access to TAPCTRL (EVA4 board and Nausica)
415 // This transmission enables Omega test register.
416 ABB_WriteRegister(TAPCTRL, 0x01);
417
418 // This transmission select Omega test instruction.
419 ABB_WriteRegister(TAPREG, TSPTEST1);
420
421 // This transmission disables Omega test register.
422 ABB_WriteRegister(TAPCTRL, 0x00);
423 #endif
424 /* *************************************************************************************************** */
425
426 if (!bRecoveryFlag) // Check recovery status from L1, prevent G23 SIM issue
427 {
428 // This transmission changes SIM power supply to 3 volts.
429 ABB_WriteRegister(VRPCCTRL1, 0x45);
430 }
431
432 ABB_SetPage(PAGE0);
433
434 // This transmission enables selected OMEGA modules.
435 ABB_WriteRegister(TOGBR1, (modules & ~DCDC) >> 6);
436
437 if(modules & MADC) // check if the ADC is enabled
438 {
439 // This transmission connects the resistive divider to MB and BB.
440 ABB_WriteRegister(BCICTL1, 0x0005);
441 }
442 #elif ((ANALOG == 2) || (ANALOG == 3))
443 // Restore the ABB checks and debouncing if start on TESTRESETZ
444
445 // This transmission changes the register page in the ABB for usp to pg1.
446 ABB_SetPage(PAGE1);
447
448 // This transmission sets the AFCCK to CKIN/2.
449 ABB_WriteRegister(AFCCTLADD, 0x01);
450
451 // This transmission enables the tapreg.
452 ABB_WriteRegister(TAPCTRL, 0x01);
453
454 // This transmission enables access to page 2.
455 ABB_WriteRegister(TAPREG, 0x01b);
456
457 // This transmission changes the register page in the ABB for usp to pg2.
458 ABB_SetPage(PAGE2);
459
460 #if (ANALOG == 2)
461 // Restore push button environment
462 ABB_WriteRegister(0x3C, 0x07);
463
464 #elif (ANALOG == 3)
465
466 // Restore push button environment
467 ABB_WriteRegister(0x3C, 0xBF);
468
469 /* ************************ SELECTION OF BBCFG CONFIG FOR ABB 3 PG1_0 *******************************/
470 #if (ANLG_PG == S_PG_10) // SYREN PG1.0 ON ESAMPLE
471 ABB_WriteRegister(BBCFG, C_BBCFG); // Initialize transmit register
472 #endif
473 // This transmission enables access to page 0.
474 ABB_SetPage(PAGE0);
475
476 // reset bit MSKINT1 , if set by TESTRESET
477 reg=ABB_ReadRegister(VRPCSTS) & 0xffe;
478
479 ABB_WriteRegister(VRPCSTS, reg);
480
481 ABB_SetPage(PAGE2);
482
483 // Restore default for BG behavior in sleep mode
484 ABB_WriteRegister(VRPCAUX, 0xBF);
485
486 // Restore default for deboucing length
487 ABB_WriteRegister(VRPCLDO, 0x00F);
488
489 // Restore default for INT1 generation, wait time in switch on, checks in switch on
490 ABB_WriteRegister(VRPCABBTST, 0x0002);
491
492 #endif
493
494 // This transmission changes the register page in the ABB for usp to pg1.
495 ABB_SetPage(PAGE1);
496
497 // This transmission sets tapinst to id code.
498 ABB_WriteRegister(TAPREG, 0x0001);
499
500 // This transmission disables TAPREG access.
501 ABB_WriteRegister(TAPCTRL, 0x00);
502
503 // enable BB battery charge BCICONF register, enable test mode to track BDLEN and BULEN windows
504 // This transmission enables BB charge and BB bridge connection for BB measurements.
505 ABB_WriteRegister(BCICONF, 0x060);
506
507 /* ************************ SELECTION OF BBCFG CONFIG FOR ABB 3 PG2_0 *******************************/
508 #if (ANALOG == 3)
509 #if (ANLG_PG == S_PG_20) // SYREN PG2.0 ON EVACONSO
510 ABB_WriteRegister(BBCFG, C_BBCFG); // Initialize transmit register
511 #endif
512 #endif
513
514 /* ************************ SELECTION OF TEST MODE FOR ABB ******************************************/
515 /* This test configuration allows visibility on test pins TAPCTRL has not to be reset */
516 /* ****************************************************************************************************/
517
518 // This transmission enables the tapreg.
519 ABB_WriteRegister(TAPCTRL, 0x01);
520
521 // This transmission select ABB test instruction.
522 ABB_WriteRegister(TAPREG, TSPEN);
523
524 // This transmission changes the register page in ABB for usp to pg0.
525 ABB_SetPage(PAGE0);
526
527 // This transmission enables selected ABB modules.
528 ABB_WriteRegister(TOGBR1, modules >> 6);
529
530 // enable MB & BB resistive bridges for measurements
531 if(modules & MADC) // check if the ADC is enabled
532 {
533 // This transmission connects the resistive divider to MB and BB.
534 ABB_WriteRegister(BCICTL1, 0x0001);
535 }
536
537 /********* Sleep definition part ******************/
538 // This transmission changes the register page in the ABB for usp to pg1.
539 #if (ANALOG == 2)
540 ABB_SetPage(PAGE1);
541
542 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value.
543 reg = ABB_ReadRegister(VRPCCFG) & 0x1e0;
544
545 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg));
546
547 // update the ABB mask sleep register (regulator disabled in deep sleep), and clear previous mask value.
548 reg = ABB_ReadRegister(VRPCMSK) & 0x1e0;
549 ABB_WriteRegister(VRPCMSK, (MASK_SLEEP_MODE | reg));
550 #elif (ANALOG == 3)
551 Syren_Sleep_Config(NORMAL_SLEEP,SLEEP_BG,SLPDLY);
552 #endif
553 // This transmission changes the register page in the ABB for usp to pg0.
554 ABB_SetPage(PAGE0);
555 #endif
556
557 // SW workaround for initialization of the audio parts of the ABB to avoid white noise
558 // C.f. BUG1941
559 // Set VDLR and VULR bits
560 // Write TOGBR1 register
561 // This transmission enables selected ABB modules.
562 ABB_WriteRegister(TOGBR1, 0x0A);
563
564 // wait for 1 ms
565 wait_ARM_cycles(convert_nanosec_to_cycles(1000000));
566
567 // Reset VDLS and VULS bits
568 // Write TOGBR1 register
569 // This transmission enables selected ABB modules.
570 ABB_WriteRegister(TOGBR1, 0x05);
571
572 #if (ABB_SEMAPHORE_PROTECTION == 3)
573 // release the semaphore only if it has correctly been created.
574 if(&abb_sem != 0)
575 {
576 NU_Release_Semaphore(&abb_sem);
577 }
578 #endif // ABB_SEMAPHORE_PROTECTION
579
580 // Stop the SPI clock
581 #ifdef SPI_CLK_LOW_POWER
582 SPI_CLK_DISABLE
583 #endif
584 }
585
586
587
588 /*-----------------------------------------------------------------------*/
589 /* ABB_Read_ADC() */
590 /* */
591 /* This function manages all the spi serial transfer to read all the */
592 /* ABB ADC conversion channels. */
593 /* Stores the result in Buff parameter. */
594 /* */
595 /*-----------------------------------------------------------------------*/
596 void ABB_Read_ADC(SYS_UWORD16 *Buff)
597 {
598 volatile SYS_UWORD16 status;
599
600 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
601 SPI_Ready_for_RDWR
602 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
603
604 #if (ABB_SEMAPHORE_PROTECTION == 3)
605
606 // check if the semaphore has been correctly created and try to obtain it.
607 // if the semaphore cannot be obtained, the task is suspended and then resumed
608 // as soon as the semaphore is released.
609 if(&abb_sem != 0)
610 {
611 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
612 }
613 #endif // ABB_SEMAPHORE_PROTECTION
614
615 // This transmission changes the register page in the ABB for usp to pg0.
616 ABB_SetPage(PAGE0);
617
618 /* Read all ABB ADC registers */
619 *Buff++ = ABB_ReadRegister(VBATREG);
620 *Buff++ = ABB_ReadRegister(VCHGREG);
621 *Buff++ = ABB_ReadRegister(ICHGREG);
622 *Buff++ = ABB_ReadRegister(VBKPREG);
623 *Buff++ = ABB_ReadRegister(ADIN1REG);
624 *Buff++ = ABB_ReadRegister(ADIN2REG);
625 *Buff++ = ABB_ReadRegister(ADIN3REG);
626
627 #if (ANALOG ==1)
628 *Buff++ = ABB_ReadRegister(ADIN4XREG);
629 *Buff++ = ABB_ReadRegister(ADIN5YREG);
630 #elif (ANALOG ==2)
631 *Buff++ = ABB_ReadRegister(ADIN4REG);
632 #elif (ANALOG == 3)
633 *Buff++ = ABB_ReadRegister(ADIN4REG);
634 *Buff++ = ABB_ReadRegister(ADIN5REG);
635 #endif // ANALOG
636
637 #if (ABB_SEMAPHORE_PROTECTION == 3)
638 // release the semaphore only if it has correctly been created.
639 if(&abb_sem != 0)
640 {
641 NU_Release_Semaphore(&abb_sem);
642 }
643 #endif // ABB_SEMAPHORE_PROTECTION
644
645 // Stop the SPI clock
646 #ifdef SPI_CLK_LOW_POWER
647 SPI_CLK_DISABLE
648 #endif
649 }
650
651
652
653 /*-----------------------------------------------------------------------*/
654 /* ABB_Conf_ADC() */
655 /* */
656 /* This function manages all the spi serial transfer to: */
657 /* - select the ABB ADC channels to be converted */
658 /* - enable/disable EOC interrupt */
659 /* */
660 /*-----------------------------------------------------------------------*/
661 void ABB_Conf_ADC(SYS_UWORD16 Channels, SYS_UWORD16 ItVal)
662 {
663 volatile SYS_UWORD16 status;
664 SYS_UWORD16 reg_val;
665
666 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
667 SPI_Ready_for_RDWR
668 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
669
670 #if (ABB_SEMAPHORE_PROTECTION == 3)
671
672 // check if the semaphore has been correctly created and try to obtain it.
673 // if the semaphore cannot be obtained, the task is suspended and then resumed
674 // as soon as the semaphore is released.
675 if(&abb_sem != 0)
676 {
677 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
678 }
679 #endif // ABB_SEMAPHORE_PROTECTION
680
681 // This transmission changes the register page in the ABB for usp to pg0.
682 ABB_SetPage(PAGE0);
683
684 /* select ADC channels to be converted */
685 #if (ANALOG == 1)
686 ABB_WriteRegister(MADCCTRL1, Channels);
687 #elif ((ANALOG == 2) || (ANALOG == 3))
688 ABB_WriteRegister(MADCCTRL, Channels);
689 #endif
690
691 reg_val = ABB_ReadRegister(ITMASK);
692
693 // This transmission configure the End Of Conversion IT without modifying other bits in the same register.
694 if(ItVal == EOC_INTENA)
695 ABB_WriteRegister(ITMASK, reg_val & EOC_INTENA);
696 else if(ItVal == EOC_INTMASK)
697 ABB_WriteRegister(ITMASK, reg_val | EOC_INTMASK);
698
699 #if (ABB_SEMAPHORE_PROTECTION == 3)
700 // release the semaphore only if it has correctly been created.
701 if(&abb_sem != 0)
702 {
703 NU_Release_Semaphore(&abb_sem);
704 }
705 #endif // ABB_SEMAPHORE_PROTECTION
706
707 // Stop the SPI clock
708 #ifdef SPI_CLK_LOW_POWER
709 SPI_CLK_DISABLE
710 #endif
711 }
712
713
714
715
716 /*------------------------------------------------------------------------*/
717 /* ABB_sleep() */
718 /* */
719 /* This function disables the DCDC and returns to PAGE 0. It stops then */
720 /* the 13MHz clock in ABB. A wait loop s required to allow */
721 /* first slow access to ABB clock register. */
722 /* */
723 /* WARNING !! : this function must not be protected by semaphore !! */
724 /* */
725 /* Returns AFC value. */
726 /* */
727 /*------------------------------------------------------------------------*/
728 SYS_UWORD32 ABB_sleep(SYS_UWORD8 sleep_performed, SYS_WORD16 afc)
729 {
730 volatile SYS_UWORD16 status;
731 SYS_UWORD32 afcout_index;
732 volatile SYS_UWORD16 nb_it;
733 SYS_UWORD16 reg_val;
734
735 // table for AFC allowed values during Sleep mode. First 5th elements
736 // are related to positive AFC values, last 5th to negative ones.
737 static const SYS_UWORD32 Afcout_T[10] =
738 {0x0f,0x1f,0x3f,0x7f,0xff,0x00,0x01,0x03,0x07,0x0f};
739
740 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
741 SPI_Ready_for_RDWR
742 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
743
744 // COMPUTATION AND PROGRAMMING OF AFC VALUE
745 //---------------------------------------------------
746 if(afc & 0x1000)
747 afcout_index = ((afc + 512)>>10) + 1;
748 else
749 afcout_index = (afc + 512)>>10;
750
751 if (sleep_performed == FRAME_STOP) // Big sleep
752 {
753 #if ((ANALOG == 2) || (ANALOG == 3))
754 //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP ////////////////////////////
755 #endif
756
757 }
758 else // Deep sleep
759 {
760 #if(ANALOG == 1)
761 // SELECTION OF AFC TEST MODE FOR OMEGA
762 //---------------------------------------------------
763 // This test configuration allows access on the AFCOUT register
764 ABB_SetPage(PAGE1);
765
766 // This transmission enables OMEGA test register.
767 ABB_WriteRegister(TAPCTRL, 0x01);
768
769 // This transmission selects OMEGA test instruction.
770 ABB_WriteRegister(TAPREG, AFCTEST);
771
772 // Set AFCOUT to 0.
773 ABB_WriteRegister(AFCOUT, 0x00 >> 6);
774
775 ABB_SetPage(PAGE0);
776
777 #elif (ANALOG == 2)
778 // This configuration allows access on the AFCOUT register
779 ABB_SetPage(PAGE1);
780
781 // Read AFCCTLADD value and enable USP access to AFCOUT register
782 reg_val = (ABB_ReadRegister(AFCCTLADD) | 0x04);
783
784 ABB_WriteRegister(AFCCTLADD, reg_val);
785
786 // Set AFCOUT to 0.
787 ABB_WriteRegister(AFCOUT, 0x00);
788
789 // Read BCICONF value and cut the measurement bridge of BB cut the BB charge.
790 reg_val = ABB_ReadRegister(BCICONF) & 0x039f;
791
792 ABB_WriteRegister(BCICONF, reg_val);
793
794 // Disable the ABB test mode
795 ABB_WriteRegister(TAPCTRL, 0x00);
796
797 ABB_SetPage(PAGE0);
798
799 // Read BCICTL1 value and cut the measurement bridge of MB.
800 reg_val = ABB_ReadRegister(BCICTL1) & 0x03fe;
801
802 ABB_WriteRegister(BCICTL1, reg_val);
803 #endif
804
805 #if (ANALOG == 3) // Nothing to be done as MB and BB measurement bridges are automatically disconnected
806 // in Syren during sleep mode. BB charge stays enabled
807 ABB_SetPage(PAGE1); // Initialize transmit reg_num. This transmission
808 // change the register page in IOTA for usp to pg1
809
810 ABB_WriteRegister(TAPCTRL, 0x00); // Disable Syren test mode
811
812 ABB_SetPage(PAGE0);
813 #endif
814
815 // switch off MADC, AFC, AUXDAC, VOICE.
816 ABB_WriteRegister(TOGBR1, 0x155);
817
818 // Switch off Analog supply LDO
819 //-----------------------------
820 #if (ANALOG == 1)
821 ABB_SetPage(PAGE1);
822
823 // Read VRPCCTL3 register value and switch off VR3.
824 reg_val = ABB_ReadRegister(VRPCCTRL3) & 0x3df;
825
826 ABB_WriteRegister(VRPCCTRL3, reg_val);
827
828 #elif (ANALOG == 2)
829 // Read VRPCSTS register value and extract status of meaningfull inputs.
830 reg_val = ABB_ReadRegister(VRPCSTS) & 0x0070;
831
832 if (reg_val == 0x30)
833 {
834 // start the SLPDLY counter in order to switch the ABB in sleep mode. This transmission sets IOTA sleep bit.
835 ABB_WriteRegister(VRPCDEV, 0x02);
836 }
837
838 // Dummy transmission to clean of ABB bus. This transmission accesses IOTA address 0 in "read".
839 ABB_WriteRegister(0x0000 | 0x0001, 0x0000);
840
841 #elif (ANALOG == 3)
842 // In Syren there is no need to check for VRPCCFG as wake up prioritys are changed
843 // start the SLPDLY counter in order to switch the ABB in sleep mode
844 ABB_WriteRegister(VRPCDEV,0x02); // Initialize transmit reg_num. This transmission
845 // set Syren sleep bit
846 /*
847 // Dummy transmission to clean of ABB bus. This transmission accesses SYREN address 0 in "read".
848 ABB_WriteRegister(0x0000 | 0x0001, 0x0000);
849 */
850 #endif
851
852 // Switch to low frequency clock
853 ABB_stop_13M();
854 }
855
856 // Stop the SPI clock
857 #ifdef SPI_CLK_LOW_POWER
858 SPI_CLK_DISABLE
859 #endif
860
861 #if (OP_L1_STANDALONE == 1)
862 #if (CHIPSET == 12)
863 // GPIO_InitAllPull(ALL_ONE); // enable all GPIO internal pull
864 // workaround to set APLL_DIV_CLK( internal PU) at high level
865 // by default APLL_DIV_CLK is low pulling 80uA on VRIO
866 // *(SYS_UWORD16*) (0xFFFFFD90)= 0x01;//CNTL_APLL_DIV_CLK -> APLL_CLK_DIV != 0
867 // *(SYS_UWORD16*) (0xFFFEF030)= 0x10;// DPLL mode
868 #endif
869 #endif
870 return(Afcout_T[afcout_index]);
871 }
872
873
874 /*------------------------------------------------------------------------*/
875 /* ABB_wakeup() */
876 /* */
877 /* This function sets the 13MHz clock working in ABB. A wait loop */
878 /* is required to allow first slow access to ABB clock register. */
879 /* Then it re-enables DCDC and returns to PAGE 0. */
880 /* */
881 /* WARNING !! : this function must not be protected by semaphore !! */
882 /* */
883 /*------------------------------------------------------------------------*/
884 void ABB_wakeup(SYS_UWORD8 sleep_performed, SYS_WORD16 afc)
885 {
886 volatile SYS_UWORD16 status;
887 SYS_UWORD16 reg_val;
888
889 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
890 SPI_Ready_for_RDWR
891 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
892
893 if (sleep_performed == FRAME_STOP) // Big sleep
894 {
895 #if ((ANALOG == 2) || (ANALOG == 3))
896 //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP WAKEUP ////////////////////////////
897 #endif
898 }
899 else // Deep sleep
900 {
901 #if (OP_L1_STANDALONE == 1)
902 #if (CHIPSET == 12)
903 // restore context from
904 // workaround to set APLL_DIV_CLK( internal PU) at high level
905 // by default APLL_DIV_CLK is low pulling 80uA on VRIO
906 // *(SYS_UWORD16*) (0xFFFFFD90)= 0x00;//CNTL_APLL_DIV_CLK -> APLL_DIV_CLK != 0
907 // *(SYS_UWORD16*) (0xFFFEF030)= 0x00;// DPLL mode
908 #endif
909 #endif
910
911 // Restitutes 13MHZ Clock to ABB
912 ABB_free_13M();
913
914 // Switch ON Analog supply LDO
915 #if (ANALOG == 1)
916 ABB_SetPage(PAGE1);
917
918 // Read VRPCCTL3 register value and switch on VR3.
919 reg_val = ABB_ReadRegister(VRPCCTRL3) | 0x020;
920
921 ABB_WriteRegister(VRPCCTRL3, reg_val);
922 ABB_SetPage(PAGE0);
923 #endif
924
925 // This transmission switches on MADC, AFC.
926 ABB_WriteRegister(TOGBR1, 0x280);
927
928 // This transmission sets the AUXAFC2.
929 ABB_WriteRegister(AUXAFC2, ((afc>>10) & 0x7));
930
931 // This transmission sets the AUXAFC1.
932 ABB_WriteRegister(AUXAFC1, (afc & 0x3ff));
933
934 #if (ANALOG == 1)
935 // Remove AFC test mode
936 ABB_SetPage(PAGE1);
937
938 // This transmission select Omega test instruction.
939 ABB_WriteRegister(TAPREG, TSPTEST1);
940
941 // Disable test mode selection
942 // This transmission disables Omega test register.
943 ABB_WriteRegister(TAPCTRL, 0x00 >> 6);
944
945 ABB_SetPage(PAGE0);
946
947 #elif (ANALOG == 2)
948 ABB_SetPage(PAGE1);
949
950 // Read AFCCTLADD register value and disable USP access to AFCOUT register.
951 reg_val = ABB_ReadRegister(AFCCTLADD) & ~0x04;
952
953 ABB_WriteRegister(AFCCTLADD, reg_val);
954
955 // Read BCICONF register value and enable BB measurement bridge enable BB charge.
956 reg_val = ABB_ReadRegister(BCICONF) | 0x0060;
957
958 ABB_WriteRegister(BCICONF, reg_val);
959
960
961 /* *************************************************************************************************** */
962 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value.
963 reg_val = ABB_ReadRegister(VRPCCFG) & 0x1e0;
964 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg_val));
965
966 // Enable the ABB test mode
967 ABB_WriteRegister(TAPCTRL, 0x01);
968 ABB_WriteRegister(TAPREG, TSPEN);
969 ABB_SetPage(PAGE0);
970
971 // Read BCICTL1 register value and enable MB measurement bridge and cut the measurement bridge of MB.
972 reg_val = ABB_ReadRegister(BCICTL1) | 0x0001;
973
974 ABB_WriteRegister(BCICTL1, reg_val);
975 #endif
976
977 #if (ANALOG == 3)
978
979 ABB_SetPage(PAGE1);
980
981 /* *************************************************************************************************** */
982 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value.
983 reg_val = ABB_ReadRegister(VRPCCFG) & 0x1e0;
984 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg_val));
985
986 /* ************************ SELECTION OF TEST MODE FOR ABB=3 *****************************************/
987 /* This test configuration allows visibility on test pins TAPCTRL has not to be reset */
988 /* ****************************************************************************************************/
989
990 ABB_WriteRegister(TAPCTRL, 0x01); // Initialize the transmit register
991 // This transmission enables IOTA test register
992
993 ABB_WriteRegister(TAPREG, TSPEN);
994 // This transmission select IOTA test instruction
995 // This transmission select IOTA test instruction
996 /**************************************************************************************************** */
997
998 ABB_SetPage(PAGE0); // Initialize transmit reg_num. This transmission
999 #endif
1000 }
1001
1002 // Stop the SPI clock
1003 #ifdef SPI_CLK_LOW_POWER
1004 SPI_CLK_DISABLE
1005 #endif
1006 }
1007
1008 /*------------------------------------------------------------------------*/
1009 /* ABB_wa_VRPC() */
1010 /* */
1011 /* This function initializes the VRPCCTRL1 or VRPCSIM register */
1012 /* according to the ABB used. */
1013 /* */
1014 /*------------------------------------------------------------------------*/
1015 void ABB_wa_VRPC(SYS_UWORD16 value)
1016 {
1017 volatile SYS_UWORD16 status;
1018
1019 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
1020 SPI_Ready_for_WR
1021 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
1022
1023 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
1024
1025 // check if the semaphore has been correctly created and try to obtain it.
1026 // if the semaphore cannot be obtained, the task is suspended and then resumed
1027 // as soon as the semaphore is released.
1028 if(&abb_sem != 0)
1029 {
1030 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
1031 }
1032 #endif // ABB_SEMAPHORE_PROTECTION
1033
1034 ABB_SetPage(PAGE1);
1035
1036 #if (ANALOG == 1)
1037 // This transmission initializes the VRPCCTL1 register.
1038 ABB_WriteRegister(VRPCCTRL1, value);
1039
1040 #elif (ANALOG == 2)
1041 // This transmission initializes the VRPCSIM register.
1042 ABB_WriteRegister(VRPCSIM, value);
1043
1044 #elif (ANALOG == 3)
1045 // This transmission initializes the VRPCSIMR register.
1046 ABB_WriteRegister(VRPCSIMR, value);
1047
1048 #endif
1049
1050 ABB_SetPage(PAGE0);
1051
1052 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
1053 // release the semaphore only if it has correctly been created.
1054 if(&abb_sem != 0)
1055 {
1056 NU_Release_Semaphore(&abb_sem);
1057 }
1058 #endif // ABB_SEMAPHORE_PROTECTION
1059
1060 // Stop the SPI clock
1061 #ifdef SPI_CLK_LOW_POWER
1062 SPI_CLK_DISABLE
1063 #endif
1064 }
1065
1066
1067 /*-----------------------------------------------------------------------*/
1068 /* ABB_Write_Uplink_Data() */
1069 /* */
1070 /* This function uses the SPI to write to ABB uplink buffer. */
1071 /* */
1072 /*-----------------------------------------------------------------------*/
1073 void ABB_Write_Uplink_Data(SYS_UWORD16 *TM_ul_data)
1074 {
1075 SYS_UWORD8 i;
1076 volatile SYS_UWORD16 status;
1077
1078 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
1079 SPI_Ready_for_WR
1080 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
1081
1082 // Select Page 0 for TOGBR2
1083 ABB_SetPage(PAGE0);
1084
1085 // Initialize pointer of burst buffer 1 : IBUFPTR is bit 10 of TOGBR2
1086 ABB_WriteRegister(TOGBR2, 0x10);
1087
1088 // Clear, assuming that it works like IBUFPTR of Vega
1089 ABB_WriteRegister(TOGBR2, 0x0);
1090
1091 // Write the ramp data
1092 for (i=0;i<16;i++)
1093 ABB_WriteRegister(BULDATA1_2, TM_ul_data[i]>>6);
1094
1095 // Stop the SPI clock
1096 #ifdef SPI_CLK_LOW_POWER
1097 SPI_CLK_DISABLE
1098 #endif
1099 }
1100
1101 //////////////////////// IDEV-INLO integration of sleep mode for Syren ///////////////////////////////////////
1102
1103 #if (ANALOG == 3)
1104
1105 // Syren Sleep configuration function --------------------------
1106 void Syren_Sleep_Config(SYS_UWORD16 sleep_type,SYS_UWORD16 bg_select, SYS_UWORD16 sleep_delay)
1107 {
1108 volatile SYS_UWORD16 status,sl_ldo_stat;
1109
1110 ABB_SetPage(PAGE1); // Initialize transmit register. This transmission
1111 // change the register page in ABB for usp to pg1
1112
1113 ABB_WriteRegister(VRPCCFG, sleep_delay); // write delay value
1114
1115 sl_ldo_stat = ((sleep_type<<9|bg_select<<8) & 0x0374);
1116
1117 ABB_WriteRegister(VRPCMSKSLP, sl_ldo_stat); // write sleep ldo configuration
1118
1119 ABB_SetPage(PAGE0); // Initialize transmit register. This transmission
1120 // change the register page in ABB for usp to pg0
1121 }
1122 #endif
1123
1124
1125 #if (OP_L1_STANDALONE == 0)
1126 /*-----------------------------------------------------------------------*/
1127 /* ABB_Power_Off() */
1128 /* */
1129 /* This function uses the SPI to switch off the ABB. */
1130 /* */
1131 /*-----------------------------------------------------------------------*/
1132 void ABB_Power_Off(void)
1133 {
1134 // Wait until all necessary actions are performed (write in FFS, etc...) to power-off the board (empirical value - 30 ticks).
1135 NU_Sleep (30);
1136
1137 // Wait also until <ON/OFF> key is released.
1138 // This is needed to avoid, if the power key is pressed for a long time, to switch
1139 // ON-switch OFF the mobile, until the power key is released.
1140 #if((ANALOG == 1) || (ANALOG == 2))
1141 while ((ABB_Read_Status() & ONREFLT) == PWR_OFF_KEY_PRESSED) {
1142 #elif(ANALOG == 3)
1143 while ((ABB_Read_Register_on_page(PAGE1, VRPCCFG) & PWOND) == PWR_OFF_KEY_PRESSED) {
1144 #endif
1145
1146 NU_Sleep (1); }
1147
1148 #if 0 // FreeCalypso
1149 BZ_KeyBeep_OFF();
1150 #endif
1151
1152 #if(ANALOG == 1)
1153 ABB_Write_Register_on_page(PAGE0, VRPCCTL2, 0x00EE);
1154 #elif((ANALOG == 2) || (ANALOG == 3))
1155 ABB_Write_Register_on_page(PAGE0, VRPCDEV, 0x0001);
1156 #endif
1157 }
1158 #endif