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comparison bsp/abb+spi/abb_inline.h @ 0:75a11d740a02

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initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 09 Jun 2016 00:02:41 +0000
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1 /******************************************************************************/
2 /* TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION */
3 /* */
4 /* Property of Texas Instruments -- For Unrestricted Internal Use Only */
5 /* Unauthorized reproduction and/or distribution is strictly prohibited. This*/
6 /* product is protected under copyright law and trade secret law as an*/
7 /* unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All*/
8 /* rights reserved. */
9 /* */
10 /* */
11 /* Filename : abb_inline.h */
12 /* */
13 /* Description : inline functions to drive the ABB device. */
14 /* The Serial Port Interface is used to connect the TI */
15 /* Analog BaseBand (ABB). */
16 /* It is assumed that the ABB is connected as the SPI */
17 /* device 0. */
18 /* */
19 /* Author : Pascal PUEL */
20 /* */
21 /* Version number : 1.0 */
22 /* */
23 /* Date and time : Dec 2002 */
24 /* */
25 /* Previous delta : Creation */
26 /* */
27 /******************************************************************************/
28
29 #ifndef __ABB_INLINE_H__
30 #define __ABB_INLINE_H__
31
32 #include "../../include/config.h"
33 #include "../../include/sys_types.h"
34
35 #include "spi_drv.h"
36
37 // MACROS
38 #define ABB_WRITE_REG(reg, data) { \
39 SPI_WRITE_TX_MSB((data << 6) | reg) \
40 SPI_START_WRITE }
41
42 #define ABB_READ_REG(reg) { \
43 SPI_WRITE_TX_MSB(reg | 1) \
44 SPI_START_READ }
45
46
47 #define ABB_SET_PAGE(page) ABB_WRITE_REG(PAGEREG, page)
48
49 #define SEVEN_CYCLES_13M_NS 539
50
51 // INLINE FUNCTIONS
52 /*-----------------------------------------------------------------------*/
53 /* ABB_SetPage() */
54 /* */
55 /* This function sets the right page in the ABB register PAGEREG. */
56 /* */
57 /*-----------------------------------------------------------------------*/
58 static inline void ABB_SetPage(SYS_UWORD16 page)
59 {
60 volatile SYS_UWORD16 status;
61
62 ABB_SET_PAGE(page);
63 while(((status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS) & WE_ST) == 0);
64
65 // if IBIC is already processing another request (from the BSP)
66 // the USP request is delayed by 3 clock cycles
67 // which gives a total of 7 clock cycles ( = 539 ns at 13 MHz) in the worst case
68 wait_ARM_cycles(convert_nanosec_to_cycles(SEVEN_CYCLES_13M_NS));
69 }
70
71
72 /*-----------------------------------------------------------------------*/
73 /* ABB_WriteRegister() */
74 /* */
75 /* This function writes "data" in the ABB register "abb_reg". */
76 /* */
77 /*-----------------------------------------------------------------------*/
78 static inline void ABB_WriteRegister(SYS_UWORD16 abb_reg, SYS_UWORD16 data)
79 {
80 volatile SYS_UWORD16 status;
81
82 ABB_WRITE_REG(abb_reg, data);
83 while(((status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS) & WE_ST) == 0);
84
85 // if IBIC is already processing another request (from the BSP)
86 // the USP request is delayed by 3 clock cycles
87 // which gives a total of 7 clock cycles ( = 539 ns at 13 MHz) in the worst case
88 wait_ARM_cycles(convert_nanosec_to_cycles(SEVEN_CYCLES_13M_NS));
89
90 }
91
92
93 /*-----------------------------------------------------------------------*/
94 /* ABB_ReadRegister() */
95 /* */
96 /* This function reads the ABB register "abb_reg" and returns */
97 /* the real register value. */
98 /* */
99 /*-----------------------------------------------------------------------*/
100 static inline SYS_UWORD16 ABB_ReadRegister(SYS_UWORD16 abb_reg)
101 {
102 volatile SYS_UWORD16 status;
103
104 // First part of read access to the ABB register
105 ABB_READ_REG(abb_reg);
106 while(((status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS) & RE_ST) == 0);
107
108 // if IBIC is already processing another request (from the BSP)
109 // the USP request is delayed by 3 clock cycles
110 // which gives a total of 7 clock cycles ( = 539 ns at 13 MHz) in the worst case
111 wait_ARM_cycles(convert_nanosec_to_cycles(SEVEN_CYCLES_13M_NS));
112
113 // Second part of read access to the ABB register
114 ABB_READ_REG(abb_reg);
115 while(((status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS) & RE_ST) == 0);
116
117 // if IBIC is already processing another request (from the BSP)
118 // the USP request is delayed by 3 clock cycles
119 // which gives a total of 7 clock cycles ( = 539 ns at 13 MHz) in the worst case
120 wait_ARM_cycles(convert_nanosec_to_cycles(SEVEN_CYCLES_13M_NS));
121
122 return ((SPI_ReadRX_LSB() >> 6) & 0x3ff);
123 }
124
125
126 #endif // __ABB_INLINE_H__