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comparison bsp/armio.c @ 0:75a11d740a02

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initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 09 Jun 2016 00:02:41 +0000
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1 /*
2 * ARMIO.C
3 *
4 *
5 * Control diagnostic bits
6 *
7 * Reference : GCS207
8 *
9 */
10
11
12 #include "../include/config.h"
13 #include "../include/sys_types.h"
14
15 #include "mem.h"
16 #include "iq.h"
17 #include "armio.h"
18
19 #if 0
20 /* FreeCalypso: abb.h hasn't been integrated yet */
21 #include "abb.h" // for AI_Power function : to be removed, use ABB_Power_Off in abb.c file instead !!!
22 #endif
23
24 #if (CHIPSET != 12)
25 /*
26 * AI_EnableBit
27 *
28 * Enable ARMIO input/output bit (see CLKM module specification)
29 */
30 void AI_EnableBit(int bit)
31 {
32 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) |= (1<<bit);
33 }
34
35 /*
36 * AI_DisableBit
37 *
38 * Disable ARMIO input/output bit (see CLKM module specification)
39 */
40 void AI_DisableBit(int bit)
41 {
42 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) &= ~(1<<bit);
43 }
44
45 #endif /* CHIPSET != 12 */
46
47 /*
48 * AI_SetBit
49 *
50 * Switch-on one bit
51 */
52 void AI_SetBit(int bit)
53 {
54 *((volatile SYS_UWORD16 *) ARMIO_OUT) |= (1<<bit);
55 }
56
57 /*
58 * AI_ResetBit
59 *
60 * Switch-off one bit
61 */
62 void AI_ResetBit(int bit)
63 {
64 *((volatile SYS_UWORD16 *) ARMIO_OUT) &= ~(1<<bit);
65 }
66
67 /*
68 * AI_ConfigBitAsOutput
69 *
70 * Set this bit as an output
71 */
72 void AI_ConfigBitAsOutput(int bit)
73 {
74 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) &= ~(1<<bit);
75 }
76
77 /*
78 * AI_ConfigBitAsInput
79 *
80 * Set this bit as an input
81 */
82 void AI_ConfigBitAsInput(int bit)
83 {
84 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) |= (1<<bit);
85 }
86
87
88 /*
89 * AI_ReadBit
90 *
91 * Read value in register
92 */
93 SYS_BOOL AI_ReadBit(int bit)
94 {
95 if ((*((volatile SYS_UWORD16 *) ARMIO_IN)) & (1<<bit))
96 return (1);
97 else
98 return (0);
99 }
100
101 /*
102 * AI_Power
103 *
104 * Switch-on or off the board
105 *
106 * Parameters : SYS_UWORD8 power: 1 to power-on (maintain power)
107 * 0 to power-off
108 *
109 */
110 // #if (!OP_L1_STANDALONE)
111 #if 0
112 void AI_Power(SYS_UWORD8 power)
113 {
114 if (power == 0)
115 {
116 ABB_Power_Off();
117 }
118 }
119 #endif
120
121 /*
122 * AI_ResetIoConfig
123 *
124 * Reset all default IO configurations
125 *
126 */
127 void AI_ResetIoConfig(void)
128 {
129 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0xFFFF; // all bits are inputs
130 #if (CHIPSET != 12)
131 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) = 0; // default config
132 #endif /* CHIPSET != 12 */
133 }
134
135
136 /*
137 * AI_ClockEnable
138 *
139 * Enable ARMIO clock module
140 *
141 */
142 void AI_ClockEnable(void)
143 {
144 *((volatile SYS_UWORD16 *) ARMIO_CNTL_REG) |= ARMIO_CLOCKEN; // set to 1 bit 5
145 }
146
147 /*
148 * The AI_InitIOConfig() function is target-specific.
149 */
150
151 #ifdef CONFIG_TARGET_GTAMODEM
152 /* version for the Openmoko GTA0x GSM modem */
153 void AI_InitIOConfig(void)
154 {
155 // reset the IOs config
156 AI_ResetIoConfig();
157
158 /*
159 * The GTA0x Calypso block is a stripped-down version of the Leonardo,
160 * reduced to the absolute minimum that is needed for a slave modem.
161 * Almost all of the unused interface pins are left unconnected, only
162 * a few are pulled externally to GND or VIO.
163 *
164 * We handle the unused pins the way TI's code does: configure them
165 * as GPIOs, then as outputs driving a fixed value (high for GPIOs 8+,
166 * low for 0-7).
167 */
168
169 /* I'll be brave and turn the unused TSPDI input into a GPIO4 output */
170 AI_EnableBit(0);
171 /* Don't want to do that for the IO5 pin though, as it's wired to SIM_IO
172 * through a resistor like on the Leonardo. */
173 AI_DisableBit(1);
174 /*
175 * The following 2 lines are straight from the Leonardo source: enable
176 * GPIO6 and GPIO8. GPIO6 takes the place of an ancient VEGA3(?) compat
177 * pin, and GPIO8 takes the place of MCUEN1 which no Leonardo-based
178 * design seems to use.
179 *
180 * Note that GPIO7 is not enabled in this version, so that pin retains
181 * its meaning as nRESET_OUT - but it's an unused output, rather than
182 * a floating input, so we are fine.
183 */
184 AI_EnableBit(2);
185 AI_EnableBit(4);
186
187 /*
188 * The GTA0x modem has no Calypso-interfaced Bluetooth, nor any other
189 * use for MCSI, aka the DSP backdoor interface. So we turn these 4 pins
190 * into GPIOs driving high output state like TI's code does in the
191 * sans-BT configuration.
192 */
193 AI_EnableBit(5);
194 AI_EnableBit(6);
195 AI_EnableBit(7);
196 AI_EnableBit(8);
197
198 /* ditto for MCUEN2 turned GPIO 13 */
199 AI_EnableBit(9);
200
201 // ARMIO_OUT register configuration :
202 // set IOs 8,9,10,11,12 and 13 as high
203 // set IOs 0 to 7 as low
204 // Falcon's note: the BP->AP interrupt line gets set low as desired
205 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F00;
206
207 // ARMIO_CNTL_REG register configuration :
208 // set IOs 0,1,6,8,9,10,11,12 and 13 as outputs.
209 // Falcon's addition: set 2, 3 and 4 as outputs too,
210 // as they are no-connects on the board.
211
212 AI_ConfigBitAsOutput(0);
213 AI_ConfigBitAsOutput(1);
214 AI_ConfigBitAsOutput(2);
215 AI_ConfigBitAsOutput(3);
216 AI_ConfigBitAsOutput(4);
217 AI_ConfigBitAsOutput(6);
218 AI_ConfigBitAsOutput(8);
219 AI_ConfigBitAsOutput(9);
220 AI_ConfigBitAsOutput(10);
221 AI_ConfigBitAsOutput(11);
222 AI_ConfigBitAsOutput(12);
223 AI_ConfigBitAsOutput(13);
224 }
225 #endif
226
227 #ifdef CONFIG_TARGET_FCDEV3B
228 /* version for the to-be-built FCDEV3B board */
229 void AI_InitIOConfig(void)
230 {
231 // reset the IOs config
232 AI_ResetIoConfig();
233
234 AI_EnableBit(0);
235 AI_DisableBit(1);
236 AI_EnableBit(2);
237 AI_EnableBit(4);
238
239 /*
240 * The MCSI pins are brought out to a header with the intent of
241 * facilitating experimentation with this interface, so let's put them
242 * into the MCSI configuration.
243 */
244 AI_DisableBit(5);
245 AI_DisableBit(6);
246 AI_DisableBit(7);
247 AI_DisableBit(8);
248
249 AI_EnableBit(9);
250
251 // ARMIO_OUT register configuration: same as TI's code sets
252 // the loudspeaker PA is disabled on boot for the time being
253 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F00;
254
255 // ARMIO_CNTL_REG register configuration:
256 // most of the pins are no-connects, make them outputs
257
258 AI_ConfigBitAsOutput(0);
259 AI_ConfigBitAsOutput(1);
260 AI_ConfigBitAsOutput(2);
261 AI_ConfigBitAsOutput(4);
262 AI_ConfigBitAsOutput(6);
263 AI_ConfigBitAsOutput(8);
264 AI_ConfigBitAsOutput(9);
265 AI_ConfigBitAsOutput(13);
266 }
267 #endif
268
269 #ifdef CONFIG_TARGET_PIRELLI
270 /* version for Pirelli DP-L10 */
271 void AI_InitIOConfig(void)
272 {
273 // reset the IOs config
274 AI_ResetIoConfig();
275
276 /*
277 * In the case of the Pirelli, our understanding of the hardware
278 * is severely crippled by the lack of schematics and the difficulty of
279 * reverse engineering from steve-m's PCB layer grind-down scans.
280 *
281 * The folllowing ARMIO configuration has been copied from OsmocomBB.
282 */
283 AI_EnableBit(0);
284 AI_EnableBit(1);
285 AI_EnableBit(2);
286 AI_EnableBit(3);
287 AI_EnableBit(4);
288 AI_EnableBit(9);
289 /* GPIO out all zeros */
290 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000;
291 /* setup outputs like OsmocomBB does */
292 AI_ConfigBitAsOutput(1);
293 AI_ConfigBitAsOutput(4);
294 AI_ConfigBitAsOutput(7);
295 }
296 #endif
297
298 #ifdef CONFIG_TARGET_COMPAL
299 /* same for all C1xx variants */
300 void AI_InitIOConfig(void)
301 {
302 // reset the IOs config
303 AI_ResetIoConfig();
304
305 /*
306 * I don't feel like scrutinizing every Calypso signal on the C139
307 * and C155 schematics right now, so for now we'll use a GPIO
308 * configuration based on OsmocomBB.
309 */
310 /* GPIO out all zeros */
311 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000;
312 /* make GPIOs 1 and 3 outputs */
313 AI_ConfigBitAsOutput(1);
314 AI_ConfigBitAsOutput(3);
315 }
316 #endif
317
318 /*
319 * AI_SelectIOForIT
320 *
321 * Select which IO will be used to generate an interrupt.
322 * 'Edge' specifies if interrup must be detected on falling or rising edge.
323 *
324 * Warning: parameters are not checked.
325 */
326
327 void AI_SelectIOForIT (SYS_UWORD16 Pin, SYS_UWORD16 Edge)
328 {
329 #if (CHIPSET == 12)
330 /*
331 * Update INTERRUPT_LEVEL_REG with Edge configuration on Pin selection
332 */
333 GPIO_INTERRUPT_LEVEL_REG = (Edge & 0x0001) << Pin;
334
335 /*
336 * Update INTERRUPT_MASK_REG to enable interrupt generation on Pin selection
337 */
338 GPIO_INTERRUPT_MASK_REG = 1 << Pin;
339 #else
340 /*
341 * Bit SET_GPIO_EVENT_MODE (bit 0) is set to enable the GPIO event mode.
342 */
343
344 *((volatile SYS_UWORD16 *) ARMIO_GPIO_EVENT_MODE) = (Pin << 1) + (Edge << 5) + 1;
345 #endif
346 }
347
348 #if (CHIPSET != 12)
349 /*
350 * AI_CheckITSource
351 *
352 * Check if the interrupt specified by 'Source' is active or not.
353 *
354 * Output: 0: IT is not active
355 * 1: IT is active
356 *
357 * Warning: parameters are not checked.
358 *
359 * Warning: If the keypad and GPIO interrupts may occur the GPIO interrupt
360 * must be checked first because the GPIO status bit is reset when
361 * the register is read.
362 */
363
364 int AI_CheckITSource (SYS_UWORD16 Source)
365 {
366 return (*((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_INT) & Source ? 1 : 0);
367 }
368
369 /*
370 * AI_UnmaskIT
371 *
372 * Unmask the IT specified by 'Source' (keyboard or GPIO).
373 *
374 * Warning: parameters are not checked.
375 */
376
377 void AI_UnmaskIT (SYS_UWORD16 Source)
378 {
379 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) &= ~Source;
380 }
381
382 /*
383 * AI_MaskIT
384 *
385 * Mask the IT specified by 'Source' (keyboard or GPIO).
386 *
387 * Warning: parameters are not checked.
388 */
389
390 void AI_MaskIT (SYS_UWORD16 Source)
391 {
392 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) |= Source;
393 }
394 #endif /* CHIPSET != 12 */
395
396 #if (CHIPSET == 12)
397
398 void AI_MaskIT(SYS_UWORD16 d_io_number) {
399 GPIO_INTERRUPT_MASK_REG |= (1 << d_io_number);
400 } /* f_gpio_mask_it() */
401
402 void AI_UnmaskIT(SYS_UWORD16 d_io_number) {
403 GPIO_INTERRUPT_MASK_REG &= ~(1 << d_io_number);
404 } /* f_gpio_unmask_it() */
405
406 #endif