FreeCalypso > hg > freecalypso-citrine

comparison bsp/iq.h @ 0:75a11d740a02

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initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 09 Jun 2016 00:02:41 +0000
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1 /******************************************************************************
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
3
4 Property of Texas Instruments -- For Unrestricted Internal Use Only
5 Unauthorized reproduction and/or distribution is strictly prohibited. This
6 product is protected under copyright law and trade secret law as an
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
8 rights reserved.
9
10
11 Filename : iq.h
12
13 Description : Interrupt header
14
15 Project : drivers
16
17 Author : pmonteil@tif.ti.com Patrice Monteil.
18
19 Version number : 1.13
20
21 Date and time : 01/30/01 10:22:22
22
23 Previous delta : 12/19/00 14:22:53
24
25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/RELEASE_GPRS/drivers1/common/SCCS/s.iq.h
26
27 Sccs Id (SID) : '@(#) iq.h 1.13 01/30/01 10:22:22 '
28
29
30 *****************************************************************************/
31
32 #include "../include/config.h"
33 #include "../include/sys_types.h"
34
35 // Hardware driver library build number
36 #define IQ_BUILD 1
37
38 #define WS_MASK 0x001F
39
40 #if (CHIPSET == 4)
41 #define IQ_NUM_INT 20
42 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 9))
43 #define IQ_NUM_INT 25
44 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)
45 #define IQ_NUM_INT 21
46 #elif (CHIPSET == 12)
47 #define IQ_NUM_INT 32 // 2nd level interrupt handler is not considered here
48 #else
49 #define IQ_NUM_INT 16
50 #endif
51
52
53 #define IRQ 0
54 #define FIQ 1
55
56 /*
57 * Interrupt bit numbers
58 */
59 #define IQ_WATCHDOG 0
60
61 #define IQ_TIM1 1
62 #define IQ_TIM2 2
63 #define IQ_TSP 3
64 #define IQ_FRAME 4
65 #define IQ_PAGE 5
66 #define IQ_SIM 6
67 #define IQ_UART_IT 7
68 #if (CHIPSET == 12)
69 #define IQ_KEYBOARD 8
70 #else
71 #define IQ_ARMIO 8
72 #endif
73 #define IQ_RTC_TIMER 9
74 #define IQ_RTC_ALARM 10
75 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
76 #define IQ_TGSM 19
77 #else
78 #define IQ_TGSM 10
79 #endif
80 #define IQ_ULPD_GAUGING 11
81 #define IQ_EXT 12
82 #if ((CHIPSET == 10) || (CHIPSET == 11))
83 #define IQ_API 15
84 #endif // (CHIPSET == 10) || (CHIPSET == 11)
85 #if (CHIPSET == 12)
86 #define IQ_ARMIO 16
87 #else
88 #define IQ_SIM_CD 16
89 #endif
90
91 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
92 #define IQ_UART_IRDA_IT 18
93 #endif
94
95 #if (CHIPSET == 12)
96 #define IQ_UART_MODEM2_IT 28
97 #endif
98 #define IQ_ICR 20
99
100 #if ((CHIPSET == 5) || (CHIPSET == 6))
101 #define IQ_GEA_IT 24
102 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)
103 #define IQ_GEA_IT 20
104 #endif
105
106 /**** JTAG ID ****/
107 #define SATURN 0xB217
108 #define HERCRAM 0xB268
109 #define F731782 0xB2B5 // HERCROM OLD
110 #define F731782B 0xB2B5 // HERCROM 1M REV B
111 #define F731782A 0xB335 // HERCROM 1M REV A
112 #define F731950 0xB334 // HERCROM 2M
113 #if (CHIPSET == 4)
114 #define F731787 0xB2AC // HERCRAM20G
115 #endif
116 #if ((CHIPSET == 5) || (CHIPSET == 6))
117 #define F741709 0xB393 // HERCROM20G1
118 #endif
119 #if (CHIPSET == 9)
120 #define F751681 0xB217 // HERCROM200C035
121 #endif
122 #if (CHIPSET == 12)
123 #define F751997 0xB512 // HERCROM500G2C035
124 #endif
125
126
127 unsigned IQ_GetBuild(void);
128 void IQ_SetupInterrupts(void);
129 void IQ_Dummy(void);
130 void IQ_TimerHandler(void); /* Watchdog timer */
131 void IQ_TimerHandler1(void); /* timer 1 */
132 void IQ_TimerHandler2(void); /* timer 2 */
133 void IQ_FrameHandler(void); /* It Handler for TPU Frame IT NUCLEUS TICKS */
134 void IQ_IcrHandler32(void); // 32-bit ICR interrupt handler
135 void IQ_SetupInterruptEdge(unsigned short irq_num);
136 void IQ_SetupInterruptLevel(unsigned short irq_num);
137 void IQ_InitWaitState(unsigned short rom, unsigned short ram, unsigned short spy, unsigned short lcd, unsigned short jtag);
138 void IQ_Unmask(unsigned irqNum);
139 void IQ_Mask(unsigned irqNum);
140 void IQ_MaskAll(void);
141 /*
142 * FreeCalypso change: our starting version had #if/#elif logic
143 * selecting between declaring IQ_KeypadGPIOHandler() or IQ_KeypadHandler()
144 * based on BOARD voodoo numbers.
145 *
146 * Given that the actual Calypso interrupt covers both GPIO and keypad
147 * possibilities, let's always have an IQ_KeypadGPIOHandler() function
148 * and put whatever per-target conditionals are needed inside.
149 */
150 void IQ_KeypadGPIOHandler (void);
151 /* end of FC change */
152 SYS_UWORD16 IQ_GetJtagId(void);
153 SYS_UWORD16 IQ_GetDeviceVersion(void);
154 SYS_BOOL IQ_RamBasedLead(void);
155 SYS_UWORD16 IQ_GetRevision(void);
156 void IQ_Gauging_Handler(void);
157 void IQ_External(void);
158 void IQ_Rtc_Handler(void);
159 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
160 void IQ_RtcA_Handler(void);
161 void IQ_GsmTim_Handler(void);
162 void IQ_ApiHandler(void);
163 #else
164 void IQ_RtcA_GsmTim_Handler(void);
165 #endif
166 #if ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
167 // void IQ_GEA_Handler(void);
168 #endif
169
170 #if (TI_PROFILER == 1)
171 void IQ_InitLevel( SYS_UWORD16 inputInt,
172 SYS_UWORD16 FIQ_nIRQ,
173 SYS_UWORD16 priority,
174 SYS_UWORD16 edge );
175 #endif