FreeCalypso > hg > freecalypso-citrine
comparison bsp/niq32.c @ 0:75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 09 Jun 2016 00:02:41 +0000 |
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1 /****************************************************************************** | |
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION | |
3 | |
4 Property of Texas Instruments -- For Unrestricted Internal Use Only | |
5 Unauthorized reproduction and/or distribution is strictly prohibited. This | |
6 product is protected under copyright law and trade secret law as an | |
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All | |
8 rights reserved. | |
9 | |
10 | |
11 Filename : niq32.c | |
12 | |
13 Description : Nucleus IQ initializations | |
14 | |
15 Project : Drivers | |
16 | |
17 Author : proussel@ti.com Patrick Roussel. | |
18 | |
19 Version number : 1.25 | |
20 | |
21 Date : 08/22/03 | |
22 | |
23 Previous delta : 12/19/00 14:24:51 | |
24 | |
25 *******************************************************************************/ | |
26 | |
27 #include "../include/config.h" | |
28 #include "../include/sys_types.h" | |
29 | |
30 #include "inth.h" | |
31 #include "mem.h" | |
32 #include "iq.h" | |
33 #include "ulpd.h" | |
34 #include "armio.h" | |
35 | |
36 #include "../serial/serialswitch.h" | |
37 #include "rtc/rtc_config.h" | |
38 | |
39 #if CONFIG_INCLUDE_SIM | |
40 #include "sim.h" | |
41 #endif | |
42 | |
43 #if 0 | |
44 | |
45 /* original maze of includes */ | |
46 | |
47 #if(OP_L1_STANDALONE == 0) | |
48 #include "debug.cfg" | |
49 #include "rv/rv_defined_swe.h" | |
50 #include "rtc/board/rtc_config.h" | |
51 #else | |
52 #include "l1_macro.h" | |
53 #include "l1_confg.h" | |
54 #endif | |
55 | |
56 #if(OP_L1_STANDALONE == 0) | |
57 #include "swconfig.cfg" | |
58 #ifdef BLUETOOTH_INCLUDED | |
59 #include "btemobile.cfg" | |
60 #ifdef BT_CLK_REQ_INT | |
61 #include "board/bth_drv.h" | |
62 #endif | |
63 #endif | |
64 #endif | |
65 | |
66 | |
67 #if(L1_DYN_DSP_DWNLD == 1) | |
68 #include "l1_api_hisr.h" | |
69 #endif | |
70 | |
71 #if (OP_L1_STANDALONE == 0) | |
72 #include "main/sys_types.h" | |
73 #else | |
74 #include "sys_types.h" | |
75 #endif | |
76 | |
77 #if (CHIPSET == 12) | |
78 #include "sys_inth.h" | |
79 #else | |
80 #include "inth/inth.h" | |
81 #include "memif/mem.h" | |
82 #if (OP_L1_STANDALONE == 1) | |
83 #include "serialswitch_core.h" | |
84 #else | |
85 #include "uart/serialswitch.h" | |
86 #endif | |
87 | |
88 #if (OP_L1_STANDALONE == 0) | |
89 #include "sim/sim.h" | |
90 #endif | |
91 #endif | |
92 | |
93 #include "abb/abb_core_inth.h" // for External Interrupt | |
94 #define IQ_H | |
95 #include "inth/iq.h" | |
96 #include "ulpd/ulpd.h" | |
97 #if (BOARD == 34) | |
98 #include "csmi/csmi.h" | |
99 #endif | |
100 | |
101 #if (defined RVM_DAR_SWE) && (defined _GSM) | |
102 extern void dar_watchdog_reset(void); | |
103 #endif | |
104 | |
105 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45)) | |
106 #include "armio/armio.h" | |
107 #if (OP_L1_STANDALONE == 0) | |
108 #include "uart/uartfax.h" | |
109 #endif | |
110 #endif | |
111 | |
112 /* end of original include maze */ | |
113 #endif | |
114 | |
115 /* External declaration */ | |
116 extern void GAUGING_Handler(void); | |
117 extern void TMT_Timer_Interrupt(void); | |
118 #if 0 //(OP_L1_STANDALONE == 1) | |
119 extern void TM_Timer1Handler(void); | |
120 #endif | |
121 extern void kpd_key_handler(void); | |
122 extern void TP_FrameIntHandler(void); | |
123 | |
124 #if 1 //(OP_L1_STANDALONE == 0) | |
125 #if (defined RVM_MPM_SWE) | |
126 extern void MPM_InterruptHandler(void); | |
127 #endif | |
128 | |
129 #if (TI_PROFILER == 1) | |
130 extern void ti_profiler_tdma_action(void); | |
131 #endif | |
132 | |
133 #if(RF_FAM==35) | |
134 extern void TSP_RxHandler(void); | |
135 #endif | |
136 | |
137 extern void RTC_GaugingHandler(void); | |
138 extern void RTC_ItTimerHandle(void); | |
139 extern void RTC_ItAlarmHandle(void); | |
140 #endif | |
141 | |
142 /* Global variables */ | |
143 unsigned IQ_TimerCount1; /* Used to check if timer is incrementing */ | |
144 unsigned IQ_TimerCount2; /* Used to check if timer is incrementing */ | |
145 unsigned IQ_TimerCount; /* Used to check if timer is incrementing */ | |
146 unsigned IQ_DummyCount; /* Used to check if dummy IT */ | |
147 unsigned IQ_FrameCount; /* Used to check if Frame IT TPU*/ | |
148 unsigned IQ_GsmTimerCount; /* Used to check if GSM Timer IT */ | |
149 | |
150 /*--------------------------------------------------------------*/ | |
151 /* irqHandlers */ | |
152 /*--------------------------------------------------------------*/ | |
153 /* Parameters :none */ | |
154 /* Return : none */ | |
155 /* Functionality : Table of interrupt handlers */ | |
156 /* These MUST be 32-bit entries */ | |
157 /*--------------------------------------------------------------*/ | |
158 | |
159 SYS_FUNC irqHandlers[IQ_NUM_INT] = | |
160 { | |
161 IQ_TimerHandler, /* Watchdog timer */ | |
162 IQ_TimerHandler1, /* timer 1 */ | |
163 IQ_TimerHandler2, /* timer 2 */ | |
164 IQ_Dummy, /* AIRQ 3 */ | |
165 IQ_FrameHandler, /* TPU Frame It AIRQ 4 */ | |
166 IQ_Dummy, /* AIRQ 5 */ | |
167 #if CONFIG_INCLUDE_SIM //(OP_L1_STANDALONE == 0) | |
168 SIM_IntHandler, /* AIRQ 6 */ | |
169 #else | |
170 IQ_Dummy, /* AIRQ 6 */ | |
171 #endif | |
172 #if ((CHIPSET == 2) || (CHIPSET == 3)) | |
173 SER_uart_handler, /* AIRQ 7 */ | |
174 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) | |
175 SER_uart_modem_handler, /* AIRQ 7 */ | |
176 #endif | |
177 #if 1 //((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41)) | |
178 // CC test 0316 | |
179 IQ_KeypadGPIOHandler, /* AIRQ 8 */ | |
180 // end | |
181 #else | |
182 IQ_KeypadHandler, /* AIRQ 8 */ | |
183 #endif | |
184 IQ_Rtc_Handler, /* AIRQ 9 RTC Timer*/ | |
185 #if ((CHIPSET == 2) || (CHIPSET == 3)) | |
186 IQ_RtcA_GsmTim_Handler, /* AIRQ 10 RTC ALARM OR ULPD GSM TIMER*/ | |
187 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) | |
188 IQ_RtcA_Handler, /* AIRQ 10 RTC ALARM */ | |
189 #endif | |
190 IQ_Gauging_Handler, /* AIRQ 11 ULPD GAUGING */ | |
191 IQ_External, /* AIRQ 12 */ | |
192 IQ_Dummy, /* AIRQ 13 */ | |
193 IQ_Dummy, /* DMA interrupt */ | |
194 #if (CHIPSET == 4) | |
195 IQ_Dummy, /* LEAD */ | |
196 IQ_Dummy, /* SIM card-detect fast interrupt */ | |
197 IQ_Dummy, /* External fast interrupt */ | |
198 SER_uart_irda_handler, /* UART IrDA interrupt */ | |
199 IQ_GsmTim_Handler /* ULPD GSM timer */ | |
200 #elif ((CHIPSET == 5) || (CHIPSET == 6)) | |
201 IQ_Dummy, /* LEAD */ | |
202 IQ_Dummy, /* SIM card-detect fast interrupt */ | |
203 IQ_Dummy, /* External fast interrupt */ | |
204 SER_uart_irda_handler, /* UART IrDA interrupt */ | |
205 IQ_GsmTim_Handler, /* ULPD GSM timer */ | |
206 #if (BOARD == 34) | |
207 IQ_IcrHandler32, | |
208 #else | |
209 IQ_Dummy, /* Not mapped interrupt */ | |
210 #endif | |
211 IQ_Dummy, /* Not mapped interrupt */ | |
212 IQ_Dummy, /* Not mapped interrupt */ | |
213 IQ_Dummy, /* Not mapped interrupt */ | |
214 IQ_Dummy /* GEA interrupt */ | |
215 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)) | |
216 #if (L1_DYN_DSP_DWNLD == 1) | |
217 IQ_ApiHandler, /* LEAD */ | |
218 #else | |
219 IQ_Dummy, /* LEAD */ | |
220 #endif | |
221 IQ_Dummy, /* SIM card-detect fast interrupt */ | |
222 IQ_Dummy, /* External fast interrupt */ | |
223 SER_uart_irda_handler, /* UART IrDA interrupt */ | |
224 IQ_GsmTim_Handler, /* ULPD GSM timer */ | |
225 IQ_Dummy /* GEA interrupt */ | |
226 #elif (CHIPSET == 9) | |
227 IQ_Dummy, /* LEAD */ | |
228 IQ_Dummy, /* SIM card-detect fast interrupt */ | |
229 IQ_Dummy, /* External fast interrupt */ | |
230 SER_uart_irda_handler, /* UART IrDA interrupt */ | |
231 IQ_GsmTim_Handler, /* ULPD GSM timer */ | |
232 IQ_Dummy, /* Not mapped interrupt */ | |
233 IQ_Dummy, /* Not mapped interrupt */ | |
234 IQ_Dummy, /* Not mapped interrupt */ | |
235 IQ_Dummy, /* Not mapped interrupt */ | |
236 IQ_Dummy /* Reserved */ | |
237 #else | |
238 IQ_Dummy /* LEAD */ | |
239 #endif | |
240 }; | |
241 | |
242 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) | |
243 /*--------------------------------------------------------------*/ | |
244 /* fiqHandlers */ | |
245 /*--------------------------------------------------------------*/ | |
246 /* Parameters :none */ | |
247 /* Return :none */ | |
248 /* Functionality : Table of interrupt handlers */ | |
249 /* These MUST be 32-bit entries */ | |
250 /*--------------------------------------------------------------*/ | |
251 | |
252 SYS_FUNC fiqHandlers[IQ_NUM_INT] = | |
253 { | |
254 IQ_Dummy, /* Watchdog timer */ | |
255 IQ_Dummy, /* timer 1 */ | |
256 IQ_Dummy, /* timer 2 */ | |
257 #if ((OP_L1_STANDALONE == 0) && (RF_FAM == 35)) | |
258 TSP_RxHandler, /* 3 TSP */ | |
259 #else | |
260 IQ_Dummy, /* AIRQ 3 */ | |
261 #endif | |
262 IQ_Dummy, /* TPU Frame It AIRQ 4 */ | |
263 IQ_Dummy, /* AIRQ 5 */ | |
264 IQ_Dummy, /* AIRQ 6 */ | |
265 IQ_Dummy, /* AIRQ 7 */ | |
266 IQ_Dummy, /* AIRQ 8 */ | |
267 IQ_Dummy, /* AIRQ 9 RTC Timer */ | |
268 IQ_Dummy, /* AIRQ 10 RTC ALARM */ | |
269 IQ_Dummy, /* AIRQ 11 ULPD GAUGING */ | |
270 IQ_Dummy, /* AIRQ 12 */ | |
271 IQ_Dummy, /* AIRQ 13 Spi Tx Rx interrupt */ | |
272 IQ_Dummy, /* DMA interrupt */ | |
273 IQ_Dummy, /* LEAD */ | |
274 #if CONFIG_INCLUDE_SIM //(OP_L1_STANDALONE == 0) | |
275 SIM_CD_IntHandler, /* SIM card-detect fast interrupt */ | |
276 #else | |
277 IQ_Dummy, /* SIM card-detect fast interrupt */ | |
278 #endif | |
279 IQ_Dummy, /* External fast interrupt */ | |
280 IQ_Dummy, /* UART_IRDA interrupt */ | |
281 #if (CHIPSET == 4) | |
282 IQ_Dummy /* ULPD GSM timer */ | |
283 #elif ((CHIPSET == 5) || (CHIPSET == 6)) | |
284 IQ_Dummy, /* ULPD GSM timer */ | |
285 IQ_Dummy, /* Not mapped interrupt */ | |
286 IQ_Dummy, /* Not mapped interrupt */ | |
287 IQ_Dummy, /* Not mapped interrupt */ | |
288 IQ_Dummy, /* Not mapped interrupt */ | |
289 IQ_Dummy /* GEA interrupt */ | |
290 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)) | |
291 IQ_Dummy, /* ULPD GSM timer */ | |
292 IQ_Dummy /* GEA timer */ | |
293 #elif (CHIPSET == 9) | |
294 IQ_Dummy, /* ULPD GSM timer */ | |
295 IQ_Dummy, /* Not mapped interrupt */ | |
296 IQ_Dummy, /* Not mapped interrupt */ | |
297 IQ_Dummy, /* Not mapped interrupt */ | |
298 IQ_Dummy, /* Not mapped interrupt */ | |
299 IQ_Dummy /* Reserved */ | |
300 #endif | |
301 }; | |
302 #endif | |
303 | |
304 /*--------------------------------------------------------------*/ | |
305 /* IQ_Gauging_Handler */ | |
306 /*--------------------------------------------------------------*/ | |
307 /* Parameters :none */ | |
308 /* Return : none */ | |
309 /* Functionality : Handle unused interrupts */ | |
310 /*--------------------------------------------------------------*/ | |
311 void IQ_Gauging_Handler(void) | |
312 { | |
313 #if CONFIG_INCLUDE_L1 | |
314 GAUGING_Handler(); | |
315 #if CONFIG_GSM | |
316 RTC_GaugingHandler(); | |
317 #endif | |
318 #endif | |
319 } | |
320 | |
321 | |
322 /*--------------------------------------------------------------*/ | |
323 /* IQ_External */ | |
324 /*--------------------------------------------------------------*/ | |
325 /* Parameters : none */ | |
326 /* Return : none */ | |
327 /* Functionality : Handle External IRQ mapped on ABB. */ | |
328 /*--------------------------------------------------------------*/ | |
329 void IQ_External(void) | |
330 { | |
331 #if (CHIPSET == 12) | |
332 // Mask external interrupt 12 | |
333 F_INTH_DISABLE_ONE_IT(C_INTH_ABB_IRQ_IT); | |
334 #else | |
335 // Mask external interrupt 12 | |
336 IQ_Mask(IQ_EXT); | |
337 #endif | |
338 | |
339 // The external IRQ is mapped on the ABB interrupt. | |
340 // The associated HISR ABB_Hisr is activated on reception on the external IRQ. | |
341 #if CONFIG_INCLUDE_L1 | |
342 if(Activate_ABB_HISR()) | |
343 { | |
344 #if (CHIPSET == 12) | |
345 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); | |
346 #else | |
347 // Mask external interrupt 12 | |
348 IQ_Unmask(IQ_EXT); | |
349 #endif | |
350 } | |
351 #endif | |
352 } | |
353 | |
354 /*--------------------------------------------------------------*/ | |
355 /* IQ_Dummy */ | |
356 /*--------------------------------------------------------------*/ | |
357 /* Parameters :none */ | |
358 /* Return : none */ | |
359 /* Functionality : Handle unused interrupts */ | |
360 /*--------------------------------------------------------------*/ | |
361 void IQ_Dummy(void) | |
362 { | |
363 IQ_DummyCount++; | |
364 } | |
365 | |
366 /*--------------------------------------------------------------*/ | |
367 /* IQ_RTCHandler */ | |
368 /*--------------------------------------------------------------*/ | |
369 /* Parameters :none */ | |
370 /* Return : none */ | |
371 /* Functionality : Handle RTC Time interrupts */ | |
372 /*--------------------------------------------------------------*/ | |
373 | |
374 void IQ_Rtc_Handler(void) | |
375 { | |
376 #if CONFIG_GSM //(OP_L1_STANDALONE == 0) | |
377 RTC_ItTimerHandle(); | |
378 #endif | |
379 } | |
380 | |
381 /*--------------------------------------------------------------*/ | |
382 /* IQ_RtcA_GsmTim_Handler */ | |
383 /*--------------------------------------------------------------*/ | |
384 /* Parameters :none */ | |
385 /* Return : none */ | |
386 /* Functionality : Handle RTC ALARM or GAUGING interrupts */ | |
387 /*--------------------------------------------------------------*/ | |
388 | |
389 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) | |
390 void IQ_RtcA_Handler(void) | |
391 { | |
392 #if 1 //(OP_L1_STANDALONE == 0) | |
393 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */ | |
394 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM ) | |
395 RTC_ItAlarmHandle(); | |
396 #endif | |
397 } | |
398 | |
399 void IQ_GsmTim_Handler(void) | |
400 { | |
401 | |
402 if ( (* (SYS_UWORD16 *) ULPD_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM ) | |
403 { | |
404 // it is GSM Timer it..... | |
405 IQ_GsmTimerCount++; | |
406 } | |
407 } | |
408 #else | |
409 void IQ_RtcA_GsmTim_Handler(void) | |
410 { | |
411 #if (OP_L1_STANDALONE == 0) | |
412 if ( (* (SYS_UWORD16 *) ULPD_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM ) | |
413 { | |
414 // it is GSM Timer it..... | |
415 IQ_GsmTimerCount++; | |
416 } | |
417 else | |
418 { | |
419 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */ | |
420 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM ) | |
421 RTC_ItAlarmHandle(); | |
422 } | |
423 #endif | |
424 } | |
425 #endif | |
426 | |
427 /*--------------------------------------------------------------*/ | |
428 /* IQ_TimerHandler */ | |
429 /*--------------------------------------------------------------*/ | |
430 /* Parameters :none */ | |
431 /* Return : none */ | |
432 /* Functionality : Handle Timer interrupts */ | |
433 /*--------------------------------------------------------------*/ | |
434 void IQ_TimerHandler(void) | |
435 { | |
436 IQ_TimerCount++; | |
437 TMT_Timer_Interrupt(); | |
438 #if 0 //(defined RVM_DAR_SWE) && (defined _GSM) | |
439 dar_watchdog_reset(); | |
440 #endif | |
441 } | |
442 | |
443 /*--------------------------------------------------------------*/ | |
444 /* IQ_FramerHandler */ | |
445 /*--------------------------------------------------------------*/ | |
446 /* Parameters :none */ | |
447 /* Return : none */ | |
448 /* Functionality : Handle Timer interrupts */ | |
449 /*--------------------------------------------------------------*/ | |
450 void IQ_FrameHandler(void) | |
451 { | |
452 IQ_FrameCount++; | |
453 TMT_Timer_Interrupt(); | |
454 #if CONFIG_INCLUDE_L1 | |
455 TP_FrameIntHandler(); | |
456 #endif | |
457 #if (OP_L1_STANDALONE == 0) | |
458 #if (TI_PROFILER == 1) | |
459 // TDMA treatment for profiling buffer | |
460 ti_profiler_tdma_action(); | |
461 #endif | |
462 #endif | |
463 } | |
464 | |
465 /*--------------------------------------------------------------*/ | |
466 /* IQ_TimerHandler1 */ | |
467 /*--------------------------------------------------------------*/ | |
468 /* Parameters :none */ | |
469 /* Return : none */ | |
470 /* Functionality : Handle Timer 1 interrupts */ | |
471 /*--------------------------------------------------------------*/ | |
472 void IQ_TimerHandler1(void) | |
473 { | |
474 IQ_TimerCount1++; | |
475 #if (OP_L1_STANDALONE == 1) | |
476 TM_Timer1Handler(); | |
477 #endif | |
478 } | |
479 | |
480 /*--------------------------------------------------------------*/ | |
481 /* IQ_TimerHandler2 */ | |
482 /*--------------------------------------------------------------*/ | |
483 /* Parameters :none */ | |
484 /* Return : none */ | |
485 /* Functionality : Handle Timer 2 interrupts */ | |
486 /*--------------------------------------------------------------*/ | |
487 void IQ_TimerHandler2(void) | |
488 { | |
489 IQ_TimerCount2++; | |
490 #if !CONFIG_INCLUDE_L1 | |
491 TMT_Timer_Interrupt(); | |
492 #endif | |
493 } | |
494 | |
495 #if (L1_DYN_DSP_DWNLD == 1) | |
496 /*-------------------------------------------------------*/ | |
497 /* IQ_ApiHandler() */ | |
498 /*-------------------------------------------------------*/ | |
499 /* Parameters : none */ | |
500 /* Return : none */ | |
501 /* Functionality : API int management */ | |
502 /*-------------------------------------------------------*/ | |
503 void IQ_ApiHandler(void) | |
504 { | |
505 l1_api_handler(); | |
506 } /* IQ_ApiHandler() */ | |
507 #endif | |
508 | |
509 | |
510 /*--------------------------------------------------------------*/ | |
511 /* IQ_IRQ_isr */ | |
512 /*--------------------------------------------------------------*/ | |
513 /* Parameters :none */ | |
514 /* Return : none */ | |
515 /* Functionality : HHandle IRQ interrupts */ | |
516 /*--------------------------------------------------------------*/ | |
517 void IQ_IRQ_isr(void) | |
518 { | |
519 irqHandlers[((* (SYS_UWORD16 *) INTH_B_IRQ_REG) & INTH_SRC_NUM)](); /* ACK IT */ | |
520 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_IRQ); /* valid next IRQ */ | |
521 } | |
522 | |
523 /*--------------------------------------------------------------*/ | |
524 /* IQ_FIQ_isr */ | |
525 /*--------------------------------------------------------------*/ | |
526 /* Parameters :none */ | |
527 /* Return : none */ | |
528 /* Functionality : Handle FIQ interrupts */ | |
529 /*--------------------------------------------------------------*/ | |
530 void IQ_FIQ_isr(void) | |
531 { | |
532 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) | |
533 fiqHandlers[((* (SYS_UWORD16 *) INTH_B_FIQ_REG) & INTH_SRC_NUM)](); /* ACK IT */ | |
534 #endif | |
535 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_FIQ); /* valid next FIQ */ | |
536 } | |
537 | |
538 /*--------------------------------------------------------------*/ | |
539 /* IQ_KeypadGPIOHandler */ | |
540 /*--------------------------------------------------------------*/ | |
541 /* Parameters : none */ | |
542 /* Return : none */ | |
543 /* Functionality : Handle keypad and GPIO interrupts */ | |
544 /*--------------------------------------------------------------*/ | |
545 // CC test 0316 | |
546 //#include "rvm/rvm_use_id_list.h" | |
547 //#include "rvf/rvf_api.h" | |
548 //static char debug_buffer[50]; | |
549 // end | |
550 | |
551 void IQ_KeypadGPIOHandler(void) | |
552 { | |
553 | |
554 #if 0 //(OP_L1_STANDALONE == 0) | |
555 /* | |
556 * GPIO interrupt must be checked before the keypad interrupt. The GPIO | |
557 * status bit is reset when the register is read. | |
558 */ | |
559 | |
560 if (AI_CheckITSource (ARMIO_GPIO_INT)) | |
561 | |
562 // CC test 0315 | |
563 { | |
564 AI_MaskIT (ARMIO_MASKIT_GPIO); | |
565 //sprintf(debug_buffer, "GPIO_Interrupt"); | |
566 //rvf_send_trace(debug_buffer, 40, NULL_PARAM, RV_TRACE_LEVEL_ERROR, RVT_USE_ID); | |
567 AI_UnmaskIT(ARMIO_MASKIT_GPIO); //0x0002 | |
568 // end | |
569 /* | |
570 #ifdef RVM_MPM_SWE | |
571 // check if the SWE has been started | |
572 MPM_InterruptHandler (); | |
573 #elif BT_CLK_REQ_INT | |
574 | |
575 BT_DRV_ClkReqInterruptHandler( ); | |
576 #else | |
577 UAF_DTRInterruptHandler (); | |
578 #endif | |
579 */ | |
580 } | |
581 if (AI_CheckITSource (ARMIO_KEYPAD_INT)) | |
582 { | |
583 // CC test 0316 | |
584 //sprintf(debug_buffer, "Key_Interrupt"); | |
585 //rvf_send_trace(debug_buffer, 40, NULL_PARAM, RV_TRACE_LEVEL_ERROR, RVT_USE_ID); | |
586 // end | |
587 kpd_key_handler (); | |
588 } | |
589 | |
590 #endif | |
591 } |