FreeCalypso > hg > freecalypso-citrine
comparison g23m-aci/uart/uart.h @ 0:75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 09 Jun 2016 00:02:41 +0000 |
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1 /* | |
2 +----------------------------------------------------------------------------- | |
3 | Project : | |
4 | Modul : | |
5 +----------------------------------------------------------------------------- | |
6 | Copyright 2002 Texas Instruments Berlin, AG | |
7 | All rights reserved. | |
8 | | |
9 | This file is confidential and a trade secret of Texas | |
10 | Instruments Berlin, AG | |
11 | The receipt of or possession of this file does not convey | |
12 | any rights to reproduce or disclose its contents or to | |
13 | manufacture, use, or sell anything it may describe, in | |
14 | whole, or in part, without the specific written consent of | |
15 | Texas Instruments Berlin, AG. | |
16 +----------------------------------------------------------------------------- | |
17 | Purpose : Definitions for the Protocol Stack Entity | |
18 | Universal Asynchronous Receiver Transmitter (UART). | |
19 +----------------------------------------------------------------------------- | |
20 */ | |
21 | |
22 #ifndef UART_H | |
23 #define UART_H | |
24 | |
25 /*==== MACROS ======================================================*/ | |
26 | |
27 /* | |
28 * defines the user of the vsi interface | |
29 */ | |
30 #define VSI_CALLER UART_handle, | |
31 #define VSI_CALLER_SINGLE UART_handle | |
32 | |
33 /* | |
34 * VERSION | |
35 * | |
36 * Description : The constants define the type and the value | |
37 * of a version identification. The version | |
38 * is part of the monitor struct. | |
39 */ | |
40 #define VERSION_UART "UART 1.1" | |
41 | |
42 #ifdef TI_PS_OP_VSI_NO_CALL_ID | |
43 #define TIMER_START(C,I,T) vsi_t_start_nc(I,T) | |
44 #define TIMER_PSTART(C,I,T,R) vsi_t_pstart_nc(I,T,R) | |
45 #define TIMER_STOP(C,I) vsi_t_stop_nc(I) | |
46 #define TIMER_STATUS(C,I,T) vsi_t_status_nc(I,T) | |
47 #define SUSPEND_SELF(C,T) vsi_t_sleep_nc(T) | |
48 #define SYSTEM_TIME(C,T) vsi_t_time_nc(T) | |
49 #else /* TI_PS_OP_VSI_NO_CALL_ID */ | |
50 #define TIMER_START(C,I,T) vsi_t_start(C,I,T) | |
51 #define TIMER_PSTART(C,I,T,R) vsi_t_pstart(C,I,T,R) | |
52 #define TIMER_STOP(C,I) vsi_t_stop(C,I) | |
53 #define TIMER_STATUS(C,I,T) vsi_t_status(C,I,T) | |
54 #define SUSPEND_SELF(C,T) vsi_t_sleep(C,T) | |
55 #define SYSTEM_TIME(C,T) vsi_t_time(C,T) | |
56 #endif /* TI_PS_OP_VSI_NO_CALL_ID */ | |
57 | |
58 | |
59 /* | |
60 * This is just a TEMPORARY define until the issues with OPTION_MULTITHREAD | |
61 * are settled. This define SHOULD be contained in GSM.H. | |
62 */ | |
63 #undef _ENTITY_PREFIXED | |
64 #define _ENTITY_PREFIXED(N) uart_##N | |
65 | |
66 /* | |
67 * Communication handles (see also UART_PEI.C) | |
68 */ | |
69 #define hCommMMI uart_hCommMMI | |
70 #define hCommUART uart_hCommUART | |
71 | |
72 /* | |
73 * Macros for error tracing | |
74 */ | |
75 | |
76 #ifndef TRACE_ERROR_P1 | |
77 #define TRACE_ERROR_P1(f,a1) vsi_o_error_ttrace(f,a1); | |
78 #endif | |
79 | |
80 #ifndef TRACE_ERROR_P2 | |
81 #define TRACE_ERROR_P2(f,a1,a2) vsi_o_error_ttrace(f,a1,a2); | |
82 #endif | |
83 | |
84 #ifndef TRACE_ERROR_P3 | |
85 #define TRACE_ERROR_P3(f,a1,a2,a3) vsi_o_error_ttrace(f,a1,a2,a3); | |
86 #endif | |
87 | |
88 #ifndef TRACE_ERROR_P4 | |
89 #define TRACE_ERROR_P4(f,a1,a2,a3,a4) vsi_o_error_ttrace(f,a1,a2,a3,a4); | |
90 #endif | |
91 | |
92 /*==== CONSTANTS ======================================================*/ | |
93 | |
94 #if defined (DTILIB) | |
95 /* | |
96 * dtilib interface | |
97 */ | |
98 | |
99 #define UART_DTI_UP_INTERFACE 0 | |
100 #define UART_UPLINK_QUEUE_SIZE 0 | |
101 #endif /* DTILIB */ | |
102 /* | |
103 * Scaling | |
104 */ | |
105 #ifdef FF_MULTI_PORT | |
106 #define UART_INSTANCES FF_MULTI_PORT | |
107 #else /* FF_MULTI_PORT */ | |
108 #ifdef FF_TWO_UART_PORTS | |
109 #define UART_INSTANCES 2 | |
110 #else /* FF_TWO_UART_PORTS */ | |
111 #define UART_INSTANCES 1 | |
112 #endif /* FF_TWO_UART_PORTS */ | |
113 #endif /* FF_MULTI_PORT */ | |
114 | |
115 #define UART_MAX_NUMBER_OF_CHANNELS 6 | |
116 | |
117 /* | |
118 * Bitoffset for encoding/decoding | |
119 */ | |
120 #define ENCODE_OFFSET 0 | |
121 | |
122 /* | |
123 * Service definitions. Used to access service data with GET/SET_STATE. | |
124 * | |
125 * Services with multiple incarnation have to be defined as xxx-> | |
126 * Services with only one incarnation have to be defined as xxx. | |
127 * | |
128 */ | |
129 #define UART_SERVICE_KER ker. | |
130 #define UART_SERVICE_RX rx. | |
131 #define UART_SERVICE_TX tx. | |
132 #define UART_SERVICE_DTX dtx-> | |
133 #define UART_SERVICE_DRX drx-> | |
134 #define UART_SERVICE_RT rt. | |
135 | |
136 /* | |
137 * Service name definitions for trace purposes. | |
138 */ | |
139 #ifndef NTRACE | |
140 | |
141 #define SERVICE_NAME_UART_SERVICE_KER "KER" | |
142 #define SERVICE_NAME_UART_SERVICE_RX "RX" | |
143 #define SERVICE_NAME_UART_SERVICE_TX "TX" | |
144 #define SERVICE_NAME_UART_SERVICE_DRX "DRX" | |
145 #define SERVICE_NAME_UART_SERVICE_DTX "DTX" | |
146 #define SERVICE_NAME_UART_SERVICE_RT "RT" | |
147 | |
148 #endif /* !NTRACE */ | |
149 | |
150 | |
151 /* | |
152 * State definitions for each service. | |
153 */ | |
154 | |
155 #define KER_DEAD 1 | |
156 #define KER_READY 2 | |
157 #define KER_MUX_ESTABLISH 3 | |
158 #define KER_MUX 4 | |
159 #define KER_MUX_DLC_CLOSING 5 | |
160 #define KER_MUX_CLOSING 6 | |
161 #define KER_MUX_CLOSED 7 | |
162 | |
163 #define RX_DEAD 8 | |
164 #ifdef DTILIB | |
165 /* | |
166 * we do not use the one from DTILIB here | |
167 */ | |
168 #undef RX_READY | |
169 #endif | |
170 #define RX_READY 9 | |
171 #define RX_MUX 10 | |
172 | |
173 #define TX_DEAD 11 | |
174 #ifdef DTILIB | |
175 /* | |
176 * we do not use the one from DTILIB here | |
177 */ | |
178 #undef TX_READY | |
179 #endif | |
180 #define TX_READY 12 | |
181 #define TX_READY_FLUSHING 13 | |
182 #define TX_MUX 14 | |
183 #define TX_MUX_FLUSHING 15 | |
184 | |
185 #define DRX_DEAD 16 | |
186 #define DRX_READY 17 | |
187 #define DRX_NOT_READY 18 | |
188 #define DRX_FLUSHING 19 | |
189 | |
190 #define DTX_DEAD 20 | |
191 #define DTX_READY 21 | |
192 #define DTX_NOT_READY 22 | |
193 | |
194 #define RT_STATE 23 | |
195 | |
196 /* | |
197 * DLC Connection states | |
198 */ | |
199 #define UART_CONNECTION_DEAD 24 | |
200 #define UART_CONNECTION_SABM_RCVD 25 | |
201 #define UART_CONNECTION_DISC_SENT 26 | |
202 #define UART_CONNECTION_OPEN 27 | |
203 | |
204 /* | |
205 * states of TX ISR state machine | |
206 */ | |
207 #define UART_TX_BEGIN 28 | |
208 #define UART_TX_ADDRESS 29 | |
209 #define UART_TX_CONTROL 30 | |
210 #define UART_TX_INFORMATION 31 | |
211 #define UART_TX_FCS 32 | |
212 #define UART_TX_END 33 | |
213 | |
214 /* | |
215 * states of TX sending indicator | |
216 */ | |
217 #define UART_TX_SENDING 34 | |
218 #define UART_TX_NOT_SENDING 35 | |
219 | |
220 /* | |
221 * states of RX receiving indicator | |
222 */ | |
223 #define UART_RX_RECEIVING 36 | |
224 #define UART_RX_NOT_RECEIVING 37 | |
225 | |
226 /* | |
227 * states of RX ISR state machine | |
228 */ | |
229 #define UART_RX_ERROR 38 | |
230 #define UART_RX_BEGIN 39 | |
231 #define UART_RX_ADDRESS 40 | |
232 #define UART_RX_CONTROL 41 | |
233 #define UART_RX_INFORMATION 42 | |
234 #define UART_RX_FCS 43 | |
235 #define UART_RX_END 44 | |
236 | |
237 /* | |
238 * DLC process states of reception | |
239 */ | |
240 #define UART_RX_PROCESS_STOP 45 | |
241 #define UART_RX_PROCESS_READY 46 | |
242 #define UART_RX_PROCESS_COMPLETE 47 | |
243 | |
244 /* | |
245 * definition of flush states for service KER | |
246 */ | |
247 #define UART_KER_NOT_FLUSHING 48 | |
248 #define UART_KER_DRX_FLUSH 49 | |
249 #define UART_KER_TX_FLUSH 50 | |
250 | |
251 /* | |
252 * special channel instance values | |
253 */ | |
254 #define UART_CONTROL_INSTANCE UART_MAX_NUMBER_OF_CHANNELS | |
255 #define UART_EMPTY_INSTANCE 255 | |
256 | |
257 /* | |
258 * priority value | |
259 */ | |
260 #define UART_PRIORITY_CONTROL 0 | |
261 | |
262 /* | |
263 * HDLC values | |
264 */ | |
265 #define UART_HDLC_FLAG 0x7e | |
266 #define UART_HDLC_ESCAPE 0x7d | |
267 #define UART_SABM_FRAME 0x3f | |
268 #define UART_UA_FRAME 0x73 | |
269 #define UART_DM_CONTROL_FRAME 0x1f | |
270 #define UART_DM_DATA_FRAME 0x0f | |
271 #define UART_DISC_FRAME 0x53 | |
272 #define UART_UIH_CONTROL_FRAME 0xff | |
273 #define UART_UIH_DATA_FRAME 0xef | |
274 | |
275 /* | |
276 * UART DLC channel values | |
277 */ | |
278 #define UART_DLCI_CONTROL 0 | |
279 #define UART_DLCI_INVALID 255 | |
280 #define UART_DLCI_POS 2 | |
281 | |
282 /* | |
283 * mask values for forward parameter | |
284 */ | |
285 #define UART_FORWARD_CLD 0x00000001 | |
286 #define UART_FORWARD_FCON 0x00000002 | |
287 #define UART_FORWARD_FCOFF 0x00000004 | |
288 #define UART_FORWARD_MSC 0x00000008 | |
289 #define UART_FORWARD_SABM 0x00000010 | |
290 #define UART_FORWARD_DLC_RELEASE 0x00000020 | |
291 #define UART_FORWARD_PSC 0x00000040 | |
292 #define UART_FORWARD_RESPONSE 0x00000080 | |
293 | |
294 /* | |
295 * message type values (for UIH command frames) | |
296 */ | |
297 #define UART_MSG_TYPE_PSC_C 0x43 | |
298 #define UART_MSG_TYPE_PSC_R 0x41 | |
299 #define UART_MSG_TYPE_CLD_C 0xc3 | |
300 #define UART_MSG_TYPE_CLD_R 0xc1 | |
301 #define UART_MSG_TYPE_FCON_C 0xa3 | |
302 #define UART_MSG_TYPE_FCON_R 0xa1 | |
303 #define UART_MSG_TYPE_FCOFF_C 0x63 | |
304 #define UART_MSG_TYPE_FCOFF_R 0x61 | |
305 #define UART_MSG_TYPE_MSC_C 0xe3 | |
306 #define UART_MSG_TYPE_MSC_R 0xe1 | |
307 #define UART_MSG_TYPE_NSC_R 0x11 | |
308 #define UART_MSG_TYPE_SNC_C 0xd3 | |
309 #define UART_MSG_TYPE_SNC_R 0xd1 | |
310 | |
311 /* | |
312 * message length field values | |
313 */ | |
314 #define UART_MSG_LENGTH_POS 1 | |
315 | |
316 /* | |
317 * definitions for service negotiation | |
318 */ | |
319 #define UART_NO_SERVICE 0x00 | |
320 #define UART_NO_VOICE_CODEC 0x00 | |
321 | |
322 /* | |
323 * definitions for modem status commands | |
324 */ | |
325 #define UART_NO_BREAK_SIGNAL 0x01 | |
326 | |
327 /* | |
328 * FCS calculation | |
329 */ | |
330 #define UART_INITFCS 0xff | |
331 #define UART_GOODFCS 0xcf | |
332 | |
333 /* | |
334 * offset addresses for frame handling in service KER | |
335 * (in bytes after flag) | |
336 */ | |
337 #define UART_OFFSET_ADDRESS 0 | |
338 #define UART_OFFSET_CONTROL 1 | |
339 #define UART_OFFSET_INFO 2 | |
340 | |
341 /* | |
342 * common EA and CR bit | |
343 */ | |
344 #define UART_EA 0x01 | |
345 #define UART_CR 0x02 | |
346 /* | |
347 * modem status command (MSC) masks and positions | |
348 */ | |
349 #define UART_MSC_BRKLEN_POS 4 | |
350 #define UART_MSC_DV_MASK 0x80 | |
351 #define UART_MSC_IC_MASK 0x40 | |
352 #define UART_MSC_RTR_MASK 0x08 | |
353 #define UART_MSC_RTC_MASK 0x04 | |
354 #define UART_MSC_FC_MASK 0x02 | |
355 #define UART_MSC_BRK_MASK 0x02 | |
356 #define UART_MSC_BRKLEN_MASK 0xf0 | |
357 | |
358 /* | |
359 * !!! for vsi_t_sleep may be changed??? | |
360 */ | |
361 #define ONE_FRAME 0 | |
362 /* | |
363 * position and mask definitions | |
364 */ | |
365 #define BRK_LEN_POS BRKLEN | |
366 #define BRK_LEN_MASK 0x1fe00L | |
367 #define SA_MASK ( 1UL << SA ) | |
368 #define SB_MASK ( 1UL << SB ) | |
369 #define X_MASK ( 1UL << X ) | |
370 #define BRK_MASK ( 1UL << BRK ) | |
371 #define ESC_MASK ( 1UL << ESC ) | |
372 #define RI_MASK ( 1UL << RI ) | |
373 #define DCD_MASK ( 1UL << DCD ) | |
374 /* | |
375 * UART intern position and mask definitions | |
376 */ | |
377 #define UART_CTS_POS 0 | |
378 #define UART_RTS_POS 1 | |
379 #define UART_DSR_POS 2 | |
380 #define UART_DTR_POS 3 | |
381 #define UART_DCD_POS 4 | |
382 #define UART_BRK_RX_POS 5 | |
383 #define UART_BRK_TX_POS 6 | |
384 #define UART_ESC_RX_POS 7 | |
385 #define UART_ESC_TX_POS 8 | |
386 #define UART_BRKLEN_RX_POS 9 | |
387 #define UART_BRKLEN_TX_POS 17 | |
388 #define UART_FC_RX_POS 25 | |
389 #define UART_FC_TX_POS 26 | |
390 #define UART_RI_POS 27 | |
391 #define UART_SA_TX_POS 28 | |
392 #define UART_SB_TX_POS UART_DCD_POS | |
393 #define UART_X_TX_POS 29 | |
394 #define UART_SA_RX_POS UART_DTR_POS | |
395 #define UART_SB_RX_POS 30 | |
396 #define UART_X_RX_POS UART_RTS_POS | |
397 #define UART_CTS_MASK (1UL << UART_CTS_POS) | |
398 #define UART_RTS_MASK (1UL << UART_RTS_POS) | |
399 #define UART_DSR_MASK (1UL << UART_DSR_POS) | |
400 #define UART_DTR_MASK (1UL << UART_DTR_POS) | |
401 #define UART_DCD_MASK (1UL << UART_DCD_POS) | |
402 #define UART_BRK_RX_MASK (1UL << UART_BRK_RX_POS) | |
403 #define UART_BRK_TX_MASK (1UL << UART_BRK_TX_POS) | |
404 #define UART_ESC_RX_MASK (1UL << UART_ESC_RX_POS) | |
405 #define UART_ESC_TX_MASK (1UL << UART_ESC_TX_POS) | |
406 #define UART_BRKLEN_RX_MASK (255UL << UART_BRKLEN_RX_POS) | |
407 #define UART_BRKLEN_TX_MASK (255UL << UART_BRKLEN_TX_POS) | |
408 #define UART_FC_RX_MASK (1UL << UART_FC_RX_POS) | |
409 #define UART_FC_TX_MASK (1UL << UART_FC_TX_POS) | |
410 #define UART_RI_MASK (1UL << UART_RI_POS) | |
411 #define UART_SA_TX_MASK (1UL << UART_SA_TX_POS) | |
412 #define UART_SB_TX_MASK (1UL << UART_SB_TX_POS) | |
413 #define UART_X_TX_MASK (1UL << UART_X_TX_POS) | |
414 #define UART_SA_RX_MASK (1UL << UART_SA_RX_POS) | |
415 #define UART_SB_RX_MASK (1UL << UART_SB_RX_POS) | |
416 #define UART_X_RX_MASK (1UL << UART_X_RX_POS) | |
417 | |
418 /* | |
419 * values for received primitive bitfield | |
420 */ | |
421 #define UART_PARAMETERS_REQ_MASK 0x00000001 | |
422 #define UART_DTI_REQ_MASK 0x00000004 | |
423 #define UART_DISABLE_REQ_MASK 0x00000008 | |
424 #define UART_RING_REQ_MASK 0x00000010 | |
425 #define UART_DCD_REQ_MASK 0x00000020 | |
426 #define UART_MUX_START_REQ_MASK 0x00000080 | |
427 #define UART_MUX_DLC_RELEASE_REQ_MASK 0x00000100 | |
428 #define UART_MUX_SLEEP_REQ_MASK 0x00000200 | |
429 #define UART_MUX_WAKEUP_REQ_MASK 0x00000400 | |
430 #define UART_MUX_CLOSE_REQ_MASK 0x00000800 | |
431 #define UART_DTI_DATA_REQ_MASK 0x00001000 | |
432 | |
433 /* | |
434 * value for N1 in ready mode | |
435 */ | |
436 #define UART_N1_READY_MODE 10 | |
437 /* | |
438 * buffer size of RX buffer in multiplexer mode | |
439 */ | |
440 #define UART_RX_MUX_BUFFER_SIZE (100 - sizeof(T_desc2)) | |
441 | |
442 #ifdef WIN32 | |
443 #define HISR_STACK_SIZE 512 | |
444 #endif | |
445 #ifdef _SIMULATION_ | |
446 #define UART_TX_SIM_BUFFER_SIZE 136 | |
447 #endif /* _SIMULATION_ */ | |
448 | |
449 /* | |
450 * Timer handle definitions. | |
451 */ | |
452 | |
453 #define UART_RT_INDEX_T1 0 | |
454 #define UART_RT_INDEX_T2 1 | |
455 #define UART_RT_INDEX_T3 2 | |
456 #define UART_RT_INDEX_TESD 3 /* Escape Sequence Detection */ | |
457 #define UART_TIMER_PER_INSTANCE 4 | |
458 | |
459 #define UART_TIMER_MAX (UART_TIMER_PER_INSTANCE * UART_INSTANCES) | |
460 | |
461 /* Dynamic Configuration Numbers */ | |
462 #define RESET 0 | |
463 #ifdef DEBUG_COUNTERS | |
464 #define DUMP_COUNTERS 6 | |
465 #endif /* DEBUG_COUNTERS */ | |
466 | |
467 /* | |
468 * definition of constants for DTX dynamic buffer management: | |
469 */ | |
470 #define UART_DTX_MAX_BUF_SIZE 1000 /* max. 1000 bytes */ | |
471 #define UART_DTX_MAX_SIZE_MULTIPLIER \ | |
472 ((USHORT)(UART_DTX_MAX_BUF_SIZE / uart_data->n1)) | |
473 | |
474 /*==== GLOBAL VARIABLES ======================================================*/ | |
475 | |
476 /*==== TYPES ======================================================*/ | |
477 | |
478 /* | |
479 * UART global typedefs | |
480 */ | |
481 typedef UBYTE T_BIT; | |
482 | |
483 /* | |
484 * definition of sending state for service DRX | |
485 */ | |
486 typedef enum | |
487 { | |
488 UART_DRX_NOT_SENDING, | |
489 UART_DRX_SENDING, | |
490 UART_DRX_INVALID | |
491 } T_DRX_SENDING_STATE; | |
492 | |
493 /* | |
494 * definition of receiving states for service DTX | |
495 */ | |
496 typedef enum | |
497 { | |
498 UART_DTX_NOT_RECEIVING, | |
499 UART_DTX_RECEIVING, | |
500 UART_DTX_INVALID | |
501 } T_DTX_RECEIVING_STATE; | |
502 | |
503 /* | |
504 * definition of sending/receiving state for service KER | |
505 */ | |
506 typedef enum | |
507 { | |
508 UART_KER_NOT_SENDING, | |
509 UART_KER_SENDING, | |
510 UART_KER_NOT_RECEIVING, | |
511 UART_KER_RECEIVING, | |
512 UART_KER_INVALID | |
513 } T_KER_TRANSMISSION_STATE; | |
514 | |
515 /* | |
516 * definition of timer states for service RT | |
517 */ | |
518 typedef enum | |
519 { | |
520 UART_RT_STARTED, | |
521 UART_RT_STOPPED | |
522 } T_TIMER_STATE; | |
523 | |
524 /* | |
525 * definition of data flow states | |
526 */ | |
527 typedef enum | |
528 { | |
529 UART_FLOW_DISABLED, | |
530 UART_FLOW_ENABLED | |
531 } T_DATA_FLOW_STATE; | |
532 | |
533 /* | |
534 * definition of escape sequence detection (ESD) states | |
535 */ | |
536 typedef enum | |
537 { | |
538 UART_ESD_NULL, /* ESD not in progress */ | |
539 UART_ESD_CHAR_1, /* first ESD character has been received ('+') */ | |
540 UART_ESD_CHAR_2, /* second ESD character... */ | |
541 /* third ESD character has been received (fourth would be invalid) */ | |
542 UART_ESD_CHAR_3, | |
543 /* escape sequence detected, but charcters are not removed from data stream */ | |
544 UART_ESD_DETECTED | |
545 } T_ESD_STATE; | |
546 | |
547 /* | |
548 * data structure for each service | |
549 */ | |
550 | |
551 typedef struct /* T_KER_DATA */ | |
552 { | |
553 UBYTE state; | |
554 /* | |
555 * Required for state traces. | |
556 */ | |
557 #ifndef NTRACE | |
558 char *name; | |
559 char *state_name; | |
560 #endif /* !NTRACE */ | |
561 | |
562 /* | |
563 * service specific: UART parameters, normal mode | |
564 */ | |
565 #ifdef FF_MULTI_PORT | |
566 T_GSI_DCB act_dcb; /* device control block */ | |
567 #else /* FF_MULTI_PORT */ | |
568 T_baudrate act_br; /* baud rate */ | |
569 T_bitsPerCharacter act_bpc; /* bit per character */ | |
570 T_stopBits act_sb; /* stop bits */ | |
571 T_parity act_par; /* parity */ | |
572 UBYTE act_xon; /* XOn character */ | |
573 UBYTE act_xoff; /* XOff character */ | |
574 T_flowCtrlMode act_fc_rx; /* RX flow control mode */ | |
575 T_flowCtrlMode act_fc_tx; /* TX flow control mode */ | |
576 UBYTE act_ec; /* escape character */ | |
577 USHORT act_gp; /* guard period */ | |
578 #endif /* FF_MULTI_PORT */ | |
579 /* | |
580 * service specific: multiplexer mode | |
581 */ | |
582 UBYTE n2; /* maximum number of retransmissions */ | |
583 /* | |
584 * service specific: receive part, multiplexer mode | |
585 */ | |
586 T_desc2* rx_data_desc; /* data received from peer */ | |
587 /* state of internal data receiving */ | |
588 T_KER_TRANSMISSION_STATE receiving_state; | |
589 /* data to be sent to peer */ | |
590 T_desc2* tx_data_desc; | |
591 /* data waiting for access to tx_data_desc */ | |
592 T_desc2* tx_data_waiting; | |
593 /* KER currently sending via UART? */ | |
594 T_KER_TRANSMISSION_STATE sending_state; | |
595 /* data flow enabled/disabled */ | |
596 T_DATA_FLOW_STATE data_flow_tx; | |
597 /* number of running T1 timers */ | |
598 UBYTE nr_t1; | |
599 /* number of running T2 timers */ | |
600 UBYTE nr_t2; | |
601 /* bitfield of received UART primitives */ | |
602 ULONG received_prim; | |
603 /* state of flushing */ | |
604 UBYTE flush_state; | |
605 } T_KER_DATA; | |
606 | |
607 | |
608 typedef struct /* T_RX_DATA */ | |
609 { | |
610 UBYTE state; | |
611 /* | |
612 * Required for state traces. | |
613 */ | |
614 #ifndef NTRACE | |
615 char *name; | |
616 char *state_name; | |
617 #endif /* !NTRACE */ | |
618 | |
619 | |
620 #ifndef FF_MULTI_PORT | |
621 #ifdef WIN32 | |
622 NU_HISR rx_HISR; | |
623 #endif /* WIN32 */ | |
624 #endif /* !FF_MULTI_PORT */ | |
625 | |
626 /* | |
627 * ab hier service spezif. | |
628 */ | |
629 #ifdef FF_MULTI_PORT | |
630 T_desc2* mux_buffer; /* buffer in multiplexer mode */ | |
631 USHORT mux_pos; /* analyse position in multiplexer mode */ | |
632 BOOL waiting_for_data; /* waiting for indication of UART driver */ | |
633 #else /* FF_MULTI_PORT */ | |
634 T_BIT cldFromIrq; /* indicator whether it is an IRQ call */ | |
635 T_reInstMode *reInstall; /* reinstallation mode */ | |
636 UBYTE nsource; /* number of readable fragments */ | |
637 UBYTE *source[2]; /* addresses of readable fragments */ | |
638 USHORT *size; /* sizes of readable fragments */ | |
639 BOOL read_permission; /* permission of ISR to read out data */ | |
640 #endif /* FF_MULTI_PORT */ | |
641 | |
642 ULONG lines; /* status of V.24 lines */ | |
643 ULONG prev_lines; /* old status of V.24 lines */ | |
644 UBYTE dlc_instance; /* instance of DLC table */ | |
645 BOOL escape; /* control escape character received */ | |
646 UBYTE receive_state; /* state of reception */ | |
647 UBYTE analyze_state; /* state of frame analysis */ | |
648 UBYTE fcs; /* calculated fcs */ | |
649 UBYTE address_field; /* frame address field */ | |
650 USHORT stored_len; /* length of stored information field */ | |
651 #ifdef _SIMULATION_ | |
652 T_desc2* sim_buffer; /* to simulate driver reception buffer */ | |
653 USHORT sim_pos; /* position to read next byte */ | |
654 BOOL sim_send; /* send DTI_GETDATA_REQ */ | |
655 #endif /* _SIMULATION_ */ | |
656 } T_RX_DATA; | |
657 | |
658 | |
659 typedef struct /* T_TX_DATA */ | |
660 { | |
661 UBYTE state; | |
662 /* | |
663 * Required for state traces. | |
664 */ | |
665 #ifndef NTRACE | |
666 char *name; | |
667 char *state_name; | |
668 #endif /* !NTRACE */ | |
669 | |
670 #ifndef FF_MULTI_PORT | |
671 #ifdef WIN32 | |
672 NU_HISR tx_HISR; | |
673 #endif | |
674 #endif /* !FF_MULTI_PORT */ | |
675 | |
676 /* | |
677 * ab hier service spezif. | |
678 */ | |
679 #ifdef FF_MULTI_PORT | |
680 T_desc2* mux_buffer; /* buffer in multiplexer mode */ | |
681 USHORT mux_pos; /* transmit position in multiplexer mode */ | |
682 BOOL waiting_for_space; /* waiting for indication of UART driver */ | |
683 #ifdef _SIMULATION_ | |
684 T_desc2* sim_buffer; /* to simulate driver transsion buffer */ | |
685 USHORT sim_sent; /* already sent bytes */ | |
686 BOOL sim_waiting; /* waiting for READY */ | |
687 #endif /* _SIMULATION_ */ | |
688 #else /* FF_MULTI_PORT */ | |
689 T_BIT cldFromIrq; /* indicator whether it is an IRQ call */ | |
690 T_reInstMode *reInstall; /* reinstallation mode */ | |
691 UBYTE ndest; /* number of writeable fragments */ | |
692 UBYTE *dest[2]; /* addresses of writeable fragments */ | |
693 USHORT *size; /* sizes of writeable fragments */ | |
694 #endif /* FF_MULTI_PORT */ | |
695 | |
696 ULONG lines; /* status of V.24 lines */ | |
697 UBYTE dlc_instance; /* instance of global channel table */ | |
698 UBYTE p_zero; /* relative zero for priority counter */ | |
699 UBYTE send_state; /* indicator whether TX is sending */ | |
700 } T_TX_DATA; | |
701 | |
702 | |
703 typedef struct /* T_DTX_DATA */ | |
704 { | |
705 UBYTE state; | |
706 /* | |
707 * Required for state traces. | |
708 */ | |
709 #ifndef NTRACE | |
710 char *name; | |
711 char *state_name; | |
712 #endif /* !NTRACE */ | |
713 | |
714 /* | |
715 * service specific: | |
716 */ | |
717 /* stores generic data descriptor to send */ | |
718 T_desc2 *to_send_data; | |
719 /* current size of to send data descriptor */ | |
720 USHORT cur_desc_size; | |
721 /* next to write position in current descriptor */ | |
722 USHORT write_pos; | |
723 /* multiplier to dynamically adapt cur_desc_size; min. is 3 */ | |
724 USHORT size_multiplier; | |
725 /* flow control state (X bit) */ | |
726 UBYTE st_flow; | |
727 /* line state SA */ | |
728 UBYTE st_line_sa; | |
729 /* line state SB */ | |
730 UBYTE st_line_sb; | |
731 /* escape state */ | |
732 UBYTE st_break_len; | |
733 /* indicator whether line states changed */ | |
734 BOOL lines_changed; | |
735 /* state of internal data receiving */ | |
736 T_DTX_RECEIVING_STATE receiving_state; | |
737 /* indicator whether data flow is enabled or disabled */ | |
738 T_DATA_FLOW_STATE data_flow; | |
739 #if defined DTILIB | |
740 /* state of DTILIB connection */ | |
741 UBYTE dti_dtx_state; | |
742 #else | |
743 /* vsi handle for uplink of this entity */ | |
744 T_HANDLE hComm_DTX_UPLINK; | |
745 #endif | |
746 /* dlc instance wich belongs to this DTX instance */ | |
747 UBYTE dlc_instance; | |
748 /* enable/disable escape sequence detection */ | |
749 UBYTE detect_escape; | |
750 /* escape sequence detection state */ | |
751 T_ESD_STATE esd_state; | |
752 /* escape sequence detection guard period time */ | |
753 T_TIME esd_guard_time; | |
754 /* escape sequence detection scan position */ | |
755 USHORT esd_pos; | |
756 #ifdef _SIMULATION_ | |
757 char *esd_state_name; | |
758 #endif | |
759 } T_DTX_DATA; | |
760 | |
761 | |
762 typedef struct /* T_DRX_DATA */ | |
763 { | |
764 UBYTE state; | |
765 /* | |
766 * Required for state traces. | |
767 */ | |
768 #ifndef NTRACE | |
769 char *name; | |
770 char *state_name; | |
771 #endif /* !NTRACE */ | |
772 | |
773 /* | |
774 * service specific: | |
775 */ | |
776 /* DRX currently sending via UART? */ | |
777 T_DRX_SENDING_STATE sending_state; | |
778 /* data flow enabled/disabled */ | |
779 T_DATA_FLOW_STATE data_flow; | |
780 | |
781 /* data descriptor received via DTI */ | |
782 T_desc2* received_data; | |
783 /* already processed data */ | |
784 USHORT read_pos; | |
785 #if defined DTILIB | |
786 /* state of DTILIB connection */ | |
787 UBYTE dti_drx_state; | |
788 #else | |
789 /* vsi handle for uplink of this entity */ | |
790 T_HANDLE hComm_DRX_UPLINK; | |
791 #endif | |
792 /* dlc instance wich belongs to this DRX instance */ | |
793 UBYTE dlc_instance; | |
794 } T_DRX_DATA; | |
795 | |
796 | |
797 typedef struct /* T_RT_DATA */ | |
798 { | |
799 UBYTE state; | |
800 /* | |
801 * Required for state traces. | |
802 */ | |
803 #ifndef NTRACE | |
804 char *name; | |
805 char *state_name; | |
806 #endif /* !NTRACE */ | |
807 | |
808 /* | |
809 * service specific: | |
810 */ | |
811 T_TIMER_STATE state_t1; /* state of timer T1 */ | |
812 T_TIMER_STATE state_t2; /* state of timer T2 */ | |
813 T_TIMER_STATE state_t3; /* state of timer T3 */ | |
814 T_TIMER_STATE state_tesd; /* state of timer TESD */ | |
815 T_TIME t1; /* start value of timer T1 */ | |
816 T_TIME t2; /* start value of timer T2 */ | |
817 T_TIME t3; /* start value of timer T3 */ | |
818 T_TIME tesd; /* start value of timer TESD */ | |
819 | |
820 } T_RT_DATA; | |
821 | |
822 | |
823 /* | |
824 * global channel structure | |
825 */ | |
826 typedef struct /* T_DLC */ | |
827 { | |
828 T_DRX_DATA *drx; /* instance of appropriate DRX service */ | |
829 T_DTX_DATA *dtx; /* instance of appropriate DTX service */ | |
830 | |
831 UBYTE dlci; /* Data Link Connection Identifier */ | |
832 UBYTE priority; /* priority of dlc */ | |
833 #if defined DTILIB | |
834 UBYTE dti_state; /* state of DTILIB connection */ | |
835 #else | |
836 T_HANDLE hCommUPLINK; /* VSI connection handle */ | |
837 #endif | |
838 UBYTE connection_state; /* state of DLC connection */ | |
839 | |
840 /* | |
841 * information for service TX | |
842 */ | |
843 T_desc2* transmit_data; /* data to transmit to the TE */ | |
844 USHORT transmit_pos; /* start position to transmit */ | |
845 UBYTE p_counter; /* priority counter to dermine send interval */ | |
846 | |
847 /* | |
848 * information for service RX | |
849 */ | |
850 T_desc2* receive_data; /* descriptor to write */ | |
851 USHORT receive_pos; /* start position to write */ | |
852 USHORT receive_size; /* size of write descriptor */ | |
853 UBYTE receive_process; /* state of receive process */ | |
854 | |
855 /* | |
856 * information for service KER | |
857 */ | |
858 T_desc2* last_command; /* last sent command frame */ | |
859 T_desc2* next_command; /* next command frames to send */ | |
860 UBYTE retransmissions; /* number of retransmissions of command frame */ | |
861 ULONG lines; /* line states of DLC */ | |
862 UBYTE service; | |
863 UBYTE codec; | |
864 ULONG received_prim; /* bitfield of received UART primitives */ | |
865 BOOL flushed; /* indicator whether DLC is flushed */ | |
866 } T_DLC; | |
867 | |
868 | |
869 /* | |
870 * summery of all service | |
871 */ | |
872 | |
873 typedef struct /* T_UART_DATA */ | |
874 { | |
875 | |
876 /* | |
877 * UART layer parameters | |
878 */ | |
879 UBYTE version; | |
880 | |
881 /* | |
882 * Service data structures | |
883 * | |
884 * Services with multiple incarnations require an array of structures | |
885 * named xxx_base[] with xxx = service abbrevation, and additionally a | |
886 * pointer named *xxx, which will be accessed instead of xxx_base. | |
887 * | |
888 * Services with only one incarnation just have to declare one structure | |
889 * named xxx (no need for xxx_base[] and *xxx). | |
890 * | |
891 * The differentiation between the two access possibilites is made with | |
892 * the defines of the service names above (UART_SERVICE_XXX). | |
893 */ | |
894 T_KER_DATA ker; | |
895 T_RX_DATA rx; | |
896 T_TX_DATA tx; | |
897 T_DRX_DATA drx_base[UART_MAX_NUMBER_OF_CHANNELS]; | |
898 T_DRX_DATA *drx; | |
899 T_DTX_DATA dtx_base[UART_MAX_NUMBER_OF_CHANNELS]; | |
900 T_DTX_DATA *dtx; | |
901 T_RT_DATA rt; | |
902 | |
903 /* | |
904 * global UART variables | |
905 */ | |
906 UBYTE device; /* index of the UART channel for this instance */ | |
907 USHORT n1; /* max. length of a frame in multiplexer mode */ | |
908 UBYTE xon; /* XON character for software flow control */ | |
909 UBYTE xoff; /* XOFF character for software flow control */ | |
910 T_DLC dlc_table[UART_MAX_NUMBER_OF_CHANNELS + 1]; /* channel table */ | |
911 UBYTE dlc_instance[64]; /* lookup table for for DLC instances */ | |
912 USHORT timer_t1_index; /* Index of timer T1 in this instance */ | |
913 USHORT timer_t2_index; /* Index of timer T2 in this instance */ | |
914 USHORT timer_t3_index; /* Index of timer T3 in this instance */ | |
915 USHORT timer_tesd_index;/* Index of timer TESD in this instance */ | |
916 UBYTE act_ec; /* Escape Character */ | |
917 USHORT act_gp; /* Guard Period */ | |
918 | |
919 #ifdef WIN32 | |
920 UBYTE HISR_stack[HISR_STACK_SIZE]; | |
921 #endif | |
922 | |
923 /* | |
924 * global UART constants | |
925 */ | |
926 UBYTE* fcstab; /* lookup table for FCS calculation */ | |
927 } T_UART_DATA; | |
928 | |
929 #ifndef DTILIB | |
930 /* | |
931 * global table which maps an unique c_id to | |
932 * pointers of DRX/DTX instances which serve this channel | |
933 */ | |
934 typedef struct /* T_UART_CID_TABLE */ | |
935 { | |
936 UBYTE c_id; /* channel id */ | |
937 T_UART_DATA* uart_data; /* pointer to UART data for this channel */ | |
938 T_DRX_DATA* drx; /* pointer to DRX service for this channel */ | |
939 T_DTX_DATA* dtx; /* pointer to DTX service for this channel */ | |
940 } T_UART_CID_TABLE; | |
941 #endif /* DTILIB */ | |
942 | |
943 /*==== EXPORT =====================================================*/ | |
944 | |
945 | |
946 /* | |
947 * Entity data base | |
948 */ | |
949 | |
950 #ifdef UART_PEI_C | |
951 /* | |
952 * FCS lookup table | |
953 */ | |
954 static UBYTE uart_fcstable_base[256] = { /* reversed, 8-bit, poly=0x07 */ | |
955 0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, | |
956 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B, | |
957 0x1C, 0x8D, 0xFF, 0x6E, 0x1B, 0x8A, 0xF8, 0x69, | |
958 0x12, 0x83, 0xF1, 0x60, 0x15, 0x84, 0xF6, 0x67, | |
959 0x38, 0xA9, 0xDB, 0x4A, 0x3F, 0xAE, 0xDC, 0x4D, | |
960 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43, | |
961 0x24, 0xB5, 0xC7, 0x56, 0x23, 0xB2, 0xC0, 0x51, | |
962 0x2A, 0xBB, 0xC9, 0x58, 0x2D, 0xBC, 0xCE, 0x5F, | |
963 0x70, 0xE1, 0x93, 0x02, 0x77, 0xE6, 0x94, 0x05, | |
964 0x7E, 0xEF, 0x9D, 0x0C, 0x79, 0xE8, 0x9A, 0x0B, | |
965 0x6C, 0xFD, 0x8F, 0x1E, 0x6B, 0xFA, 0x88, 0x19, | |
966 0x62, 0xF3, 0x81, 0x10, 0x65, 0xF4, 0x86, 0x17, | |
967 0x48, 0xD9, 0xAB, 0x3A, 0x4F, 0xDE, 0xAC, 0x3D, | |
968 0x46, 0xD7, 0xA5, 0x34, 0x41, 0xD0, 0xA2, 0x33, | |
969 0x54, 0xC5, 0xB7, 0x26, 0x53, 0xC2, 0xB0, 0x21, | |
970 0x5A, 0xCB, 0xB9, 0x28, 0x5D, 0xCC, 0xBE, 0x2F, | |
971 0xE0, 0x71, 0x03, 0x92, 0xE7, 0x76, 0x04, 0x95, | |
972 0xEE, 0x7F, 0x0D, 0x9C, 0xE9, 0x78, 0x0A, 0x9B, | |
973 0xFC, 0x6D, 0x1F, 0x8E, 0xFB, 0x6A, 0x18, 0x89, | |
974 0xF2, 0x63, 0x11, 0x80, 0xF5, 0x64, 0x16, 0x87, | |
975 0xD8, 0x49, 0x3B, 0xAA, 0xDF, 0x4E, 0x3C, 0xAD, | |
976 0xD6, 0x47, 0x35, 0xA4, 0xD1, 0x40, 0x32, 0xA3, | |
977 0xC4, 0x55, 0x27, 0xB6, 0xC3, 0x52, 0x20, 0xB1, | |
978 0xCA, 0x5B, 0x29, 0xB8, 0xCD, 0x5C, 0x2E, 0xBF, | |
979 0x90, 0x01, 0x73, 0xE2, 0x97, 0x06, 0x74, 0xE5, | |
980 0x9E, 0x0F, 0x7D, 0xEC, 0x99, 0x08, 0x7A, 0xEB, | |
981 0x8C, 0x1D, 0x6F, 0xFE, 0x8B, 0x1A, 0x68, 0xF9, | |
982 0x82, 0x13, 0x61, 0xF0, 0x85, 0x14, 0x66, 0xF7, | |
983 0xA8, 0x39, 0x4B, 0xDA, 0xAF, 0x3E, 0x4C, 0xDD, | |
984 0xA6, 0x37, 0x45, 0xD4, 0xA1, 0x30, 0x42, 0xD3, | |
985 0xB4, 0x25, 0x57, 0xC6, 0xB3, 0x22, 0x50, 0xC1, | |
986 0xBA, 0x2B, 0x59, 0xC8, 0xBD, 0x2C, 0x5E, 0xCF | |
987 }; | |
988 | |
989 T_UART_DATA uart_data_base[ UART_INSTANCES ], *uart_data; | |
990 | |
991 #ifndef DTILIB | |
992 /* | |
993 * global table which maps an unique c_id to the instance | |
994 * number of the UART instance which serves this channel | |
995 */ | |
996 T_UART_CID_TABLE uart_cid_table[ UART_INSTANCES * \ | |
997 UART_MAX_NUMBER_OF_CHANNELS ]; | |
998 #endif /* !DTILIB */ | |
999 | |
1000 #else /* UART_PEI_C */ | |
1001 EXTERN UBYTE uart_fcstable_base[256]; | |
1002 EXTERN T_UART_DATA uart_data_base[], *uart_data; | |
1003 #ifndef DTILIB | |
1004 EXTERN T_UART_CID_TABLE uart_cid_table[]; | |
1005 #endif /* !UART_DTILIB */ | |
1006 /* | |
1007 * function prototypes | |
1008 */ | |
1009 #ifdef FF_MULTI_PORT | |
1010 EXTERN void pei_uart_driver_signal (T_DRV_SIGNAL *SigPtr); | |
1011 #endif /* FF_MULTI_PORT */ | |
1012 #endif /* UART_PEI_C */ | |
1013 | |
1014 #define ENTITY_DATA uart_data | |
1015 | |
1016 /* | |
1017 * prefix service functions | |
1018 */ | |
1019 #define ker_init _ENTITY_PREFIXED(ker_init) | |
1020 #define rx_init _ENTITY_PREFIXED(rx_init) | |
1021 #define tx_init _ENTITY_PREFIXED(tx_init) | |
1022 #define drx_init _ENTITY_PREFIXED(drx_init) | |
1023 #define dtx_init _ENTITY_PREFIXED(dtx_init) | |
1024 #define rt_init _ENTITY_PREFIXED(rt_init) | |
1025 #define rx_read_data _ENTITY_PREFIXED(rx_read_data) | |
1026 #define tx_write_data _ENTITY_PREFIXED(tx_write_data) | |
1027 #define tx_create_hdlc_frame _ENTITY_PREFIXED(tx_create_hdlc_frame) | |
1028 | |
1029 #if defined (DTILIB) | |
1030 #ifdef _SIMULATION_ | |
1031 #define sig_dti_ker_connection_opened_ind \ | |
1032 _ENTITY_PREFIXED(sig_dti_ker_connection_opened_ind) | |
1033 #define sig_dti_ker_connection_closed_ind \ | |
1034 _ENTITY_PREFIXED(sig_dti_ker_connection_closed_ind) | |
1035 #define sig_dti_drx_data_received_ind \ | |
1036 _ENTITY_PREFIXED(sig_dti_drx_data_received_ind) | |
1037 #define sig_dti_dtx_tx_buffer_full_ind \ | |
1038 _ENTITY_PREFIXED(sig_dti_dtx_tx_buffer_full_ind) | |
1039 #define sig_dti_dtx_tx_buffer_ready_ind \ | |
1040 _ENTITY_PREFIXED(sig_dti_dtx_tx_buffer_ready_ind) | |
1041 | |
1042 #ifdef DTI2 | |
1043 /* | |
1044 * for the driver-simulation dti channel, the c_id parameter | |
1045 * is already in use for transmission of control information | |
1046 * (which was formerly stored in the tui .. ;), unfortunately. | |
1047 * NOTE: not yet implemented!!! | |
1048 */ | |
1049 #define UART_TEST_C_ID_1 0 | |
1050 #define UART_TEST_C_ID_2 1 | |
1051 | |
1052 | |
1053 | |
1054 /* | |
1055 * these are __in no way__ real link_ids. Instead, the variable is used for | |
1056 * communication between the entity and the test environment, here. In | |
1057 * previous versions, the tui was used for this, but since DTI2 primitives do | |
1058 * not contain such a parameter any more, the dirty work has been passed on to | |
1059 * the link_id .. | |
1060 * | |
1061 * This is directly taken from | |
1062 */ | |
1063 | |
1064 #define LINK_READDATA_PORT_1 0 /* misused link_id for read_data call */ | |
1065 #define LINK_DISABLE_PORT_1 1 /* misused link_id for disable call */ | |
1066 #define LINK_ENABLE_PORT_1 2 /* misused link_id for enable call */ | |
1067 #define LINK_WRITEDATA_PORT_1 3 /* misused link_id for write_data call */ | |
1068 | |
1069 #define LINK_READDATA_PORT_2 10 /* misused link_id for read_data call */ | |
1070 #define LINK_DISABLE_PORT_2 11 /* misused link_id for disable call */ | |
1071 #define LINK_ENABLE_PORT_2 12 /* misused link_id for enable call */ | |
1072 #define LINK_WRITEDATA_PORT_2 13 /* misused link_id for write_data call */ | |
1073 | |
1074 #define LINK_UART_OUT_PORT_1 0 /* misused link_id of UART_OUT test interface */ | |
1075 #define LINK_UART_OUT_PORT_2 10 /* misused link_id of UART_OUT test interface */ | |
1076 | |
1077 #define LINK_PORT_THRESHOLD 9 /* to be able to distinguish between port 1 and port2 */ | |
1078 | |
1079 #endif /* DTI2 */ | |
1080 | |
1081 #endif /* _SIMULATION_ */ | |
1082 | |
1083 #endif /* DTILIB */ | |
1084 | |
1085 | |
1086 /* | |
1087 * Communication handles (see also UART_PEI.C) | |
1088 */ | |
1089 #ifdef UART_PEI_C | |
1090 | |
1091 T_HANDLE hCommMMI = VSI_ERROR; | |
1092 T_HANDLE hCommUART = VSI_ERROR; | |
1093 T_HANDLE UART_handle; | |
1094 | |
1095 /* | |
1096 * make the pei_create function unique | |
1097 */ | |
1098 #define pei_create _ENTITY_PREFIXED(pei_create) | |
1099 | |
1100 #else /* UART_PEI_C */ | |
1101 | |
1102 EXTERN T_HANDLE hCommMMI; | |
1103 EXTERN T_HANDLE hCommUART; | |
1104 EXTERN T_HANDLE UART_handle; | |
1105 /* | |
1106 * functions for switching of entities/instances | |
1107 */ | |
1108 #ifndef DTILIB | |
1109 EXTERN UBYTE pei_select_instances( UBYTE incoming_c_id ); | |
1110 #endif | |
1111 | |
1112 #endif /* UART_PEI_C */ | |
1113 | |
1114 #ifdef DTILIB | |
1115 EXTERN DTI_HANDLE uart_hDTI; | |
1116 #endif | |
1117 | |
1118 #endif /* !UART_H */ |