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comparison g23m-aci/uart/uart_txs.c @ 0:75a11d740a02

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initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 09 Jun 2016 00:02:41 +0000
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-1:000000000000 0:75a11d740a02
1 /*
2 +-----------------------------------------------------------------------------
3 | Project :
4 | Modul :
5 +-----------------------------------------------------------------------------
6 | Copyright 2002 Texas Instruments Berlin, AG
7 | All rights reserved.
8 |
9 | This file is confidential and a trade secret of Texas
10 | Instruments Berlin, AG
11 | The receipt of or possession of this file does not convey
12 | any rights to reproduce or disclose its contents or to
13 | manufacture, use, or sell anything it may describe, in
14 | whole, or in part, without the specific written consent of
15 | Texas Instruments Berlin, AG.
16 +-----------------------------------------------------------------------------
17 | Purpose : This modul is part of the entity UART and implements all
18 | functions to handles the incoming process internal signals as
19 | described in the SDL-documentation (TX-statemachine)
20 +-----------------------------------------------------------------------------
21 */
22
23 #ifndef UART_TXS_C
24 #define UART_TXS_C
25 #endif /* !UART_TXS_C */
26
27 #include "config.h"
28 #include "fixedconf.h"
29 #include "condat-features.h"
30
31 #define ENTITY_UART
32
33 #ifndef FF_MULTI_PORT
34 /*==== INCLUDES =============================================================*/
35
36 #ifdef WIN32
37 #include "nucleus.h"
38 #endif /* WIN32 */
39 #include "typedefs.h" /* to get Condat data types */
40 #include "vsi.h" /* to get a lot of macros */
41 #include "macdef.h" /* to get a lot of macros */
42 #include "custom.h"
43 #include "gsm.h" /* to get a lot of macros */
44 #include "cnf_uart.h" /* to get cnf-definitions */
45 #include "mon_uart.h" /* to get mon-definitions */
46 #include "prim.h" /* to get the definitions of used SAP and directions */
47 #ifdef DTILIB
48 #include "dti.h" /* to get dti lib */
49 #endif /* DTILIB */
50 #include "pei.h" /* to get PEI interface */
51 #ifdef _TARGET_
52 #include "../../serial/serialswitch.h"
53 #include "../../serial/traceswitch.h"
54 #else /* _TARGET_ */
55 #include "serial_dat.h" /* to get definitions of serial driver */
56 #endif /* _TARGET_ */
57 #include "uart.h" /* to get the global entity definitions */
58
59 #include "uart_txf.h" /* to get tx functions */
60
61 #include "uart_kers.h" /* to get ker signals */
62 #include "uart_drxs.h" /* to get drx signals */
63
64 #ifdef _SIMULATION_
65 #include <stdio.h> /* to get sprintf */
66 #include "uart_txp.h" /* to get tx_writedata */
67 #endif /* _SIMULATION_ */
68
69 /*==== CONST ================================================================*/
70
71 /*==== LOCAL VARS ===========================================================*/
72
73 /*==== PRIVATE FUNCTIONS ====================================================*/
74
75 /*==== PUBLIC FUNCTIONS =====================================================*/
76
77
78
79 /*
80 +------------------------------------------------------------------------------
81 | Function : sig_ker_tx_dead_mode_req
82 +------------------------------------------------------------------------------
83 | Description : Handles the internal signal SIG_KER_TX_DEAD_MODE_REQ. If this
84 | signal is called the service expectes an disabled UART to work
85 | correctly.
86 |
87 | Parameters : no parameters
88 |
89 +------------------------------------------------------------------------------
90 */
91 GLOBAL void sig_ker_tx_dead_mode_req ()
92 {
93 TRACE_ISIG( "sig_ker_tx_dead_mode_req" );
94
95 uart_data->tx.lines = 0x80000000; /* invalid */
96 uart_data->tx.dlc_instance = UART_EMPTY_INSTANCE;
97 uart_data->tx.p_zero = 0;
98 uart_data->tx.send_state = UART_TX_NOT_SENDING;
99
100 switch( GET_STATE( UART_SERVICE_TX ) )
101 {
102 case TX_READY:
103 case TX_MUX:
104 SET_STATE( UART_SERVICE_TX, TX_DEAD );
105 break;
106
107 case TX_DEAD:
108 break;
109
110 default:
111 TRACE_ERROR( "SIG_KER_TX_DEAD_MODE_REQ unexpected" );
112 break;
113 }
114 } /* sig_ker_tx_dead_mode_req() */
115
116
117
118 /*
119 +------------------------------------------------------------------------------
120 | Function : sig_ker_tx_ready_mode_req
121 +------------------------------------------------------------------------------
122 | Description : Handles the internal signal SIG_KER_TX_READY_MODE_REQ.
123 |
124 | Parameters : no parameters
125 |
126 +------------------------------------------------------------------------------
127 */
128 GLOBAL void sig_ker_tx_ready_mode_req ()
129 {
130 TRACE_ISIG( "sig_ker_tx_ready_mode_req" );
131
132
133 switch( GET_STATE( UART_SERVICE_TX ) )
134 {
135 case TX_DEAD:
136 SET_STATE( UART_SERVICE_TX, TX_READY );
137 uart_data->tx.dlc_instance = UART_EMPTY_INSTANCE;
138 uart_data->tx.send_state = UART_TX_NOT_SENDING;
139 break;
140
141 case TX_MUX:
142 SET_STATE( UART_SERVICE_TX, TX_READY );
143 if(uart_data->tx.send_state EQ UART_TX_NOT_SENDING)
144 uart_data->tx.dlc_instance = UART_EMPTY_INSTANCE;
145 break;
146
147 case TX_READY:
148 break;
149
150 default:
151 TRACE_ERROR( "SIG_KER_TX_READY_MODE_REQ unexpected" );
152 break;
153 }
154 } /* sig_ker_tx_ready_mode_req() */
155
156
157
158 /*
159 +------------------------------------------------------------------------------
160 | Function : sig_ker_tx_mux_mode_req
161 +------------------------------------------------------------------------------
162 | Description : Handles the internal signal SIG_KER_TX_MUX_MODE_REQ
163 |
164 | Parameters : no parameters
165 |
166 +------------------------------------------------------------------------------
167 */
168 GLOBAL void sig_ker_tx_mux_mode_req ()
169 {
170 TRACE_ISIG( "sig_ker_tx_mux_mode_req" );
171
172 switch( GET_STATE( UART_SERVICE_TX ) )
173 {
174 case TX_DEAD:
175 SET_STATE( UART_SERVICE_TX, TX_MUX );
176 uart_data->tx.send_state = UART_TX_NOT_SENDING;
177 break;
178
179 case TX_READY:
180 SET_STATE( UART_SERVICE_TX, TX_MUX );
181 break;
182
183 case TX_MUX:
184 break;
185
186 default:
187 TRACE_ERROR( "SIG_KER_TX_MUX_MODE_REQ unexpected" );
188 break;
189 }
190 } /* sig_ker_tx_mux_mode_req() */
191
192
193
194 /*
195 +------------------------------------------------------------------------------
196 | Function : sig_drx_tx_data_available_ind
197 +------------------------------------------------------------------------------
198 | Description : Handles the internal signal SIG_DRX_TX_DATA_AVAILABLE_IND
199 |
200 | Parameters : dlc_instance - dlc instance wich belongs to calling DRX
201 | transmit_data - descriptors to transmit
202 | transmit_pos - position to start tranmission in first desc
203 |
204 +------------------------------------------------------------------------------
205 */
206 GLOBAL void sig_drx_tx_data_available_ind (UBYTE dlc_instance,
207 T_desc2* transmit_data,
208 USHORT transmit_pos)
209 {
210 T_DLC* dlc;
211
212 TRACE_ISIG( "sig_drx_tx_data_available_ind" );
213
214 dlc = &uart_data->dlc_table[dlc_instance];
215 dlc->transmit_data = transmit_data;
216 dlc->transmit_pos = transmit_pos;
217 dlc->p_counter = dlc->priority + uart_data->tx.p_zero;
218
219 switch( GET_STATE( UART_SERVICE_TX ) )
220 {
221 case TX_READY:
222 if(uart_data->tx.send_state EQ UART_TX_NOT_SENDING)
223 {
224 uart_data->tx.dlc_instance = UART_EMPTY_INSTANCE;
225 /*
226 * inform dlc about sending
227 */
228 if(dlc->transmit_data EQ NULL)
229 {
230 /*
231 * no more data
232 */
233 break;
234 }
235 uart_data->tx.send_state = UART_TX_SENDING;
236 uart_data->drx = dlc->drx;
237 sig_tx_drx_sending_req();
238 /*
239 * transmit data
240 */
241 if(uart_data EQ (&(uart_data_base[0])))
242 {
243 TRACE_EVENT("UF_WriteData()");
244 #ifdef _SIMULATION_
245 tx_writedata(0);
246 #else /* _SIMULATION_ */
247 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_0);
248 #endif /* else _SIMULATION_ */
249 }
250 #ifdef FF_TWO_UART_PORTS
251 else if(uart_data EQ (&(uart_data_base[1])))
252 {
253 TRACE_EVENT("UF_WriteData()");
254 #ifdef _SIMULATION_
255 tx_writedata(1);
256 #else /* _SIMULATION_ */
257 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_1);
258 #endif /* else _SIMULATION_ */
259 }
260 #endif /* FF_TWO_UART_PORTS */
261 else
262 {
263 TRACE_ERROR("wrong value of uart_data");
264 }
265 }
266 break;
267
268 case TX_MUX:
269 if(uart_data->tx.send_state EQ UART_TX_NOT_SENDING)
270 {
271 /*
272 * determine next dlc allow to send
273 */
274 tx_next_send_allowed();
275 /*
276 * inform dlc about sending
277 */
278 if(uart_data->tx.dlc_instance EQ UART_EMPTY_INSTANCE)
279 {
280 /*
281 * queue empty
282 */
283 break;
284 }
285 dlc = &uart_data->dlc_table[uart_data->tx.dlc_instance];
286 uart_data->tx.send_state = UART_TX_SENDING;
287 if(uart_data->tx.dlc_instance EQ UART_CONTROL_INSTANCE)
288 {
289 /*
290 * Control channel
291 */
292 sig_tx_ker_sending_ind();
293 }
294 else
295 {
296 /*
297 * Data channel
298 */
299 uart_data->drx = dlc->drx;
300 sig_tx_drx_sending_req();
301 }
302 /*
303 * transmit data
304 */
305 #ifndef _SIMULATION_
306 tx_flushUart();
307 #endif /* !_SIMULATION_ */
308 if(uart_data EQ (&(uart_data_base[0])))
309 {
310 TRACE_EVENT("UF_WriteData()");
311 #ifdef _SIMULATION_
312 tx_writedata(0);
313 #else /* _SIMULATION_ */
314 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_0);
315 #endif /* else _SIMULATION_ */
316 }
317 #ifdef FF_TWO_UART_PORTS
318 else if(uart_data EQ (&(uart_data_base[1])))
319 {
320 TRACE_EVENT("UF_WriteData()");
321 #ifdef _SIMULATION_
322 tx_writedata(1);
323 #else /* _SIMULATION_ */
324 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_1);
325 #endif /* else _SIMULATION_ */
326 }
327 #endif /* FF_TWO_UART_PORTS */
328 else
329 {
330 TRACE_ERROR("wrong value of uart_data");
331 }
332 }
333 break;
334
335 default:
336 TRACE_ERROR( "SIG_DRX_TX_DATA_AVAILABLE_IND unexpected" );
337 break;
338 }
339 } /* sig_drx_tx_data_available_ind() */
340
341
342
343 /*
344 +------------------------------------------------------------------------------
345 | Function : sig_ker_tx_data_available_req
346 +------------------------------------------------------------------------------
347 | Description : Handles the internal signal SIG_KER_TX_DATA_AVAILABLE_REQ
348 |
349 | Parameters : transmit_data - descriptors to transmit
350 | transmit_pos - position to start tranmission in first desc
351 |
352 +------------------------------------------------------------------------------
353 */
354 GLOBAL void sig_ker_tx_data_available_req (T_desc2* transmit_data,
355 USHORT transmit_pos)
356 {
357 T_DLC* dlc;
358
359 TRACE_ISIG( "sig_ker_tx_data_available_req" );
360
361 dlc = &uart_data->dlc_table[UART_CONTROL_INSTANCE];
362 dlc->transmit_data = transmit_data;
363 dlc->transmit_pos = transmit_pos;
364 dlc->p_counter = dlc->priority + uart_data->tx.p_zero;
365
366 #ifdef _SIMULATION_
367 if(transmit_data->len)
368 {
369 USHORT i;
370 USHORT pos;
371 char buf[90];
372 /*
373 * trace output
374 */
375 TRACE_EVENT("====== OUT");
376 i = 0;
377 pos = 0;
378 while(pos < transmit_data->len)
379 {
380 i+= sprintf(&buf[i], "0x%02x, ", transmit_data->buffer[pos]);
381 pos++;
382 if(i > 80)
383 {
384 TRACE_EVENT( buf );
385 i = 0;
386 }
387 else if(pos >= transmit_data->len)
388 {
389 TRACE_EVENT( buf );
390 }
391 }
392 }
393 #endif /* _SIMULATION_ */
394
395 switch( GET_STATE( UART_SERVICE_TX ) )
396 {
397 case TX_MUX:
398 if(uart_data->tx.send_state EQ UART_TX_NOT_SENDING)
399 {
400 /*
401 * determine next dlc allow to send
402 */
403 tx_next_send_allowed();
404 /*
405 * inform dlc about sending
406 */
407 if(uart_data->tx.dlc_instance == UART_EMPTY_INSTANCE)
408 {
409 /*
410 * queue empty
411 */
412 break;
413 }
414 uart_data->tx.send_state = UART_TX_SENDING;
415 dlc = &uart_data->dlc_table[uart_data->tx.dlc_instance];
416 if(uart_data->tx.dlc_instance EQ UART_CONTROL_INSTANCE)
417 {
418 /*
419 * Control channel
420 */
421 sig_tx_ker_sending_ind();
422 }
423 else
424 {
425 /*
426 * Data channel
427 */
428 uart_data->drx = dlc->drx;
429 sig_tx_drx_sending_req();
430 }
431 /*
432 * transmit data
433 */
434 #ifndef _SIMULATION_
435 tx_flushUart();
436 #endif /* !_SIMULATION_ */
437 if(uart_data EQ (&(uart_data_base[0])))
438 {
439 TRACE_EVENT("UF_WriteData()");
440 #ifdef _SIMULATION_
441 tx_writedata(0);
442 #else /* _SIMULATION_ */
443 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_0);
444 #endif /* else _SIMULATION_ */
445 }
446 #ifdef FF_TWO_UART_PORTS
447 else if(uart_data EQ (&(uart_data_base[1])))
448 {
449 TRACE_EVENT("UF_WriteData()");
450 #ifdef _SIMULATION_
451 tx_writedata(1);
452 #else /* _SIMULATION_ */
453 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_1);
454 #endif /* else _SIMULATION_ */
455 }
456 #endif /* FF_TWO_UART_PORTS */
457 else
458 {
459 TRACE_ERROR("wrong value of uart_data");
460 }
461 }
462 break;
463
464 default:
465 TRACE_ERROR( "SIG_KER_TX_DATA_AVAILABLE_REQ unexpected" );
466 break;
467 }
468 } /* sig_ker_tx_data_available_req() */
469
470
471
472 /*
473 +------------------------------------------------------------------------------
474 | Function : sig_drx_tx_data_not_available_ind
475 +------------------------------------------------------------------------------
476 | Description : Handles the internal signal SIG_DRX_TX_DATA_NOT_AVAILABLE_IND
477 |
478 | Parameters : dlc_instance - dlc instance wich belongs to calling DRX
479 |
480 +------------------------------------------------------------------------------
481 */
482 GLOBAL void sig_drx_tx_data_not_available_ind (UBYTE dlc_instance)
483 {
484 TRACE_ISIG( "sig_drx_tx_data_not_available_ind" );
485
486 uart_data->dlc_table[dlc_instance].transmit_data = NULL;
487 } /* sig_drx_tx_data_not_available_ind() */
488
489
490
491 /*
492 +------------------------------------------------------------------------------
493 | Function : sig_ker_tx_data_not_available_req
494 +------------------------------------------------------------------------------
495 | Description : Handles the internal signal SIG_KER_TX_DATA_NOT_AVAILABLE_REQ
496 |
497 | Parameters : no parameters
498 |
499 +------------------------------------------------------------------------------
500 */
501 GLOBAL void sig_ker_tx_data_not_available_req ()
502 {
503 TRACE_ISIG( "sig_ker_tx_data_not_available_req" );
504
505 uart_data->dlc_table[UART_CONTROL_INSTANCE].transmit_data = NULL;
506 } /* sig_ker_tx_data_not_available_req() */
507
508
509
510 /*
511 +------------------------------------------------------------------------------
512 | Function : sig_ker_tx_line_states_req
513 +------------------------------------------------------------------------------
514 | Description : Handles the internal signal SIG_KER_TX_LINE_STATES_REQ
515 |
516 | Parameters : dlc_instance - DLC which contains new line states
517 |
518 +------------------------------------------------------------------------------
519 */
520 GLOBAL void sig_ker_tx_line_states_req (UBYTE dlc_instance)
521 {
522 T_DLC* dlc;
523 SHORT ret = 0; /* Error returned from a function */
524
525 TRACE_ISIG( "sig_ker_tx_line_states_req" );
526
527 /*
528 * set DLC
529 */
530 dlc = &uart_data->dlc_table[dlc_instance];
531
532 /*
533 * UART number has to be checked.
534 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
535 * flow control is not supported.
536 * DCD and DTR are not supported on UART Irda on C & D-Sample.
537 */
538 if((uart_data->tx.lines != dlc->lines))
539 {
540 /*
541 * set new line states separatly because
542 * if one line is not supported by the driver
543 * we can still set the other lines
544 */
545 if(dlc->lines & UART_SA_TX_MASK)
546 {
547 if(((ret = UF_SetLineState(uart_data->device, (ULONG)(SA_MASK),
548 (ULONG)(SA_MASK))) != UF_OK) &&
549 (uart_data->device != 0))
550 {
551 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
552 ret, __LINE__);
553 }
554 }
555 else
556 {
557 if(((ret = UF_SetLineState(uart_data->device, 0,
558 (ULONG)(SA_MASK))) != UF_OK) &&
559 (uart_data->device != 0))
560 {
561 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
562 ret, __LINE__);
563 }
564 }
565
566 if(dlc->lines & UART_SB_TX_MASK) /* also DCD */
567 {
568 if(((ret = UF_SetLineState(uart_data->device, 0,
569 (ULONG)(SB_MASK))) != UF_OK) &&
570 (uart_data->device != 0))
571 {
572 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
573 ret, __LINE__);
574 }
575 }
576 else
577 {
578 if(((ret = UF_SetLineState(uart_data->device, (ULONG)(SB_MASK),
579 (ULONG)(SB_MASK))) != UF_OK) &&
580 (uart_data->device != 0))
581 {
582 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
583 ret, __LINE__);
584 }
585 }
586
587 if(dlc->lines & UART_X_TX_MASK)
588 {
589 if(((ret = UF_SetLineState(uart_data->device, (ULONG)(X_MASK),
590 (ULONG)(X_MASK))) != UF_OK) &&
591 (uart_data->device != 0))
592 {
593 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
594 ret, __LINE__);
595 }
596 }
597 else
598 {
599 if(((ret = UF_SetLineState(uart_data->device, 0,
600 (ULONG)(X_MASK))) != UF_OK) &&
601 (uart_data->device != 0))
602 {
603 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
604 ret, __LINE__);
605 }
606 }
607
608 if(dlc->lines & UART_RI_MASK)
609 {
610 if(((ret = UF_SetLineState(uart_data->device, (ULONG)(RI_MASK),
611 (ULONG)(RI_MASK))) != UF_OK) &&
612 (uart_data->device != 0))
613 {
614 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
615 ret, __LINE__);
616 }
617 }
618 else
619 {
620 if(((ret = UF_SetLineState(uart_data->device, 0,
621 (ULONG)(RI_MASK))) != UF_OK) &&
622 (uart_data->device != 0))
623 {
624 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
625 ret, __LINE__);
626 }
627 }
628
629 if(dlc->lines & UART_BRK_TX_MASK)
630 {
631 /*
632 * send break
633 */
634 if(((ret = UF_SetLineState(uart_data->device,
635 (ULONG)((1UL<<BRK) |
636 (((dlc->lines & UART_BRKLEN_TX_MASK)
637 >> UART_BRKLEN_TX_POS)
638 << BRKLEN)),
639 (ULONG)(BRK_MASK | BRK_LEN_MASK))) != UF_OK)
640 && (uart_data->device != 0))
641 {
642 TRACE_ERROR_P2("UF driver: SetLineState failed, [%d], uart_txs.c(%d)",
643 ret, __LINE__);
644 }
645 /*
646 * break sent, so clear break flag
647 */
648 dlc->lines&= ~UART_BRK_TX_MASK;
649 }
650 uart_data->tx.lines = dlc->lines;
651 }
652 } /* sig_ker_tx_line_states_req() */
653
654
655
656 /*
657 +------------------------------------------------------------------------------
658 | Function : sig_ker_tx_flush_req
659 +------------------------------------------------------------------------------
660 | Description : Handles the internal signal SIG_KER_TX_FLUSH_REQ
661 |
662 | Parameters : no parameters
663 |
664 +------------------------------------------------------------------------------
665 */
666 GLOBAL void sig_ker_tx_flush_req ()
667 {
668 TRACE_ISIG( "sig_ker_tx_flush_req" );
669
670 switch( GET_STATE( UART_SERVICE_TX ) )
671 {
672 case TX_READY:
673 case TX_MUX:
674 #ifndef _SIMULATION_
675 tx_flushUart();
676 #endif /* !_SIMULATION_ */
677 sig_tx_ker_flushed_ind();
678 break;
679
680 default:
681 TRACE_ERROR( "SIG_KER_TX_FLUSH_REQ unexpected" );
682 break;
683 }
684 } /* sig_ker_tx_flush_req() */
685
686
687
688 /*
689 +------------------------------------------------------------------------------
690 | Function : sig_ker_tx_restart_write_req
691 +------------------------------------------------------------------------------
692 | Description : Handles the internal signal SIG_KER_TX_RESTART_WRITE_REQ
693 |
694 | Parameters : no parameters
695 |
696 +------------------------------------------------------------------------------
697 */
698 GLOBAL void sig_ker_tx_restart_write_req ()
699 {
700 TRACE_ISIG( "sig_ker_tx_restart_write_req" );
701
702 switch( GET_STATE( UART_SERVICE_TX ) )
703 {
704 case TX_READY:
705 case TX_MUX:
706 if(uart_data->tx.send_state EQ UART_TX_SENDING)
707 {
708 /*
709 * restart writeInFunc
710 */
711 #ifndef _SIMULATION_
712 tx_flushUart();
713 #endif /* !_SIMULATION_ */
714 if(uart_data EQ (&(uart_data_base[0])))
715 {
716 TRACE_EVENT("UF_WriteData()");
717 #ifdef _SIMULATION_
718 tx_writedata(0);
719 #else /* _SIMULATION_ */
720 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_0);
721 #endif /* else _SIMULATION_ */
722 }
723 #ifdef FF_TWO_UART_PORTS
724 else if(uart_data EQ (&(uart_data_base[1])))
725 {
726 TRACE_EVENT("UF_WriteData()");
727 #ifdef _SIMULATION_
728 tx_writedata(1);
729 #else /* _SIMULATION_ */
730 UF_WriteData (uart_data->device, sm_suspend, tx_writeInFunc_1);
731 #endif /* else _SIMULATION_ */
732 }
733 #endif /* FF_TWO_UART_PORTS */
734 else
735 {
736 TRACE_ERROR("wrong value of uart_data");
737 }
738 }
739 break;
740
741 default:
742 TRACE_ERROR( "SIG_KER_TX_RESTART_WRITE_REQ unexpected" );
743 break;
744 }
745 } /* sig_ker_tx_restart_write_req() */
746 #endif /* !FF_MULTI_PORT */