FreeCalypso > hg > freecalypso-citrine
comparison sysglue/flashboot.S @ 0:75a11d740a02
initial import of gsm-fw from freecalypso-sw rev 1033:5ab737ac3ad7
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 09 Jun 2016 00:02:41 +0000 |
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1 /* | |
2 * This assembly module contains those bits which are specific to flashable | |
3 * image builds only. It puts bits of code into several different sections. | |
4 */ | |
5 | |
6 #include "../include/config.h" | |
7 | |
8 #if FLASH_BOOT_VIA_BOOTROM | |
9 /* | |
10 * Put something sensible in the boot ROM overlay area, just for the | |
11 * heck of it, or for extra robustness. | |
12 */ | |
13 .section bootrom.overlay,"ax",%progbits | |
14 .code 32 | |
15 .org 0 | |
16 b BootROM_disabled_entry | |
17 #include "vectors.S" | |
18 BootROM_disabled_entry: | |
19 /* copy the boot ROM switch code to IRAM and jump to it */ | |
20 ldr r4, =__romswitch_flash_addr | |
21 ldr r5, =__romswitch_ram_addr | |
22 ldr r2, =__romswitch_size | |
23 1: ldr r0, [r4], #4 | |
24 str r0, [r5], #4 | |
25 subs r2, r2, #4 | |
26 bhi 1b | |
27 ldr pc, =__romswitch_ram_addr | |
28 | |
29 .section bootrom.switch,"ax",%progbits | |
30 .code 32 | |
31 .org 0 | |
32 @ enable the Calypso boot ROM | |
33 ldr r1, =0xFFFFFB10 | |
34 mov r2, #0x0100 | |
35 strh r2, [r1] | |
36 @ jump to it! | |
37 mov pc, #0 | |
38 #endif | |
39 | |
40 .section flashboot.text,"ax",%progbits | |
41 .code 32 | |
42 .org 0 | |
43 #if FLASH_BOOT_VIA_BOOTROM | |
44 /* sane targets with Calypso boot ROM enabled by the PCB wiring */ | |
45 /* provide the necessary magic words for the boot ROM */ | |
46 .word 0 | |
47 .word _Flash_boot_entry | |
48 #elif CONFIG_TARGET_C139 || CONFIG_TARGET_C11X | |
49 /* | |
50 * On this target we'll put a patched version of Compal's boot code in | |
51 * flash sector 0 (the brickable one); the main fw images will then be | |
52 * flashed starting at 0x10000, which is where our modified boot code | |
53 * expects them to be. The interface between our hacked boot code and | |
54 * the main fw has been made to mimic TI's TCS211 reference fw. | |
55 */ | |
56 #include "vectors.S" | |
57 .org 0x58 /* put _Flash_boot_entry at 0x10058 */ | |
58 #elif CONFIG_TARGET_C155 | |
59 /* | |
60 * On this target the hand-off point between the bootloader and the main | |
61 * fw image coincides with a flash erase block boundary, thus we can reuse | |
62 * the original bootloader without having to reflash the brickable sector | |
63 * at all. The following bits will appear at 0x20000. | |
64 */ | |
65 .asciz "FreeCalypso firmware for C155/156 target" | |
66 .org 0xE0 | |
67 /* C155/156 bootloader jumps here */ | |
68 b _Flash_boot_entry | |
69 #include "vectors.S" | |
70 #else | |
71 #error "Unsupported flash boot configuration" | |
72 #endif | |
73 | |
74 .globl _Flash_boot_entry | |
75 _Flash_boot_entry: | |
76 /* first order of business: configure flash and XRAM access */ | |
77 ldr r2, =0xFFFFFB00 | |
78 #if CONFIG_TARGET_PIRELLI | |
79 mov r0, #0x00A4 | |
80 strh r0, [r2, #0] | |
81 strh r0, [r2, #2] | |
82 strh r0, [r2, #6] | |
83 #elif CONFIG_TARGET_FCFAM | |
84 mov r0, #0x00A4 | |
85 strh r0, [r2, #0] | |
86 strh r0, [r2, #2] | |
87 strh r0, [r2, #4] | |
88 #else | |
89 mov r0, #0x00A3 | |
90 strh r0, [r2, #0] | |
91 strh r0, [r2, #2] | |
92 #endif | |
93 /* | |
94 * On targets with 8 MiB flash (or XRAM) banks we need to switch the | |
95 * CS4/ADD22 pin to the ADD22 function. We could do it for all targets | |
96 * (not aware of any that need the pin to be CS4), but we strongly | |
97 * prefer to have a consistent execution environment between flashImage | |
98 * and ramImage, so let's only do this setting on those targets | |
99 * on which we do it in ../../loadtools/scripts/*.init (for fc-xram). | |
100 */ | |
101 #if CONFIG_TARGET_PIRELLI || CONFIG_TARGET_C155 || CONFIG_TARGET_FCFAM | |
102 ldr r1, =0xFFFEF006 | |
103 mov r2, #0x0008 | |
104 strh r2, [r1] | |
105 #endif | |
106 /* we now have full access to all flash and RAM on the device */ | |
107 /* copy iram.text to where it's supposed to be */ | |
108 ldr r8, =__iramtext_flash_addr | |
109 ldr r9, =__iramtext_ram_addr | |
110 ldr r10, =__iramtext_size | |
111 1: ldmia r8!, {r0-r7} | |
112 stmia r9!, {r0-r7} | |
113 subs r10, r10, #0x20 | |
114 bhi 1b | |
115 /* likewise copy .data from flash to XRAM */ | |
116 ldr r8, =__initdata_flash_addr | |
117 ldr r9, =__initdata_ram_addr | |
118 ldr r10, =__initdata_size | |
119 1: ldmia r8!, {r0-r7} | |
120 stmia r9!, {r0-r7} | |
121 subs r10, r10, #0x20 | |
122 bhi 1b | |
123 /* boot path joins with fc-xram loadable builds */ | |
124 b _FlashorXram_entry |