FreeCalypso > hg > freecalypso-docs
annotate Calypso-digital-voice @ 10:17003ecbb9fc
Calypso-digital-voice article written,
documenting MCSI success
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 28 Mar 2019 08:04:00 +0000 |
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children | 9baf6215285b |
rev | line source |
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10
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
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1 Digital voice on FreeCalypso modems via MCSI |
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2 ============================================ |
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3 |
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4 The Calypso chip provides a little-used auxiliary synchronous serial interface |
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5 called MCSI. It is an auxiliary interface to the DSP part of the Calypso |
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6 (controlled solely by the DSP and not directly accessible to the ARM part); it |
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7 is not clear what other uses TI may have had in mind for this interface, but |
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8 one advertised feature of TI's TCS211 chipset+firmware solution is Bluetooth |
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9 support in the form of using MCSI as a digital voice channel to be connected to |
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10 TI's Bluetooth Island chip. In FreeCalypso we are not interested in Bluetooth |
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11 per se, but we are interested in getting a digital voice channel out of our |
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12 modem for GSM voice calls in order to compete with the mainstream proprietary |
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13 GSM modem modules which do provide such digital voice channels. |
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14 |
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15 Our current development board (FCDEV3B) has MCSI brought out on a header for |
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16 experimentation, and as of 2019-03 we finally got this MCSI working as a proper |
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17 digital voice interface. |
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18 |
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19 Hardware interface |
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20 ================== |
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21 |
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22 MCSI consists of 4 hardware signals: |
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23 |
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24 * MCSI_CLK is the bit clock output from the Calypso; in pure hardware terms |
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25 this signal is bidirectional, but unless you are going to develop your own |
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26 DSP code patches, its direction is determined by the DSP ROM code, which |
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27 configures MCSI_CLK as an output, i.e., the Calypso acts as the clock master. |
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28 |
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29 * MCSI_FSYNCH is the frame sync output from the Calypso; it is the same deal as |
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30 with MCSI_CLK: bidirectional in pure hardware terms, but if you are not |
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31 changing the DSP code with your own custom patches, it is an output from the |
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32 Calypso. |
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33 |
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34 * MCSI_RXD is the voice uplink bits input to the Calypso: the user's application |
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Mychaela Falconia <falcon@freecalypso.org>
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35 processor needs to feed voice uplink bits to this pin as timed by MCSI_CLK |
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36 and MCSI_FSYNCH. |
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37 |
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38 * MCSI_TXD is the voice downlink output from the Calypso: as the vocoder in the |
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39 Calypso DSP decodes received downlink speech from GSM codecs into linear PCM, |
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40 this PCM voice downlink is put out on this MCSI_TXD pin, in synchrony with |
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41 MCSI_CLK and MCSI_FSYNCH. |
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42 |
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43 The format in which digital voice samples are exchanged via MCSI between the |
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44 Calypso and the user's application processor is 16-bit linear PCM, 8000 samples |
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45 per second, thus requiring 128 kbps of bandwidth. The synchronous serial |
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46 interface details are as follows: |
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47 |
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48 * When MCSI is enabled, the Calypso puts out a 520 kHz clock on MCSI_CLK, |
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49 produced by dividing the 13 MHz master clock by 25. This clock as put out by |
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50 the Calypso has a perfect 50% duty cycle. |
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51 |
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52 * Given that a new pair of samples (uplink and downlink) needs to be transferred |
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53 once every 125 us (1/8000th of a second, for 8000 samples per second), this |
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54 520 kHz bit clock is further divided by 65 to produce an 8 kHz clock on |
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55 MCSI_FSYNCH, i.e., every 65 bits there is a frame synchronization pulse on |
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56 MCSI_FSYNCH. The width of this frame sync pulse is one full bit time, the |
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57 pulse is active high, and the MCSI_FSYNCH line stays low the rest of the time. |
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58 |
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59 * Calypso outputs MCSI_FSYNCH and MCSI_TXD are updated on the rising edge of |
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60 MCSI_CLK and should be sampled on the falling edge of the same clock by the |
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61 user's application processor. The MCSI_RXD input is sampled on the falling |
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62 edge of MCSI_CLK by the Calypso, and should be updated on the rising edge of |
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63 the same clock by the user's application processor. |
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64 |
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65 * Each voice sample (both uplink and downlink) is transferred from the most |
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66 significant bit to the least significant bit (MSB first), starting with the |
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67 clock cycle immediately following the frame sync cycle, i.e., the cycle in |
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68 which MCSI_FSYNCH is asserted by the Calypso. |
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69 |
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70 * Given that each frame is 65 bits long (520 kHz bit clock divided by 8 kHz |
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71 frame rate) and that 16 bit slots out of every frame are used to transfer |
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72 voice sample bits, plus one bit slot for frame sync, it follows that 48 bit |
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73 slots out of every frame are dummies. The Calypso puts out 0 bits on MCSI_TXD |
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74 in all bit slots that don't carry voice sample bits. |
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75 |
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76 A graphical depiction of what I just described verbally can be found on page |
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77 3074 of this TI OMAP document: |
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78 |
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79 ftp://ftp.freecalypso.org/pub/ARM/OMAP/sprugn4r.pdf |
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80 |
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81 Calypso MCSI corresponds to what this OMAP document calls "Mode 1", i.e., |
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82 Figure 21-14 at the top of the page, NOT the other one below it. |
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83 |
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84 Enabling and disabling MCSI for digital voice |
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85 ============================================= |
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86 |
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87 TI's DSP ROM code supports two modes of operation in which MCSI is activated, |
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88 called "Bluetooth cordless" and "Bluetooth headset". In the "BT cordless" mode |
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89 the voice path is connected between the chipset's native analog voice hw and |
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90 MCSI, with GSM out of the picture; in the "BT headset" mode the voice path is |
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91 connected between the GSM vocoder and MCSI, with the local analog voice hw out |
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92 of the picture. The latter "BT headset" mode is the only one which we currently |
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93 support in FreeCalypso; the "BT cordless" mode does not work properly as of this |
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94 writing - the step of enabling the Voice Band Codec block in the Iota ABB for |
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95 this mode is currently missing. Proper support for the "BT cordless" mode can |
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96 be added if a real need for it ever arises, but it would take some work, and |
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97 right now there is no business case for it. |
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98 |
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99 In TI's TCS211 firmware architecture (see TCS211-fw-arch document) entry into |
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100 and exit from these "Bluetooth" MCSI voice routing modes is handled via the |
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101 RiViera Audio Service fw component, specifically its Audio Mode facility, |
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102 usually via the audio_full_access_write() API call. When asked to switch voice |
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103 routing modes, this RV Audio Service component sends an MMI_AUDIO_MODE_REQ |
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104 message to L1, the L1A component passes the request to L1S, and L1S finally |
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105 twiddles the magic control bits in the DSP API RAM. |
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106 |
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107 In FreeCalypso we currently provide two ways for the end user to enter the |
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108 "BT headset" mode for digital access to GSM voice: |
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109 |
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110 * The original way is the AT@VPATH=n command, which provides "raw" access to |
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111 the RV Audio Service's voice routing mode switch call. Setting AT@VPATH=2 |
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112 enters the "BT headset" mode, AT@VPATH=0 returns to the normal "GSM only" |
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113 mode (MCSI disabled), and AT@VPATH=1 enters the currently not-working |
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114 "BT cordless" mode. |
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115 |
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116 * The new way is the session-long AT@VSEL=n boolean setting. In the default |
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117 AT@VSEL=0 mode the firmware functions like before (MCSI disabled, voice calls |
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118 go to the analog voice hw), but if your application needs the digital voice |
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119 interface instead of analog, you can set AT@VSEL=1 once at the beginning of |
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120 your modem session. In this AT@VSEL=1 mode, whenever a GSM voice call is |
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121 connected (dialed or answered), the MCSI clocks are switched on (MCSI_CLK and |
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122 MCSI_FSYNCH outputs come to life) and the "BT headset" voice routing mode is |
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123 entered at the appropriate point in the call establishment process; when the |
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124 call disconnects (either side hangs up), MCSI is turned off. The new logic |
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125 internally performs the equivalent of AT@VPATH=2 and AT@VPATH=0 at appropriate |
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126 times. |
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127 |
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128 Why does one need our new AT@VSEL=1 logic for dynamic switching into and out of |
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129 MCSI "BT headset" mode, why not simply set AT@VPATH=2 upfront and run with it? |
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130 Two reasons: |
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131 |
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132 1) If MCSI is enabled continuously and not just when needed during voice calls, |
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133 the DSP never goes quiescent during idle periods, and the Calypso is not |
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134 allowed to enter deep sleep. Both of these factors are detrimental to proper |
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135 power management - the whole idea is that when a GSM modem is idle (not in a |
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136 call, but listening to paging and ready to accept incoming calls), most of |
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137 the hw needs to be powered down as much as possible, to reduce power |
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138 consumption to a minimum and prolong standby battery life. |
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139 |
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140 2) There is a bug in the DSP code (present in the ROM and not corrected by the |
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141 patches we are using) that manifests if MCSI is already running when the very |
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142 first voice call after system boot is connected. Our AT@VSEL=1 mechanism |
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143 reliably avoids this DSP bug (ensured by the timing sequence of when we turn |
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144 on the vocoder and when we turn on MCSI), and it is my (Mother Mychaela's) |
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145 guess that TI probably missed this DSP bug because their own Bluetooth |
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146 handling code most likely worked very similarly to my AT@VSEL=1 |
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147 implementation. |
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148 |
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149 Thus the short story is that if you are using the digital voice interface via |
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150 MCSI, just set AT@VSEL=1 at the beginning of your modem session, and whatever |
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151 hardware you connect to MCSI needs to be OK with the clocks (MCSI_CLK and |
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152 MCSI_FSYNCH) appearing only during active voice calls, and being off at other |
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153 times. |
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154 |
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155 It should also be noted that the new AT@VSEL=1 mechanism is implemented properly |
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156 only in our new hybrid firmwares, i.e., Magnetite hybrid and Selenite. The |
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157 legacy configs (l1reconst etc) using the blob version of G23M PS and ACI from |
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158 Openmoko (maintained only for regression testing and debugging purposes) also |
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159 implement the AT@VSEL command, but the AT@VSEL=1 mode will work somewhat |
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160 erratically in that version: the modem may enable MCSI at the wrong time, and |
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161 it will sometimes fail to turn it off at the end of a call. The implementation |
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162 of this functionality resides entirely in the "high-level audio driver" module |
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163 in ACI, this module is different between TCS2 and TCS3 versions of ACI, and |
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164 there is no justification for expending the effort to make the new feature work |
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165 in the old version of ACI: it is an entirely new feature added in FreeCalypso, |
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166 not present in any old Calypso modems, hybrid fw is the way forward in FC, thus |
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167 we only need to support new features in our hybrid firmwares. |
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168 |
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169 The alternative approach of tapping VSP |
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170 ======================================= |
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171 |
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172 MCSI is not the only digital voice interface in the Calypso chipset: there is |
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173 also another interface called VSP (Voice Serial Port), which is a private |
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174 interface between Calypso and Iota chips. Because it was always intended to be |
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175 a private interface internal to the core chipset, not an external application |
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176 interface like MCSI, none of the standard Calypso-based phone or modem board |
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177 designs expose it in any accessible way - instead it goes from one BGA to the |
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178 other on inner PCB layers with zero accessibility for probing. Our FCDEV3B is |
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179 no exception in this regard, as our modem core is based on a commercial modem |
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180 design from a decade before our time. |
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181 |
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182 Because it took us a very long time to get MCSI working as a practically usable |
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183 digital voice interface (the new AT@VSEL=1 mechanism is the key, without this |
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184 firmware piece NCSI is not practically usable), much thought has been given |
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185 earlier to the alternative idea of tapping into VSP. There are two |
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186 possibilities with that one: |
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187 |
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188 1) Given that Calypso VSP is a clock slave (it expects the ABB chip to provide |
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189 the clock and frame sync signals), those who desire their digital voice i/f |
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190 to be a PCM slave (not a PCM master like TI's "BT headset" function over |
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191 MCSI) will likely be very tempted to disconnect Calypso VSP from the Iota |
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192 chip entirely and to connect it to their own application instead. However, |
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193 in the absence of source code for the DSP ROM this approach would be |
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194 incredibly risky (if the DSP is not too happy with the non-Calypso-sourced |
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195 timing you feed to the VSP, how are you going to debug it deep within the |
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196 DSP black box?), and I (Mother Mychaela) consider it so risky that if anyone |
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197 wants to do it, you will be entirely on your own - don't expect any help |
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198 from me. |
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199 |
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200 2) A much safer approach would be to keep the VSP clock and frame sync |
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201 connections between Calypso and Iota chips, but also make them available |
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202 externally, i.e., have your application logic sync itself to these clocks. |
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203 Voice downlink could then be received just by passively tapping VSP lines, |
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204 and sending your own voice uplink via VSP would require cutting only the one |
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205 line that carries voice uplink bits from Iota to Calypso. It would then |
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206 effectively be just like MCSI (a PCM master to the user's application), but |
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207 without requiring any support in the firmware, instead being completely |
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208 invisible to the Calypso firmware and to the DSP. |
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209 |
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210 However, because we don't have any board on which VSP signals are accessible to |
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211 probing, there are several unknowns with this interface: |
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212 |
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213 * Is the VSP clock produced by the Iota chip 500 kHz (13 MHz master clock |
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214 divided by 26) or 520 kHz (same master clock divided by 25)? The available |
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215 Iota datasheet says 500 kHz, but if that is correct, how is the frame sync |
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216 handled? 500 kHz does not divide evenly by 8 kHz. Does Iota's clock + frame |
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217 sync output alternate between 62-bit and 63-bit frames, producing an 8 kHz |
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218 frame rate on average? Sounds messy and convoluted... |
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219 |
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220 * It is not clear at all exactly when Iota's VSP clocks are started and stopped, |
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221 and whether the bit clock runs continuously during an active call (like |
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222 MCSI_CLK does), or if it is gated on only for those bit slots that carry |
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223 actual voice sample bits. |
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224 |
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225 If we are going to produce a new FreeCalypso modem based on our current FCDEV3B, |
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226 but repackaged into some end use form factor, as things stand today (2019-03), |
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227 we are going to use MCSI rather than VSP for the digital voice interface. While |
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228 MCSI has definitely been a huge hassle and requires the user to issue one extra |
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229 setup command (AT@VSEL=1) at the beginning of each modem session, at least it |
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230 is now a known beast, and a known-working one. Committing to VSP in a |
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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231 commercial product design without ever having seen these VSP signals on an |
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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232 oscilloscope would be very irresponsible; if someone really wishes to go with |
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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233 VSP instead of MCSI, the responsible approach would be to first design and build |
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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234 another development board with VSP signals brought out for experimentation, and |
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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235 only then possibly use it in a commercial product design after it becomes a |
17003ecbb9fc
Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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236 known beast. |
17003ecbb9fc
Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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237 |
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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238 From the standpoint of pure curiosity, I would be very interested in a |
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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239 development board with VSP access, just to answer the above questions and fill |
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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240 that gap in my Calypso knowledge. But switching to a more practical hat, |
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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241 spending some 10 to 15 kUSD just to satisfy that curiosity would be very |
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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242 difficult to justify - thus there is a very strong chance that VSP will never |
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Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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243 be explored, Which is not really a problem at all, as for a practically usable |
17003ecbb9fc
Calypso-digital-voice article written,
Mychaela Falconia <falcon@freecalypso.org>
parents:
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244 external digital voice channel we now have working MCSI. |