FreeCalypso > hg > freecalypso-docs
annotate FCDEV3B-repackaging @ 16:396d44c543e3
Calypso-test-reset: typo fix
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Fri, 31 May 2019 19:07:21 +0000 |
parents | f57f29dcc6d6 |
children |
rev | line source |
---|---|
2
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1 Repackaging FreeCalypso modem into different physical form factors |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2 ================================================================== |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3 |
11
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
4 [This document was originally written in 2018-10; subsequent updates |
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
5 are noted inline in the same bracketed form as this note.] |
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
6 |
2
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
7 As of this writing, our FreeCalypso Triband Modem Solution has reached the |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
8 status of a finished product: it is no longer experimental or developmental, |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
9 it is now fully fit for operational use on live public GSM networks in end user |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
10 applications that need a standards-compliant GSM+GPRS modem. However, at the |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
11 present moment it is only available in the physical form factor of a development |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
12 board (FCDEV3B) that was originally designed to serve as a software/firmware |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
13 development platform, and as such it is not ideally suited for use as an end |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
14 product. For end use applications it would be highly desirable to take our |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
15 proven FC Triband Modem Solution (FC-TMS) as realized on the FCDEV3B and |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
16 repackage it into other physical form factors. This repackaging can be done |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
17 in two ways: |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
18 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
19 Approach 1 (strongly preferred): the party who desires to have our FC-TMS in a |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
20 particular form factor gets in touch with FreeCalypso Central, engages in a |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
21 discussion with us to arrive at the new form factor to be implemented (it needs |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
22 to satisfy your requirements and be feasible for us to implement), then funds |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
23 the cost of PCB layout labor to turn the new form factor modem into reality. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
24 More specifically, we would do the design at the schematics+BOM level while the |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
25 the PCB layout step would have to be outsourced at cost. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
26 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
27 Approach 2 (NOT preferred, but can sometimes be agreed to in limited cases): |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
28 someone else does the repackaging work under their own control. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
29 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
30 In the case of Approach 1 the new modem product will always be guaranteed to |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
31 work flawlessly and be fully compatible with our FreeCalypso sw and fw |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
32 architecture because in this case the hardware design is personally supervised |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
33 by the Mother of FreeCalypso and must receive her approval prior to being |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
34 released to layout and then to fabrication. In the case of Approach 2 this |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
35 assurance is lacking. This document provides some technical guidelines that |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
36 MUST be followed in order for a new modem hw product to stand a chance at being |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
37 compatible with FreeCalypso; anyone who follows Approach 2 against our |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
38 recommendation but still wishes to have a chance at receiving support from us |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
39 MUST follow these design guidelines. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
40 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
41 LEGAL NOTICE: Following these technical guidelines does NOT by itself grant you |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
42 a license to use our FreeCalypso trademark on your hardware products; this |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
43 trademark is personally owned by Mychaela N. Falconia and only she has the |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
44 authority to license its use at her sole discretion. Similarly our agreement |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
45 with GSMA does NOT allow us to sublet any part of our IMEI number range to any |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
46 other parties; any IMEI number ranges that may be allocated by GSMA to |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
47 FreeCalypso products may ONLY be used for those products that are physically |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
48 produced by Falconia Partners LLC from start to finish and not any others. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
49 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
50 Basic technical guidelines |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
51 ========================== |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
52 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
53 The purpose of these guidelines is to make it possible for the same firmware |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
54 build configuration to support both our existing FCDEV3B and various |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
55 repackagings of the underlying core modem solution (FC-TMS), i.e., to have the |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
56 same official FC Magnetite firmware builds for target fcdev3b run not only on |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
57 the original development board, but on all physical repackagings of the same |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
58 core modem solution. To make such firmware reuse possible, the following |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
59 hardware design constraints MUST be followed: |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
60 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
61 * The flash+RAM chip must be the same Spansion S71PL129NC0HFW4B as used on our |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
62 FCDEV3B, and it must be wired the same way: first flash chip select on Calypso |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
63 nCS0, RAM on nCS1, second flash chip select on nCS2. The flash reset line |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
64 needs to be wired the same way as on FCDEV3B V2, otherwise Calypso sleep modes |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
65 will be broken. We realize that this flash and RAM capacity (16 MiB and |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
66 8 MiB, respectively) is extreme overkill for typical modem applications |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
67 outside of development, but supporting multiple flash chip types would |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
68 introduce a configuration management burden which we are not willing to |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
69 take on. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
70 |
11
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
71 [2019-03 update: we now have working flash chip type autodetection, and |
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
72 commercial modem products can use a smaller flash+RAM chip, specifically |
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
73 Samsung K5A3240CTM or K5A3281CTM as used by Openmoko.] |
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
74 |
2
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
75 * Calypso's unused DSR_MODEM/LPG pin was left unconnected in Openmoko's version |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
76 but on our FCDEV3B it is tied to GND on the board. Other boards seeking to |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
77 be FreeCalypso-compatible need to have this pin tied to GND as well because |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
78 our firmware leaves this pin in its default power-up config of DSR_MODEM input |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
79 and does not change it to LPG output - leaving it unconnected would cause it |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
80 to float. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
81 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
82 * Our firmware configures Calypso GPIO 3 as an input; GPIOs 0-2 and those |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
83 multifunction pins which are unused and configured as GPIOs (TSPDI/IO4, |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
84 BCLKX/IO6, MCUEN1/IO8 and MCUEN2/IO13) are configured as outputs. Board |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
85 wiring must be compatible with these directions: those pins which our fw |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
86 drives as outputs can be simply left unconnected, while GPIO 3 needs to be |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
87 sensibly driven or tied off as explained below. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
88 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
89 * If someone needs a modem that produces an Openmoko-style application processor |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
90 wakeup signal (asserted by the fw when the modem needs to send something to |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
91 the host but is blocked by CTS being held high), this signal should be |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
92 connected to GPIO 0. Openmoko used GPIO 1 for this purpose, but in |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
93 FreeCalypso GPIO 1 is taken because we use it for the loudspeaker control |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
94 signal like on TI's D-Sample and Leonardo boards, hence we are moving the AP |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
95 wakeup signal to GPIO 0, to be implemented if and when anyone builds a modem |
3
4f873ec004f6
FCDEV3B-repackaging: minor grammar fixes
Mychaela Falconia <falcon@freecalypso.org>
parents:
2
diff
changeset
|
96 based on FC-TMS that needs to provide such a signal. |
2
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
97 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
98 * If your product includes a loudspeaker amplifier like on our FCDEV3B, connect |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
99 its on/off control input to GPIO 1, otherwise leave our GPIO 1 output |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
100 unconnected. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
101 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
102 * Our fw produces a DCD modem control output on GPIO 2; if you are connecting |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
103 the MODEM UART channel to an RS-232 port or to a USB-serial chip with a full |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
104 set of modem control signals, connect DCD to GPIO 2. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
105 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
106 * Our fw treats GPIO 3 as a DTR modem control input following TI's C-Sample and |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
107 D-Sample boards. If your product has a real DTR signal coming from an RS-232 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
108 interface or from a USB-serial chip, connect it to GPIO 3, otherwise GPIO 3 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
109 needs to be pulled down to GND like on Leonardo and FCDEV3B. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
110 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
111 * If you are connecting the MODEM UART channel to a full RS-232 port or to a |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
112 USB-serial chip with a full set of modem control signals, you should connect |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
113 DSR and RI to TSPDI/IO4 and MCUEN1/IO8, respectively. Right now our fw |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
114 drives IO4 low and IO8 high, corresponding to DSR asserted and RI negated |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
115 (normal quiescent state), and connecting the signals in this way allows the |
3
4f873ec004f6
FCDEV3B-repackaging: minor grammar fixes
Mychaela Falconia <falcon@freecalypso.org>
parents:
2
diff
changeset
|
116 possibility of extending the fw to drive them in some more intelligent manner |
4f873ec004f6
FCDEV3B-repackaging: minor grammar fixes
Mychaela Falconia <falcon@freecalypso.org>
parents:
2
diff
changeset
|
117 if need be. |
2
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
118 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
119 * Both Calypso UARTs need to be wired in an accessible way so that our standard |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
120 FC Magnetite firmware can be used with the AT command interface on the MODEM |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
121 UART and RVTMUX on the IrDA UART. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
122 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
123 * Our fw configures the MODEM UART with hardware flow control enabled; if your |
5
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
124 application lacks RTS/CTS signals, then Calypso's CTS_MODEM signal needs to |
2
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
125 be pulled down to GND so it is seen as asserted. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
126 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
127 * Our fw configures the 4 MCSI/GPIO pins as MCSI rather than GPIO. If your |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
128 board does not use MCSI because you are tapping VSP instead or not using any |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
129 digital voice interface at all, then you should put pull-down resistors on |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
130 MCSI_RXD, MCSI_CLK and MCSI_FSYNCH, otherwise these signals will float. |
5
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
131 MCSI_RXD can be directly tied to GND without a resistor as it is always an |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
132 input to the Calypso, but MCSI_CLK and MCSI_FSYNCH need to be pulled down |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
133 with resistors: our fw can enable TI's "Bluetooth headset" and "Bluetooth |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
134 cordless" modes, in which case these signals become outputs. If the signals |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
135 are switched to being outputs by software command but are tied to GND on the |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
136 board, the result will be a shorted output driver which could damage the chip, |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
137 and it is clearly not acceptable to produce hardware that can be damaged by |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
138 an AT command, even an obscure and non-standard one. |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
139 |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
140 Cost increment |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
141 ============== |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
142 |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
143 If you don't need huge flash and XRAM capacity, don't have a DTR input and are |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
144 not using MCSI, then the incremental cost of being firmware-compatible with |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
145 FCDEV3B compared to Openmoko's approach of leaving all unused signals |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
146 unconnected and using a smaller flash+RAM chip consists of: |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
147 |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
148 * A logic voltage level translating buffer to provide a reset to the flash chip |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
149 that meets its timing requirements; |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
150 |
11
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
151 [2019-03 update: the above is no longer required, you can now use one of the |
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
152 smaller flash chips which are compatible with TI's silly FDP scheme and thus |
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
153 don't need the extra translating buffer IC for reset.] |
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
154 |
5
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
155 * 3 pull-down resistors on GPIO3, MCSI_CLK and MCSI_FSYNCH; |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
156 |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
157 * Direct connections to GND on DSR_MODEM and MCSI_RXD pins. |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
158 |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
159 For parties other than the Mother, it is up to you to decide if being firmware- |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
160 compatible is worth the cost increment or not, but all modem repackagings |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
161 produced by us under the FreeCalypso brand will follow these software and |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
162 firmware configuration management compatibility guidelines, and the same is |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
163 required for anyone else who wishes for their hardware variant to be accepted |
f920c9a68d45
FCDEV3B-repackaging: clarified the cost increment
Mychaela Falconia <falcon@freecalypso.org>
parents:
4
diff
changeset
|
164 into the FreeCalypso family. |
2
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
165 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
166 Tapping VSP for the digital voice interface |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
167 =========================================== |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
168 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
169 The Calypso+Iota chipset includes an interface called VSP for Voice Serial Port; |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
170 per TI's design intent it is a strictly private interface between Calypso and |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
171 Iota chips, but it is possible to tap into this interface to get an external |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
172 digital voice channel. TI's official method for getting a digital voice channel |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
173 out of a Calypso modem is to use MCSI in their so-called "Bluetooth headset" |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
174 mode, however, our experiments on the FCDEV3B have revealed that this interface |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
175 does not work the way one would naively expect. Unless we can convince TI to |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
176 dig up and release the sources for the Calypso DSP ROM, which we obviously |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
177 cannot count on, we won't be able to use MCSI reliably until and unless we |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
178 undertake to fully reverse their DSP ROM code from disassembly, which would be |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
179 an extremely major and very costly undertaking. Because of this unfortunate |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
180 situation, the alternative way of tapping into VSP needs to be given |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
181 consideration. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
182 |
11
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
183 [2019-03 update: we got MCSI working now, please read the Calypso-digital-voice |
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
184 article for more info about both MCSI and VSP options.] |
f57f29dcc6d6
FCDEV3B-repackaging: updates for working MCSI and flash autodetect
Mychaela Falconia <falcon@freecalypso.org>
parents:
6
diff
changeset
|
185 |
2
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
186 Tapping into VSP is absolutely not possible on our current FCDEV3B, as the |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
187 signals in question are currently routed directly from one BGA to another and |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
188 do not come up to the surface at any accessible point. The same situation holds |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
189 on every other existing Calypso phone and modem known to us - after all, VSP was |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
190 meant to be a private chip-to-chip interface. Instead we are presenting the |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
191 idea of tapping VSP as a possibility for anyone who undertakes to repackage our |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
192 FC-TMS into some new form factor and desires a digital voice channel while at |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
193 it. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
194 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
195 In TI's standard solution VSP clock and frame sync signals are generated by the |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
196 Iota ABB and are inputs to the Calypso DBB. Because they are inputs to the |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
197 Calypso, it may be tempting to disconnect them from the ABB and have them |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
198 originate from an external source instead - however, TI's DSP code in the ROM |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
199 was most certainly written with the assumption that these signals will only |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
200 ever be driven by their ABB and never by anyone else, hence having them come |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
201 from a source whose timing does not come from the Calypso can cause all kinds |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
202 of strangeness which we will never be able to debug properly because the DSP is |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
203 a mysterious black box. Therefore, my (Mother Mychaela's) stance is that if |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
204 you break the VSP connection between Calypso and Iota, then you are entirely on |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
205 your own - don't expect any help from me. Instead my idea is to tap into VSP |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
206 without breaking it, specifically: |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
207 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
208 * Keep the clock and frame sync connection between Calypso and Iota, with Iota |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
209 remaining the driver on these nets - but also bring these signals out |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
210 externally, so external logic can sync itself to this interface as well. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
211 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
212 * Do likewise for the line that carries downlink voice from the DBB to the ABB: |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
213 let the ABB receive it and use it to drive the analogue earpiece output (which |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
214 would be unconnected in a digital voice application), but let external logic |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
215 receive it too. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
216 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
217 * Break only the line that carries uplink voice from the ABB to the DBB: bring |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
218 the Iota output side on one external interface pin and the Calypso input side |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
219 on another external interface pin. Putting a jumper on these adjacent header |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
220 pins would restore TI's original configuration and allow uplink voice to come |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
221 from an analogue microphone connected to the ABB, and if a digital uplink |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
222 voice source is desired, remove the jumper and have an external source provide |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
223 the bits which would otherwise come from Iota's voice ADC. |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
224 |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
225 The above approach would provide a usable digital voice interface that would be |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
226 completely transparent (invisible) to the Calypso DSP and even to the ARM-side |
020df28341d0
FCDEV3B-repackaging article written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
227 firmware, hence it should work without any nasty surprises. |
4
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
228 |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
229 Triband vs. quadband |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
230 ==================== |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
231 |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
232 One shortcoming of our current FreeCalypso modem solution is that it is triband |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
233 and not quadband; more specifically our standard hw build omits the GSM850 band, |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
234 or we can build a different configuration that supports GSM850 but omits EGSM |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
235 (the 900 MHz band). To the best of our knowledge the GSM850 band is used very |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
236 little these days, but being only triband makes us look bad compared to the |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
237 competition: all of the mainstream proprietary GSM modem modules are fully |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
238 quadband these days. |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
239 |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
240 It *is* possible to make a Calypso-based quadband modem, as TI had one: their |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
241 Leonardo reference board for the Calypso+Iota+Rita chipset existed in several |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
242 versions some of which were quadband, and their E-Sample board (Calypso+) which |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
243 used the same Rita RF block was also quadband. However, changing our current |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
244 FC modem design from triband to quadband would involve a highly invasive PCB |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
245 layout change: basically our entire modem PCB layout and particularly the GHz RF |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
246 section would have to be ripped up and reshuffled into a different arrangement. |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
247 Furthermore, if we as the FreeCalypso community do decide that we wish to |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
248 produce a quadband modem, I (Mother Mychaela) would NOT be comfortable with |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
249 entrusting the needed re-layout work to an "ordinary" PCB layout contractor who |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
250 is not a cellphone RF design expert, instead we would need to get a consultation |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
251 from an RF PCB design expert who has experience very specifically with GSM |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
252 cellphone design and not any other applications. Finding such an expert would |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
253 be a major task in itself, and that expert most certainly won't come cheap. |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
254 Therefore, a quadband FreeCalypso modem probably won't happen unless we get |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
255 someone with a lot of money to throw around. |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
256 |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
257 There is one exception, though: if anyone would like to see our FreeCalypso |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
258 modem repackaged into the SMT module form factor copied from BenQ M32 and pays |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
259 for that venture, the result would be naturally quadband as the layout of BenQ's |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
260 module follows the same floorplan in the RF section as TI's quadband Leonardo |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
261 and E-Sample layout. However, that approach would involve a step to reverse- |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
262 engineer BenQ's layout by slicing their board and imaging its inner layers, |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
263 hence anyone seeking this approach would need to be prepared to pay for that |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
264 step. |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
265 |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
266 If anyone ever does pay for the creation of a quadband version of our |
1dbc8c5d9698
FCDEV3B-repackaging: triband vs. quadband section added
Mychaela Falconia <falcon@freecalypso.org>
parents:
3
diff
changeset
|
267 FreeCalypso modem solution, be it in BenQ's physical form factor or some other, |
6
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
268 what about the firmware? For a long time I thought that a quadband modem would |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
269 need a different firmware build configuration because of incompatible TSPACT |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
270 signals. Our current triband modem (copied from Openmoko) has them wired like |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
271 this: |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
272 |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
273 TSPACT2 = Tx high bands |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
274 TSPACT1 = Rx PCS band |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
275 TSPACT4 = Tx low bands |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
276 |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
277 But TI's original TSPACT wiring for the quadband RFFE on their Leonardo and |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
278 E-Sample boards was different: |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
279 |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
280 TSPACT2 = Tx low bands |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
281 TSPACT1 = Tx high bands |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
282 TSPACT4 = Rx GSM850 band |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
283 |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
284 These two TSPACT signal assignments are mutually incompatible, hence if we make |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
285 a quadband modem following TI's original Leonardo/E-Sample TSPACT wiring, it |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
286 won't be able to share the same fw with our triband modems. But then I got an |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
287 idea: what if we wire them up in our own creative way as follows: |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
288 |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
289 TSPACT2 = Tx high bands |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
290 TSPACT4 = Tx low bands |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
291 TSPACT5 = Rx GSM850 band |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
292 |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
293 Then we can have the same fw build configuration support both triband and |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
294 quadband FreeCalypso modems by driving the signals as follows: |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
295 |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
296 TSPACT1 = Rx PCS band |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
297 TSPACT2 = Tx high bands |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
298 TSPACT4 = Tx low bands |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
299 TSPACT5 = Rx GSM850 band |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
300 |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
301 TSPACT1 will be driven but unused on quadband modems, whereas TSPACT5 will be |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
302 driven but unused on triband ones like our current FCDEV3B. To me (Mother |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
303 Mychaela) being able to have the same fw among *all* FreeCalypso modem variants, |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
304 both triband and quadband, is more valuable than the symbolic act of recreating |
700d6cff63bb
FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents:
5
diff
changeset
|
305 TI's original RFFE wiring, hence I am now leaning toward this new approach. |