annotate FCDEV3B-repackaging @ 16:396d44c543e3

Calypso-test-reset: typo fix
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 31 May 2019 19:07:21 +0000
parents f57f29dcc6d6
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 Repackaging FreeCalypso modem into different physical form factors
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2 ==================================================================
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3
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4 [This document was originally written in 2018-10; subsequent updates
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5 are noted inline in the same bracketed form as this note.]
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6
2
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7 As of this writing, our FreeCalypso Triband Modem Solution has reached the
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8 status of a finished product: it is no longer experimental or developmental,
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9 it is now fully fit for operational use on live public GSM networks in end user
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10 applications that need a standards-compliant GSM+GPRS modem. However, at the
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11 present moment it is only available in the physical form factor of a development
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12 board (FCDEV3B) that was originally designed to serve as a software/firmware
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13 development platform, and as such it is not ideally suited for use as an end
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14 product. For end use applications it would be highly desirable to take our
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15 proven FC Triband Modem Solution (FC-TMS) as realized on the FCDEV3B and
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16 repackage it into other physical form factors. This repackaging can be done
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17 in two ways:
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18
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19 Approach 1 (strongly preferred): the party who desires to have our FC-TMS in a
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20 particular form factor gets in touch with FreeCalypso Central, engages in a
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21 discussion with us to arrive at the new form factor to be implemented (it needs
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22 to satisfy your requirements and be feasible for us to implement), then funds
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23 the cost of PCB layout labor to turn the new form factor modem into reality.
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24 More specifically, we would do the design at the schematics+BOM level while the
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25 the PCB layout step would have to be outsourced at cost.
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26
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27 Approach 2 (NOT preferred, but can sometimes be agreed to in limited cases):
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28 someone else does the repackaging work under their own control.
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29
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30 In the case of Approach 1 the new modem product will always be guaranteed to
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31 work flawlessly and be fully compatible with our FreeCalypso sw and fw
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32 architecture because in this case the hardware design is personally supervised
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33 by the Mother of FreeCalypso and must receive her approval prior to being
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34 released to layout and then to fabrication. In the case of Approach 2 this
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35 assurance is lacking. This document provides some technical guidelines that
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36 MUST be followed in order for a new modem hw product to stand a chance at being
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37 compatible with FreeCalypso; anyone who follows Approach 2 against our
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38 recommendation but still wishes to have a chance at receiving support from us
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39 MUST follow these design guidelines.
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40
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41 LEGAL NOTICE: Following these technical guidelines does NOT by itself grant you
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42 a license to use our FreeCalypso trademark on your hardware products; this
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43 trademark is personally owned by Mychaela N. Falconia and only she has the
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44 authority to license its use at her sole discretion. Similarly our agreement
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45 with GSMA does NOT allow us to sublet any part of our IMEI number range to any
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46 other parties; any IMEI number ranges that may be allocated by GSMA to
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47 FreeCalypso products may ONLY be used for those products that are physically
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48 produced by Falconia Partners LLC from start to finish and not any others.
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49
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50 Basic technical guidelines
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51 ==========================
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52
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53 The purpose of these guidelines is to make it possible for the same firmware
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54 build configuration to support both our existing FCDEV3B and various
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55 repackagings of the underlying core modem solution (FC-TMS), i.e., to have the
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56 same official FC Magnetite firmware builds for target fcdev3b run not only on
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57 the original development board, but on all physical repackagings of the same
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58 core modem solution. To make such firmware reuse possible, the following
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59 hardware design constraints MUST be followed:
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60
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61 * The flash+RAM chip must be the same Spansion S71PL129NC0HFW4B as used on our
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62 FCDEV3B, and it must be wired the same way: first flash chip select on Calypso
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63 nCS0, RAM on nCS1, second flash chip select on nCS2. The flash reset line
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64 needs to be wired the same way as on FCDEV3B V2, otherwise Calypso sleep modes
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65 will be broken. We realize that this flash and RAM capacity (16 MiB and
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66 8 MiB, respectively) is extreme overkill for typical modem applications
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67 outside of development, but supporting multiple flash chip types would
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68 introduce a configuration management burden which we are not willing to
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69 take on.
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70
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71 [2019-03 update: we now have working flash chip type autodetection, and
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72 commercial modem products can use a smaller flash+RAM chip, specifically
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73 Samsung K5A3240CTM or K5A3281CTM as used by Openmoko.]
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74
2
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75 * Calypso's unused DSR_MODEM/LPG pin was left unconnected in Openmoko's version
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76 but on our FCDEV3B it is tied to GND on the board. Other boards seeking to
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77 be FreeCalypso-compatible need to have this pin tied to GND as well because
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78 our firmware leaves this pin in its default power-up config of DSR_MODEM input
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79 and does not change it to LPG output - leaving it unconnected would cause it
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80 to float.
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81
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82 * Our firmware configures Calypso GPIO 3 as an input; GPIOs 0-2 and those
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83 multifunction pins which are unused and configured as GPIOs (TSPDI/IO4,
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84 BCLKX/IO6, MCUEN1/IO8 and MCUEN2/IO13) are configured as outputs. Board
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85 wiring must be compatible with these directions: those pins which our fw
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86 drives as outputs can be simply left unconnected, while GPIO 3 needs to be
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87 sensibly driven or tied off as explained below.
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88
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89 * If someone needs a modem that produces an Openmoko-style application processor
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90 wakeup signal (asserted by the fw when the modem needs to send something to
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91 the host but is blocked by CTS being held high), this signal should be
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92 connected to GPIO 0. Openmoko used GPIO 1 for this purpose, but in
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93 FreeCalypso GPIO 1 is taken because we use it for the loudspeaker control
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94 signal like on TI's D-Sample and Leonardo boards, hence we are moving the AP
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95 wakeup signal to GPIO 0, to be implemented if and when anyone builds a modem
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96 based on FC-TMS that needs to provide such a signal.
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97
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98 * If your product includes a loudspeaker amplifier like on our FCDEV3B, connect
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99 its on/off control input to GPIO 1, otherwise leave our GPIO 1 output
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100 unconnected.
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101
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102 * Our fw produces a DCD modem control output on GPIO 2; if you are connecting
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103 the MODEM UART channel to an RS-232 port or to a USB-serial chip with a full
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104 set of modem control signals, connect DCD to GPIO 2.
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105
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106 * Our fw treats GPIO 3 as a DTR modem control input following TI's C-Sample and
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107 D-Sample boards. If your product has a real DTR signal coming from an RS-232
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108 interface or from a USB-serial chip, connect it to GPIO 3, otherwise GPIO 3
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109 needs to be pulled down to GND like on Leonardo and FCDEV3B.
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110
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111 * If you are connecting the MODEM UART channel to a full RS-232 port or to a
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112 USB-serial chip with a full set of modem control signals, you should connect
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113 DSR and RI to TSPDI/IO4 and MCUEN1/IO8, respectively. Right now our fw
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114 drives IO4 low and IO8 high, corresponding to DSR asserted and RI negated
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115 (normal quiescent state), and connecting the signals in this way allows the
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116 possibility of extending the fw to drive them in some more intelligent manner
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117 if need be.
2
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118
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119 * Both Calypso UARTs need to be wired in an accessible way so that our standard
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120 FC Magnetite firmware can be used with the AT command interface on the MODEM
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121 UART and RVTMUX on the IrDA UART.
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122
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123 * Our fw configures the MODEM UART with hardware flow control enabled; if your
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124 application lacks RTS/CTS signals, then Calypso's CTS_MODEM signal needs to
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125 be pulled down to GND so it is seen as asserted.
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126
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127 * Our fw configures the 4 MCSI/GPIO pins as MCSI rather than GPIO. If your
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128 board does not use MCSI because you are tapping VSP instead or not using any
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129 digital voice interface at all, then you should put pull-down resistors on
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130 MCSI_RXD, MCSI_CLK and MCSI_FSYNCH, otherwise these signals will float.
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131 MCSI_RXD can be directly tied to GND without a resistor as it is always an
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132 input to the Calypso, but MCSI_CLK and MCSI_FSYNCH need to be pulled down
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133 with resistors: our fw can enable TI's "Bluetooth headset" and "Bluetooth
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134 cordless" modes, in which case these signals become outputs. If the signals
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135 are switched to being outputs by software command but are tied to GND on the
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136 board, the result will be a shorted output driver which could damage the chip,
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137 and it is clearly not acceptable to produce hardware that can be damaged by
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138 an AT command, even an obscure and non-standard one.
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139
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140 Cost increment
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141 ==============
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142
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143 If you don't need huge flash and XRAM capacity, don't have a DTR input and are
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144 not using MCSI, then the incremental cost of being firmware-compatible with
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145 FCDEV3B compared to Openmoko's approach of leaving all unused signals
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146 unconnected and using a smaller flash+RAM chip consists of:
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147
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148 * A logic voltage level translating buffer to provide a reset to the flash chip
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149 that meets its timing requirements;
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150
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151 [2019-03 update: the above is no longer required, you can now use one of the
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152 smaller flash chips which are compatible with TI's silly FDP scheme and thus
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153 don't need the extra translating buffer IC for reset.]
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154
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155 * 3 pull-down resistors on GPIO3, MCSI_CLK and MCSI_FSYNCH;
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156
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157 * Direct connections to GND on DSR_MODEM and MCSI_RXD pins.
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158
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159 For parties other than the Mother, it is up to you to decide if being firmware-
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160 compatible is worth the cost increment or not, but all modem repackagings
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161 produced by us under the FreeCalypso brand will follow these software and
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162 firmware configuration management compatibility guidelines, and the same is
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163 required for anyone else who wishes for their hardware variant to be accepted
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164 into the FreeCalypso family.
2
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165
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166 Tapping VSP for the digital voice interface
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167 ===========================================
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168
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169 The Calypso+Iota chipset includes an interface called VSP for Voice Serial Port;
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170 per TI's design intent it is a strictly private interface between Calypso and
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171 Iota chips, but it is possible to tap into this interface to get an external
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172 digital voice channel. TI's official method for getting a digital voice channel
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173 out of a Calypso modem is to use MCSI in their so-called "Bluetooth headset"
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174 mode, however, our experiments on the FCDEV3B have revealed that this interface
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175 does not work the way one would naively expect. Unless we can convince TI to
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176 dig up and release the sources for the Calypso DSP ROM, which we obviously
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177 cannot count on, we won't be able to use MCSI reliably until and unless we
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178 undertake to fully reverse their DSP ROM code from disassembly, which would be
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179 an extremely major and very costly undertaking. Because of this unfortunate
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180 situation, the alternative way of tapping into VSP needs to be given
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181 consideration.
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182
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183 [2019-03 update: we got MCSI working now, please read the Calypso-digital-voice
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184 article for more info about both MCSI and VSP options.]
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185
2
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186 Tapping into VSP is absolutely not possible on our current FCDEV3B, as the
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187 signals in question are currently routed directly from one BGA to another and
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188 do not come up to the surface at any accessible point. The same situation holds
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189 on every other existing Calypso phone and modem known to us - after all, VSP was
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190 meant to be a private chip-to-chip interface. Instead we are presenting the
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191 idea of tapping VSP as a possibility for anyone who undertakes to repackage our
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192 FC-TMS into some new form factor and desires a digital voice channel while at
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193 it.
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194
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195 In TI's standard solution VSP clock and frame sync signals are generated by the
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196 Iota ABB and are inputs to the Calypso DBB. Because they are inputs to the
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197 Calypso, it may be tempting to disconnect them from the ABB and have them
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198 originate from an external source instead - however, TI's DSP code in the ROM
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199 was most certainly written with the assumption that these signals will only
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200 ever be driven by their ABB and never by anyone else, hence having them come
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201 from a source whose timing does not come from the Calypso can cause all kinds
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202 of strangeness which we will never be able to debug properly because the DSP is
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203 a mysterious black box. Therefore, my (Mother Mychaela's) stance is that if
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204 you break the VSP connection between Calypso and Iota, then you are entirely on
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205 your own - don't expect any help from me. Instead my idea is to tap into VSP
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206 without breaking it, specifically:
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207
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208 * Keep the clock and frame sync connection between Calypso and Iota, with Iota
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209 remaining the driver on these nets - but also bring these signals out
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210 externally, so external logic can sync itself to this interface as well.
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211
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212 * Do likewise for the line that carries downlink voice from the DBB to the ABB:
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213 let the ABB receive it and use it to drive the analogue earpiece output (which
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214 would be unconnected in a digital voice application), but let external logic
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215 receive it too.
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216
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217 * Break only the line that carries uplink voice from the ABB to the DBB: bring
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218 the Iota output side on one external interface pin and the Calypso input side
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219 on another external interface pin. Putting a jumper on these adjacent header
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220 pins would restore TI's original configuration and allow uplink voice to come
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221 from an analogue microphone connected to the ABB, and if a digital uplink
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222 voice source is desired, remove the jumper and have an external source provide
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223 the bits which would otherwise come from Iota's voice ADC.
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224
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225 The above approach would provide a usable digital voice interface that would be
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226 completely transparent (invisible) to the Calypso DSP and even to the ARM-side
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227 firmware, hence it should work without any nasty surprises.
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228
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229 Triband vs. quadband
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230 ====================
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231
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232 One shortcoming of our current FreeCalypso modem solution is that it is triband
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233 and not quadband; more specifically our standard hw build omits the GSM850 band,
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234 or we can build a different configuration that supports GSM850 but omits EGSM
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235 (the 900 MHz band). To the best of our knowledge the GSM850 band is used very
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236 little these days, but being only triband makes us look bad compared to the
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237 competition: all of the mainstream proprietary GSM modem modules are fully
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238 quadband these days.
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239
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240 It *is* possible to make a Calypso-based quadband modem, as TI had one: their
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241 Leonardo reference board for the Calypso+Iota+Rita chipset existed in several
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242 versions some of which were quadband, and their E-Sample board (Calypso+) which
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243 used the same Rita RF block was also quadband. However, changing our current
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244 FC modem design from triband to quadband would involve a highly invasive PCB
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245 layout change: basically our entire modem PCB layout and particularly the GHz RF
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246 section would have to be ripped up and reshuffled into a different arrangement.
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247 Furthermore, if we as the FreeCalypso community do decide that we wish to
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248 produce a quadband modem, I (Mother Mychaela) would NOT be comfortable with
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249 entrusting the needed re-layout work to an "ordinary" PCB layout contractor who
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250 is not a cellphone RF design expert, instead we would need to get a consultation
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251 from an RF PCB design expert who has experience very specifically with GSM
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252 cellphone design and not any other applications. Finding such an expert would
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253 be a major task in itself, and that expert most certainly won't come cheap.
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254 Therefore, a quadband FreeCalypso modem probably won't happen unless we get
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255 someone with a lot of money to throw around.
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256
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257 There is one exception, though: if anyone would like to see our FreeCalypso
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258 modem repackaged into the SMT module form factor copied from BenQ M32 and pays
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259 for that venture, the result would be naturally quadband as the layout of BenQ's
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260 module follows the same floorplan in the RF section as TI's quadband Leonardo
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261 and E-Sample layout. However, that approach would involve a step to reverse-
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Mychaela Falconia <falcon@freecalypso.org>
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262 engineer BenQ's layout by slicing their board and imaging its inner layers,
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263 hence anyone seeking this approach would need to be prepared to pay for that
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264 step.
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265
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266 If anyone ever does pay for the creation of a quadband version of our
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Mychaela Falconia <falcon@freecalypso.org>
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267 FreeCalypso modem solution, be it in BenQ's physical form factor or some other,
6
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268 what about the firmware? For a long time I thought that a quadband modem would
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269 need a different firmware build configuration because of incompatible TSPACT
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270 signals. Our current triband modem (copied from Openmoko) has them wired like
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271 this:
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272
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273 TSPACT2 = Tx high bands
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274 TSPACT1 = Rx PCS band
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275 TSPACT4 = Tx low bands
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276
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277 But TI's original TSPACT wiring for the quadband RFFE on their Leonardo and
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Mychaela Falconia <falcon@freecalypso.org>
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278 E-Sample boards was different:
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279
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280 TSPACT2 = Tx low bands
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281 TSPACT1 = Tx high bands
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282 TSPACT4 = Rx GSM850 band
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283
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284 These two TSPACT signal assignments are mutually incompatible, hence if we make
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Mychaela Falconia <falcon@freecalypso.org>
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285 a quadband modem following TI's original Leonardo/E-Sample TSPACT wiring, it
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Mychaela Falconia <falcon@freecalypso.org>
parents: 5
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286 won't be able to share the same fw with our triband modems. But then I got an
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Mychaela Falconia <falcon@freecalypso.org>
parents: 5
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287 idea: what if we wire them up in our own creative way as follows:
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
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parents: 5
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288
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289 TSPACT2 = Tx high bands
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290 TSPACT4 = Tx low bands
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Mychaela Falconia <falcon@freecalypso.org>
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291 TSPACT5 = Rx GSM850 band
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parents: 5
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292
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293 Then we can have the same fw build configuration support both triband and
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Mychaela Falconia <falcon@freecalypso.org>
parents: 5
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294 quadband FreeCalypso modems by driving the signals as follows:
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295
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296 TSPACT1 = Rx PCS band
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Mychaela Falconia <falcon@freecalypso.org>
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297 TSPACT2 = Tx high bands
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
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parents: 5
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298 TSPACT4 = Tx low bands
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Mychaela Falconia <falcon@freecalypso.org>
parents: 5
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299 TSPACT5 = Rx GSM850 band
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parents: 5
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300
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301 TSPACT1 will be driven but unused on quadband modems, whereas TSPACT5 will be
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Mychaela Falconia <falcon@freecalypso.org>
parents: 5
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302 driven but unused on triband ones like our current FCDEV3B. To me (Mother
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303 Mychaela) being able to have the same fw among *all* FreeCalypso modem variants,
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents: 5
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304 both triband and quadband, is more valuable than the symbolic act of recreating
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring
Mychaela Falconia <falcon@freecalypso.org>
parents: 5
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305 TI's original RFFE wiring, hence I am now leaning toward this new approach.