freecalypso-docs: FCDEV3B-repackaging annotate

annotate FCDEV3B-repackaging @ 6:700d6cff63bb

FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring

author	Mychaela Falconia <falcon@freecalypso.org>
date	Thu, 11 Oct 2018 05:44:22 +0000
parents	f920c9a68d45
children	f57f29dcc6d6

rev	line source
2 020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	1 Repackaging FreeCalypso modem into different physical form factors
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	2 ==================================================================
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	3
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	4 As of this writing, our FreeCalypso Triband Modem Solution has reached the
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	5 status of a finished product: it is no longer experimental or developmental,
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	6 it is now fully fit for operational use on live public GSM networks in end user
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	7 applications that need a standards-compliant GSM+GPRS modem. However, at the
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	8 present moment it is only available in the physical form factor of a development
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	9 board (FCDEV3B) that was originally designed to serve as a software/firmware
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	10 development platform, and as such it is not ideally suited for use as an end
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	11 product. For end use applications it would be highly desirable to take our
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	12 proven FC Triband Modem Solution (FC-TMS) as realized on the FCDEV3B and
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	13 repackage it into other physical form factors. This repackaging can be done
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	14 in two ways:
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	15
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	16 Approach 1 (strongly preferred): the party who desires to have our FC-TMS in a
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	17 particular form factor gets in touch with FreeCalypso Central, engages in a
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	18 discussion with us to arrive at the new form factor to be implemented (it needs
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	19 to satisfy your requirements and be feasible for us to implement), then funds
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	20 the cost of PCB layout labor to turn the new form factor modem into reality.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	21 More specifically, we would do the design at the schematics+BOM level while the
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	22 the PCB layout step would have to be outsourced at cost.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	23
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	24 Approach 2 (NOT preferred, but can sometimes be agreed to in limited cases):
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	25 someone else does the repackaging work under their own control.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	26
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	27 In the case of Approach 1 the new modem product will always be guaranteed to
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	28 work flawlessly and be fully compatible with our FreeCalypso sw and fw
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	29 architecture because in this case the hardware design is personally supervised
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	30 by the Mother of FreeCalypso and must receive her approval prior to being
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	31 released to layout and then to fabrication. In the case of Approach 2 this
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	32 assurance is lacking. This document provides some technical guidelines that
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	33 MUST be followed in order for a new modem hw product to stand a chance at being
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	34 compatible with FreeCalypso; anyone who follows Approach 2 against our
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	35 recommendation but still wishes to have a chance at receiving support from us
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	36 MUST follow these design guidelines.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	37
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	38 LEGAL NOTICE: Following these technical guidelines does NOT by itself grant you
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	39 a license to use our FreeCalypso trademark on your hardware products; this
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	40 trademark is personally owned by Mychaela N. Falconia and only she has the
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	41 authority to license its use at her sole discretion. Similarly our agreement
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	42 with GSMA does NOT allow us to sublet any part of our IMEI number range to any
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	43 other parties; any IMEI number ranges that may be allocated by GSMA to
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	44 FreeCalypso products may ONLY be used for those products that are physically
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	45 produced by Falconia Partners LLC from start to finish and not any others.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	46
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	47 Basic technical guidelines
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	48 ==========================
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	49
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	50 The purpose of these guidelines is to make it possible for the same firmware
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	51 build configuration to support both our existing FCDEV3B and various
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	52 repackagings of the underlying core modem solution (FC-TMS), i.e., to have the
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	53 same official FC Magnetite firmware builds for target fcdev3b run not only on
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	54 the original development board, but on all physical repackagings of the same
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	55 core modem solution. To make such firmware reuse possible, the following
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	56 hardware design constraints MUST be followed:
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	57
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	58 * The flash+RAM chip must be the same Spansion S71PL129NC0HFW4B as used on our
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	59 FCDEV3B, and it must be wired the same way: first flash chip select on Calypso
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	60 nCS0, RAM on nCS1, second flash chip select on nCS2. The flash reset line
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	61 needs to be wired the same way as on FCDEV3B V2, otherwise Calypso sleep modes
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	62 will be broken. We realize that this flash and RAM capacity (16 MiB and
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	63 8 MiB, respectively) is extreme overkill for typical modem applications
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	64 outside of development, but supporting multiple flash chip types would
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	65 introduce a configuration management burden which we are not willing to
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	66 take on.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	67
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	68 * Calypso's unused DSR_MODEM/LPG pin was left unconnected in Openmoko's version
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	69 but on our FCDEV3B it is tied to GND on the board. Other boards seeking to
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	70 be FreeCalypso-compatible need to have this pin tied to GND as well because
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	71 our firmware leaves this pin in its default power-up config of DSR_MODEM input
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	72 and does not change it to LPG output - leaving it unconnected would cause it
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	73 to float.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	74
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	75 * Our firmware configures Calypso GPIO 3 as an input; GPIOs 0-2 and those
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	76 multifunction pins which are unused and configured as GPIOs (TSPDI/IO4,
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	77 BCLKX/IO6, MCUEN1/IO8 and MCUEN2/IO13) are configured as outputs. Board
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	78 wiring must be compatible with these directions: those pins which our fw
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	79 drives as outputs can be simply left unconnected, while GPIO 3 needs to be
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	80 sensibly driven or tied off as explained below.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	81
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	82 * If someone needs a modem that produces an Openmoko-style application processor
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	83 wakeup signal (asserted by the fw when the modem needs to send something to
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	84 the host but is blocked by CTS being held high), this signal should be
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	85 connected to GPIO 0. Openmoko used GPIO 1 for this purpose, but in
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	86 FreeCalypso GPIO 1 is taken because we use it for the loudspeaker control
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	87 signal like on TI's D-Sample and Leonardo boards, hence we are moving the AP
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	88 wakeup signal to GPIO 0, to be implemented if and when anyone builds a modem
3 4f873ec004f6 FCDEV3B-repackaging: minor grammar fixes Mychaela Falconia <falcon@freecalypso.org> parents: 2 diff changeset	89 based on FC-TMS that needs to provide such a signal.
2 020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	90
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	91 * If your product includes a loudspeaker amplifier like on our FCDEV3B, connect
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	92 its on/off control input to GPIO 1, otherwise leave our GPIO 1 output
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	93 unconnected.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	94
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	95 * Our fw produces a DCD modem control output on GPIO 2; if you are connecting
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	96 the MODEM UART channel to an RS-232 port or to a USB-serial chip with a full
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	97 set of modem control signals, connect DCD to GPIO 2.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	98
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	99 * Our fw treats GPIO 3 as a DTR modem control input following TI's C-Sample and
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	100 D-Sample boards. If your product has a real DTR signal coming from an RS-232
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	101 interface or from a USB-serial chip, connect it to GPIO 3, otherwise GPIO 3
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	102 needs to be pulled down to GND like on Leonardo and FCDEV3B.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	103
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	104 * If you are connecting the MODEM UART channel to a full RS-232 port or to a
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	105 USB-serial chip with a full set of modem control signals, you should connect
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	106 DSR and RI to TSPDI/IO4 and MCUEN1/IO8, respectively. Right now our fw
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	107 drives IO4 low and IO8 high, corresponding to DSR asserted and RI negated
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	108 (normal quiescent state), and connecting the signals in this way allows the
3 4f873ec004f6 FCDEV3B-repackaging: minor grammar fixes Mychaela Falconia <falcon@freecalypso.org> parents: 2 diff changeset	109 possibility of extending the fw to drive them in some more intelligent manner
4f873ec004f6 FCDEV3B-repackaging: minor grammar fixes Mychaela Falconia <falcon@freecalypso.org> parents: 2 diff changeset	110 if need be.
2 020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	111
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	112 * Both Calypso UARTs need to be wired in an accessible way so that our standard
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	113 FC Magnetite firmware can be used with the AT command interface on the MODEM
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	114 UART and RVTMUX on the IrDA UART.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	115
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	116 * Our fw configures the MODEM UART with hardware flow control enabled; if your
5 f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	117 application lacks RTS/CTS signals, then Calypso's CTS_MODEM signal needs to
2 020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	118 be pulled down to GND so it is seen as asserted.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	119
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	120 * Our fw configures the 4 MCSI/GPIO pins as MCSI rather than GPIO. If your
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	121 board does not use MCSI because you are tapping VSP instead or not using any
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	122 digital voice interface at all, then you should put pull-down resistors on
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	123 MCSI_RXD, MCSI_CLK and MCSI_FSYNCH, otherwise these signals will float.
5 f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	124 MCSI_RXD can be directly tied to GND without a resistor as it is always an
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	125 input to the Calypso, but MCSI_CLK and MCSI_FSYNCH need to be pulled down
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	126 with resistors: our fw can enable TI's "Bluetooth headset" and "Bluetooth
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	127 cordless" modes, in which case these signals become outputs. If the signals
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	128 are switched to being outputs by software command but are tied to GND on the
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	129 board, the result will be a shorted output driver which could damage the chip,
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	130 and it is clearly not acceptable to produce hardware that can be damaged by
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	131 an AT command, even an obscure and non-standard one.
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	132
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	133 Cost increment
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	134 ==============
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	135
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	136 If you don't need huge flash and XRAM capacity, don't have a DTR input and are
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	137 not using MCSI, then the incremental cost of being firmware-compatible with
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	138 FCDEV3B compared to Openmoko's approach of leaving all unused signals
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	139 unconnected and using a smaller flash+RAM chip consists of:
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	140
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	141 * A logic voltage level translating buffer to provide a reset to the flash chip
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	142 that meets its timing requirements;
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	143
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	144 * 3 pull-down resistors on GPIO3, MCSI_CLK and MCSI_FSYNCH;
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	145
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	146 * Direct connections to GND on DSR_MODEM and MCSI_RXD pins.
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	147
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	148 For parties other than the Mother, it is up to you to decide if being firmware-
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	149 compatible is worth the cost increment or not, but all modem repackagings
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	150 produced by us under the FreeCalypso brand will follow these software and
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	151 firmware configuration management compatibility guidelines, and the same is
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	152 required for anyone else who wishes for their hardware variant to be accepted
f920c9a68d45 FCDEV3B-repackaging: clarified the cost increment Mychaela Falconia <falcon@freecalypso.org> parents: 4 diff changeset	153 into the FreeCalypso family.
2 020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	154
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	155 Tapping VSP for the digital voice interface
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	156 ===========================================
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	157
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	158 The Calypso+Iota chipset includes an interface called VSP for Voice Serial Port;
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	159 per TI's design intent it is a strictly private interface between Calypso and
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	160 Iota chips, but it is possible to tap into this interface to get an external
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	161 digital voice channel. TI's official method for getting a digital voice channel
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	162 out of a Calypso modem is to use MCSI in their so-called "Bluetooth headset"
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	163 mode, however, our experiments on the FCDEV3B have revealed that this interface
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	164 does not work the way one would naively expect. Unless we can convince TI to
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	165 dig up and release the sources for the Calypso DSP ROM, which we obviously
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	166 cannot count on, we won't be able to use MCSI reliably until and unless we
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	167 undertake to fully reverse their DSP ROM code from disassembly, which would be
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	168 an extremely major and very costly undertaking. Because of this unfortunate
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	169 situation, the alternative way of tapping into VSP needs to be given
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	170 consideration.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	171
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	172 Tapping into VSP is absolutely not possible on our current FCDEV3B, as the
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	173 signals in question are currently routed directly from one BGA to another and
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	174 do not come up to the surface at any accessible point. The same situation holds
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	175 on every other existing Calypso phone and modem known to us - after all, VSP was
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	176 meant to be a private chip-to-chip interface. Instead we are presenting the
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	177 idea of tapping VSP as a possibility for anyone who undertakes to repackage our
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	178 FC-TMS into some new form factor and desires a digital voice channel while at
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	179 it.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	180
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	181 In TI's standard solution VSP clock and frame sync signals are generated by the
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	182 Iota ABB and are inputs to the Calypso DBB. Because they are inputs to the
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	183 Calypso, it may be tempting to disconnect them from the ABB and have them
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	184 originate from an external source instead - however, TI's DSP code in the ROM
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	185 was most certainly written with the assumption that these signals will only
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	186 ever be driven by their ABB and never by anyone else, hence having them come
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	187 from a source whose timing does not come from the Calypso can cause all kinds
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	188 of strangeness which we will never be able to debug properly because the DSP is
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	189 a mysterious black box. Therefore, my (Mother Mychaela's) stance is that if
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	190 you break the VSP connection between Calypso and Iota, then you are entirely on
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	191 your own - don't expect any help from me. Instead my idea is to tap into VSP
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	192 without breaking it, specifically:
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	193
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	194 * Keep the clock and frame sync connection between Calypso and Iota, with Iota
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	195 remaining the driver on these nets - but also bring these signals out
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	196 externally, so external logic can sync itself to this interface as well.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	197
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	198 * Do likewise for the line that carries downlink voice from the DBB to the ABB:
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	199 let the ABB receive it and use it to drive the analogue earpiece output (which
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	200 would be unconnected in a digital voice application), but let external logic
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	201 receive it too.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	202
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	203 * Break only the line that carries uplink voice from the ABB to the DBB: bring
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	204 the Iota output side on one external interface pin and the Calypso input side
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	205 on another external interface pin. Putting a jumper on these adjacent header
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	206 pins would restore TI's original configuration and allow uplink voice to come
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	207 from an analogue microphone connected to the ABB, and if a digital uplink
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	208 voice source is desired, remove the jumper and have an external source provide
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	209 the bits which would otherwise come from Iota's voice ADC.
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	210
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	211 The above approach would provide a usable digital voice interface that would be
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	212 completely transparent (invisible) to the Calypso DSP and even to the ARM-side
020df28341d0 FCDEV3B-repackaging article written Mychaela Falconia <falcon@freecalypso.org> parents: diff changeset	213 firmware, hence it should work without any nasty surprises.
4 1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	214
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	215 Triband vs. quadband
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	216 ====================
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	217
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	218 One shortcoming of our current FreeCalypso modem solution is that it is triband
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	219 and not quadband; more specifically our standard hw build omits the GSM850 band,
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	220 or we can build a different configuration that supports GSM850 but omits EGSM
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	221 (the 900 MHz band). To the best of our knowledge the GSM850 band is used very
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	222 little these days, but being only triband makes us look bad compared to the
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	223 competition: all of the mainstream proprietary GSM modem modules are fully
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	224 quadband these days.
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	225
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	226 It is possible to make a Calypso-based quadband modem, as TI had one: their
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	227 Leonardo reference board for the Calypso+Iota+Rita chipset existed in several
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	228 versions some of which were quadband, and their E-Sample board (Calypso+) which
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	229 used the same Rita RF block was also quadband. However, changing our current
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	230 FC modem design from triband to quadband would involve a highly invasive PCB
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	231 layout change: basically our entire modem PCB layout and particularly the GHz RF
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	232 section would have to be ripped up and reshuffled into a different arrangement.
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	233 Furthermore, if we as the FreeCalypso community do decide that we wish to
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	234 produce a quadband modem, I (Mother Mychaela) would NOT be comfortable with
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	235 entrusting the needed re-layout work to an "ordinary" PCB layout contractor who
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	236 is not a cellphone RF design expert, instead we would need to get a consultation
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	237 from an RF PCB design expert who has experience very specifically with GSM
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	238 cellphone design and not any other applications. Finding such an expert would
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	239 be a major task in itself, and that expert most certainly won't come cheap.
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	240 Therefore, a quadband FreeCalypso modem probably won't happen unless we get
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	241 someone with a lot of money to throw around.
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	242
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	243 There is one exception, though: if anyone would like to see our FreeCalypso
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	244 modem repackaged into the SMT module form factor copied from BenQ M32 and pays
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	245 for that venture, the result would be naturally quadband as the layout of BenQ's
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	246 module follows the same floorplan in the RF section as TI's quadband Leonardo
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	247 and E-Sample layout. However, that approach would involve a step to reverse-
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	248 engineer BenQ's layout by slicing their board and imaging its inner layers,
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	249 hence anyone seeking this approach would need to be prepared to pay for that
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	250 step.
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	251
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	252 If anyone ever does pay for the creation of a quadband version of our
1dbc8c5d9698 FCDEV3B-repackaging: triband vs. quadband section added Mychaela Falconia <falcon@freecalypso.org> parents: 3 diff changeset	253 FreeCalypso modem solution, be it in BenQ's physical form factor or some other,
6 700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	254 what about the firmware? For a long time I thought that a quadband modem would
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	255 need a different firmware build configuration because of incompatible TSPACT
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	256 signals. Our current triband modem (copied from Openmoko) has them wired like
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	257 this:
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	258
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	259 TSPACT2 = Tx high bands
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	260 TSPACT1 = Rx PCS band
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	261 TSPACT4 = Tx low bands
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	262
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	263 But TI's original TSPACT wiring for the quadband RFFE on their Leonardo and
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	264 E-Sample boards was different:
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	265
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	266 TSPACT2 = Tx low bands
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	267 TSPACT1 = Tx high bands
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	268 TSPACT4 = Rx GSM850 band
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	269
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	270 These two TSPACT signal assignments are mutually incompatible, hence if we make
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	271 a quadband modem following TI's original Leonardo/E-Sample TSPACT wiring, it
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	272 won't be able to share the same fw with our triband modems. But then I got an
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	273 idea: what if we wire them up in our own creative way as follows:
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	274
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	275 TSPACT2 = Tx high bands
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	276 TSPACT4 = Tx low bands
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	277 TSPACT5 = Rx GSM850 band
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	278
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	279 Then we can have the same fw build configuration support both triband and
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	280 quadband FreeCalypso modems by driving the signals as follows:
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	281
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	282 TSPACT1 = Rx PCS band
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	283 TSPACT2 = Tx high bands
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	284 TSPACT4 = Tx low bands
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	285 TSPACT5 = Rx GSM850 band
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	286
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	287 TSPACT1 will be driven but unused on quadband modems, whereas TSPACT5 will be
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	288 driven but unused on triband ones like our current FCDEV3B. To me (Mother
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	289 Mychaela) being able to have the same fw among all FreeCalypso modem variants,
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	290 both triband and quadband, is more valuable than the symbolic act of recreating
700d6cff63bb FCDEV3B-repackaging: new ideas regarding quadband RFFE TSPACT wiring Mychaela Falconia <falcon@freecalypso.org> parents: 5 diff changeset	291 TI's original RFFE wiring, hence I am now leaning toward this new approach.

FreeCalypso > hg > freecalypso-docs

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