FreeCalypso > hg > freecalypso-docs

annotate Calypso-PWM-light @ 74:e4eebf9ffce3

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
FC-handset-spec: Vf=2.9 V on both HaoRan and Formike LCD modules
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 16 Sep 2021 06:26:35 +0000
parents 1cdd0f0a6e70
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
40
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 The Calypso chip has a PWM light output called LT/PWL - a digital output pin
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 that can be configured as either LT or PWL. The documentation we got from TI
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 is not exhaustively complete in describing the exact behaviour and output
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 waveforms of these two modes, thus I (Mother Mychaela) did a little bit of lab
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 experimentation to complete the picture. All experimental observations were
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 made with an oscilloscope probe placed on the LT/PWL signal on a FreeCalypso
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7 Caramel2 board.
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9 LT mode
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10 =======
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12 LT functionality of the LT/PWL output is implemented in the ARMIO block,
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13 together with GPIO and keypad functions. LT output stays at constant low level
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14 (zero light) only when the LIGHT bit in BUZZ_LIGHT_REG (FFFE:480E) is cleared;
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15 if the LIGHT bit is set, then a small amount of light will be emitted even if
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16 LIGHT_LEVEL_REG is set to 0, contrary to CAL207 document saying "no light" in
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 this case. Light levels 0 through 63 as written into LIGHT_LEVEL_REG really
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
18 correspond to 1/64 through 64/64 in terms of the actual emitted PWM duty cycles.
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
19 If the register is written with the maximum light level of 63, then LT output
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20 is a continuous high level, with no o'scope-observable PWM activity. If the
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21 register is written with any other value, then PWM activity becomes visible on
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
22 an oscilloscope, with each full cycle period equal to 64 periods of CLK13M,
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
23 i.e., PWM frequency equals 203.125 kHz, the master 13 MHz clock divided by 64.
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
24 The shape of this PWM output is totally straightforward: if LIGHT_LEVEL_REG is
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
25 set to 0, LT output is high for one CLK13M period and low for 63 periods, then
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
26 repeat; if LIGHT_LEVEL_REG is set to 1, LT output is high for 2 CLK13M periods
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
27 and low for 62 periods, and so forth, with LIGHT_LEVEL_REG set to 63 resulting
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
28 in LT being high in all 64 slots, i.e., continuous high output with no visible
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
29 PWM activity.
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
30
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
31 PWL mode
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
32 ========
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
33
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
34 The description of PWL in the CAL207 document is reasonably good; only a few
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
35 additional notes need to be made:
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
36
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
37 * By the fundamental principles of how all LFSRs work, an LFSR of N bits CANNOT
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
38 have a period of 2**N, instead the greatest period that can be achieved with
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
39 careful choice of polynomial is 2**N-1. Calypso PWL block features an 8-bit
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
40 LFSR, TI's choice of polynomial (hard-wired in the silicon) is a proper one,
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
41 thus the period is 255.
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
42
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
43 * Two alternate hw implementations are possible: XOR implementation would
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
44 produce an LFSR with valid values [1,255], whereas XNOR implementation would
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
45 produce an LFSR with valid values [0,254]. Obviously we have no way to look
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
46 inside Calypso silicon, but the visible behaviour with different comparator
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
47 values suggests that the internal LFSR runs in the [1,255] range. There must
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
48 be some reset logic in the hw that prevents a stuck value of 0.
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
49
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
50 * The visible output on the PWL pin repeats every 255 cycles of CLK32K, and the
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
51 average light intensity ranges from 0/255 to 254/255 in 1/255 steps. If
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
52 PWL_LEVEL_REG is set to either 0 or 1, PWL output is continuous low; if the
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
53 register is set to 2, PWL output is 1/255 (on for just one CLK32K cycle out of
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
54 255), and if the register is set to maximum of 255, PWL output is NOT
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
55 continuous high as CAL207 claims, but instead it is 254/255, i.e., on for 254
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
56 out of every 255 CLK32K periods.
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
57
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
58 Deep sleep interaction
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
59 ======================
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
60
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
61 LT mode uses CLK13M, thus it is incompatible with deep sleep. PWL uses CLK32K
1cdd0f0a6e70 Calypso-PWM-light and Calypso-buzzer-output articles written
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
62 instead, thus deep sleep is perfectly OK with this light on.