FreeCalypso > hg > freecalypso-hwlab

annotate doc/Unbuffered-FT2232x-JTAG @ 67:286289d551ee

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author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 19 Mar 2020 03:14:33 +0000
parents 96232f00bc9c
children 1d38af6d7be8
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ace3ed1d5ddf Unbuffered FT2232x JTAG article written
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1 How to make a safe JTAG adapter out of a generic unbuffered FT2232x board
ace3ed1d5ddf Unbuffered FT2232x JTAG article written
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2 =========================================================================
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3
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4 Among the FOSS community of tinkerers who use OpenOCD to operate on the JTAG
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5 interfaces of various hardware targets, one of the most common JTAG adapter
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6 choices (if not the most common) is to use some adapter gadget based on an FTDI
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7 chip, most commonly one of FT2232x variants. However, a major distinction needs
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8 to be drawn between specialized purpose-made JTAG adapter products which just
ace3ed1d5ddf Unbuffered FT2232x JTAG article written
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9 happen to use an FT2232x chip internally, versus generic FT2232x breakout boards
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10 which the user wires up for JTAG on his or her own.
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11
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12 In an ideal world, using a purpose-made buffered JTAG adapter (one that has a
ace3ed1d5ddf Unbuffered FT2232x JTAG article written
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13 buffer inserted between FT2232x I/O pins and the target connection interface)
ace3ed1d5ddf Unbuffered FT2232x JTAG article written
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14 would be strongly preferable for a whole host of reasons. However, to this
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15 author's disappointment, there are very few community vendors who make such
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16 adapters, and I was NOT able to find any high-quality buffered JTAG adapter
ace3ed1d5ddf Unbuffered FT2232x JTAG article written
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17 which can be bought in the present and which comes with published schematics.
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18 (There is one very well-known vendor of "community" JTAG adapters who refuses
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19 to publish schematics for their current model; they have an older model for
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20 which they did publish schematics, but it is discontinued and they are not
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21 interested in bringing it back into production or handing the complete design
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22 over to the community - probably because it would then compete with their
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23 current sans-schematics product! Selling JTAG adapters to the community while
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24 keeping their schematics secret is just assinine, and I refuse to give my
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25 business to such vendors.)
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26
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27 Given the current sorry state of availability of buffered JTAG adapters, I have
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28 given more thought to the unbuffered option, and I found what appears to be a
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29 way to make them safe - but my method requires programming the EEPROM on the
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30 FT2232x board with a special custom configuration, and in this article I am
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31 going to provide the full details and instructions.
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32
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33 To begin with, an unbuffered JTAG adapter (one in which the target JTAG signals
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34 are connected directly to FT2232x I/O pins without any buffer in between) can
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35 work only with targets that operate their JTAG interface at 3.3 V, or perhaps
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36 a slightly lower but still fully 3.3V-compatible logic voltage level like the
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37 2.8 V I/O on Calypso GSM baseband processors. An unbuffered adapter CANNOT
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38 work with, say, a 1.8 V JTAG interface - but as long as your target runs at
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39 3.3 or 2.8 V, then we can continue.
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40
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41 The next big problem with unbuffered FT2232x adapters is that if you don't put
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42 a special configuration in the EEPROM (or if your FT2232x board omits the EEPROM
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43 altogether), the channel which you are going to wire up for JTAG (can only be
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44 Channel A on FT2232C/D, can be either channel on FT2232H) is going to come up
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45 in FTDI's default UART mode on power-up, and it is going to stay in that mode
ace3ed1d5ddf Unbuffered FT2232x JTAG article written
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46 until and unless you run OpenOCD, which will then switch it into MPSSE mode for
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47 JTAG. Why is it a problem? Answer: you need to connect the TDO line from the
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48 target to the FT2232x chip's ADBUS2 pin for JTAG to work via MPSSE, but in the
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49 power-up default UART mode this ADBUS2 pin is the RTS output. FT2232x RTS
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50 output fighting with the target's TDO output - not good, and it could even fry
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51 one or both of the chips.
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52
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53 Unfortunately FTDI's stupid chip design does not allow the desired MPSSE mode
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54 to be configured in the EEPROM so that it is there right from power-up. But
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55 there is a workaround: if the EEPROM config is set up to put Channel A (the one
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56 that will be wired for JTAG) into the rarely-used 245 FIFO mode instead of UART,
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57 all 8 ADBUS pins (including ADBUS2 where TDO will be connected) will power up
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58 as inputs with weak internal pull-ups (as long as the ACBUS2 control line is
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59 left unconnected), which is much safer than what these pins do in the default
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60 UART mode.
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61
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62 And if we need to program the EEPROM with a special custom config to change
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63 Channel A from 232 UART to 245 FIFO, we can also assign a different USB VID:PID
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64 at the same time. FTDI's default FT2232x ID of 0403:6010 works great when both
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65 channels of the FT2232x device are used as UARTs - the Linux kernel recognizes
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66 this USB ID, creates a pair of ttyUSB devices (one for each channel), and
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67 everything Just Works. But what if Channel A is used for JTAG and is therefore
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68 not a valid UART channel? If the default USB ID is left unchanged, what happens
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69 is that a pair of ttyUSB devices still gets created, with the first out of the
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70 pair being completely bogus and non-functional. And when you run OpenOCD, that
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71 bogus Channel A ttyUSB device disappears, while the Channel B ttyUSB device
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72 (which will actually work if Channel B is wired as a UART) remains, creating a
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73 gap in ttyUSB numbers. If you have a ton of ttyUSB devices on your system and
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74 are struggling to keep track of which is which, this behaviour certainly does
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75 not help.
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76
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77 As it happens, our company Falconia Partners LLC has received a block of 8 PIDs
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78 from FTDI, allocated out of FTDI's VID range - these PIDs have been officially
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79 allocated by FTDI to our company for use in products based on FTDI chips. And
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80 because we can spare one PID for a worthy cause, one of these PIDs (0403:7151)
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81 is hereby being donated to the community for use on generic FT2232x boards in
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82 the unbuffered JTAG adapter configuration.
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83
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84 As of this writing, this 0403:7151 PID has not been submitted to Linux ftdi_sio
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85 kernel maintainers yet, thus if you program it into your FT2232x EEPROM
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86 following the instructions below, the kernel will leave that FT2232x device
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87 completely alone. If you are interested only in JTAG and don't need an extra
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88 UART on Channel B, this arrangement should be fully sufficient - you simply
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89 configure your OpenOCD in userspace to find your unbuffered and ad-hoc-wired
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90 JTAG adapter at that USB ID. And if you do need the UART on Channel B, you can
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91 trivially patch your ftdi_sio.c kernel driver, adding the new ID to the table
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92 with JTAG quirk (&ftdi_jtag_quirk) specified.
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93
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94 Choice of FT2232x breakout board
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95 ================================
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96
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97 Here at FreeCalypso HQ we make very extensive use of FT2232C/D breakout boards
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98 by PLDkit, and I officially recommend and endorse this vendor:
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99
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100 http://pldkit.com/other/ft2232d-module
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101
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102 These modules were originally made with FT2232D chips, then the vendor found a
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103 stash of old but still good FT2232C chips, so apparently the current ones are
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104 FT2232C, not D - but this distinction makes no difference for the present
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105 purpose.
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106
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107 These days FT2232H chips and FT2232H breakout boards are much more popular, but
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108 I generally prefer FT2232C/D for classicness and simplicity. Additionally,
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109 FTDI's AN_184 document lists I/O pin behaviour of various FTDI chips including
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110 FT2232D and FT2232H; according to this document FT2232H I/O pins go through a
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111 brief phase of acting as UART signals (including RTS output on ADBUS2) while
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112 the EEPROM is being read, whereas FT2232D I/O pins are tristated during this
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113 time. Thus I strongly recommend using an FT2232D breakout board.
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114
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115 Programming the EEPROM
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116 ======================
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117
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118 The officially recommended FT2232D breakout boards from PLDkit have 93C46
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119 EEPROMs on them, and the boards are shipped with blank EEPROMs. The blank
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120 EEPROM state is perfectly good for operating the board as a dual UART, but our
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121 JTAG application calls for custom EEPROM programming. A number of people in
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122 the FOSS community have produced several different tools for programming FTDI
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123 EEPROMs, and you could even use FTDI's official Winblows tools if you like, but
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124 I am going to describe how to program the EEPROM using the tools which I
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125 developed and which are used in production here at Falconia Partners LLC.
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126
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127 To compile my FTDI EEPROM tools, go into the fteeprom directory and run make
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128 there; you will need to have libftdi (the classic one, not libftdi1) installed
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129 on your system. If all you seek to do is to program this one EEPROM, you don't
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130 need to install my tools system-wide - you can just run them from the directory
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131 where they are compiled.
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132
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133 If you have the FT2232D board in its initial blank-EEPROM state plugged into
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134 your system and you don't have any other FT2232x devices with 0403:6010 IDs,
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135 you can program the EEPROM for JTAG as follows - run this pipeline from the top
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136 directory of this code repository:
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137
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138 fteeprom/ftee-gen2232c eeproms/jtag-unbuf | fteeprom/fteeprom-prog i:0x0403:0x6010
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139
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140 Then unplug and replug the FT2232D board, and it should come back with the new
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141 0403:7151 USD ID. If you wish to bring it back to its original blank-EEPROM
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142 state, you can do so by erasing the EEPROM:
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143
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144 fteeprom-erase i:0x0403:0x7151
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145
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146 Wire connections
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147 ================
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148
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149 The JTAG signal connections to ADBUS0 through ADBUS3 are fixed by FTDI, and if
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150 you go against my advice and use FT2232H rather than FT2232C/D, then ADBUS7 is
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151 also reserved for RTCK. The I/O pins available for reset and other sideband or
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152 GPIO signals are ADBUS4 through ADBUS7 on FT2232C/D adapters, or ADBUS4 through
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153 ADBUS6 and ACBUS5 through ACBUS7 on FT2232H. The other pins should be left
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154 untouched to avoid problems with the 245 FIFO mode which is active in the time
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155 window between power-up (USB plug-in) and running OpenOCD.