FreeCalypso > hg > freecalypso-hwlab
view calypso-jtag/early-experiments/with-reset.cfg @ 149:451ed3bbfe96
fc-simtool: grcard1-set-adm[12] commands implemented
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 07 Feb 2021 00:01:55 +0000 |
parents | 240221552ecf |
children |
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# The Calypso target is connected to an unbuffered FT2232D adapter # acting as the JTAG interface following Mother Mychaela's method, # ADBUS7 is wired to the reset pin on TI's 14-pin connector. # # This config is an attempt (unsuccessful) to get OpenOCD's reset # infrastructure (including reset halt) to work with the very different # way of doing things on the Calypso. interface ftdi ftdi_vid_pid 0x0403 0x7151 ftdi_layout_init 0x0088 0x008b ftdi_layout_signal XDS_RESET -data 0x0080 -oe 0x0080 transport select jtag adapter_khz 6000 # Reset like the one produced by TI's original XDS510/560 adapters proc init_reset { mode } { ftdi_set_signal XDS_RESET 0 sleep 50 ftdi_set_signal XDS_RESET 1 sleep 10 jtag arp_init } if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME calypso } if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { set _CPUTAPID 0x3100e02f } jtag newtap $_CHIPNAME dsp -irlen 8 jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID set _TARGETNAME $_CHIPNAME.arm target create $_TARGETNAME arm7tdmi -endian little -chain-position $_TARGETNAME arm7_9 dbgrq enable proc calypso_magic {} { irscan calypso.arm 0x0b -endstate DRPAUSE drscan calypso.arm 2 2 -endstate RUN/IDLE } # watchdog disable with minimal finger strokes to make it in time proc wd {} { calypso.arm mwh 0xFFFFF804 0xF5 calypso.arm mwh 0xFFFFF804 0xA0 } $_TARGETNAME configure -event examine-start calypso_magic # deliberately empty procedure here, as init_reset already did the job $_TARGETNAME configure -event reset-assert { }