FreeCalypso > hg > freecalypso-reveng

annotate pirelli/undersim @ 200:492a6360e64d

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leo-obj/frame_na7_db_ir: disassemble frame.obj in order to bring to light the compiled form of that infamous TraceMask[0] = 0; line
author Space Falcon <falcon@ivan.Harhan.ORG>
date Sat, 06 Jun 2015 18:32:49 +0000
parents 7a84f9e42a84
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
9
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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1 There are 4 test points accessible from the battery compartment under the
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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2 SIM card slot. I shall number them as follows:
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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3
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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4 B
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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5 A (battery connector)
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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6 T
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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7
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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8 +-----+
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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9 | |
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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10 | SIM |
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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11 | |
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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12 +-----+
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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13 1 2 3 4
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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14
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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15 i.e., the test point closest to the headset jack shall be numbered 4.
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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16
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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17 TP 1 and TP 2 have tiny vias inside the TP pads themselves; these vias
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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18 appear to go no deeper than L2.
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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19
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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20 TP 1: on L2 it crosses over the tiny via coming from L1 to a larger via
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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21 that penetrates almost the entire layer stack. On L7 the latter via
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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22 connects to a trace. The latter trace runs at normal signal thickness
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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23 until it hits yet another via. On the other side of that via, still on
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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24 the same L7, there is a dead-end arm of what appears to be the same net,
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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25 and the latter arm is thick - almost as if it acts as an antenna of
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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26 some kind. From there the connections are unclear, but it appears to
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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27 connect a bunch of fat traces and possibly even copper fill on other
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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28 layers, so it's unlikely to be an interesting signal.
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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29
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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30 TP 2: on L2 it goes to a trace, that trace goes to another via at image
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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31 coords (4378,1746).
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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32
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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33 TP 3 connects to a via; that via appears to make a solid connection to
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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34 the copper flood-fill on L6.
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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35
7a84f9e42a84 Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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36 TP 4 is connected to the L1 GND copper fill with thermals.