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annotate leo-obj/tool/atcommon.c @ 393:6c31d8c54ae4

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se_k200i: preliminary analysis
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 06 Nov 2022 01:13:43 +0000
parents 87b82398a08b
children
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111
0f94d17899b3 tiobjd: disassembly integrated, no relocs or hints yet
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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1 /*
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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2 * Lean and mean ARM7TDMI disassembler
0f94d17899b3 tiobjd: disassembly integrated, no relocs or hints yet
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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3 * Written by Spacefalcon the Outlaw
0f94d17899b3 tiobjd: disassembly integrated, no relocs or hints yet
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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4 */
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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5
0f94d17899b3 tiobjd: disassembly integrated, no relocs or hints yet
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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6 /* a few disassembly bits common between ARM and Thumb */
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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7
0f94d17899b3 tiobjd: disassembly integrated, no relocs or hints yet
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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8 char *regnames[16] = {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
0f94d17899b3 tiobjd: disassembly integrated, no relocs or hints yet
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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9 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc"};
0f94d17899b3 tiobjd: disassembly integrated, no relocs or hints yet
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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10
0f94d17899b3 tiobjd: disassembly integrated, no relocs or hints yet
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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11 char *condition_decode[16] = {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
0f94d17899b3 tiobjd: disassembly integrated, no relocs or hints yet
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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12 "hi", "ls", "ge", "lt", "gt", "le", "", "INV"};
0f94d17899b3 tiobjd: disassembly integrated, no relocs or hints yet
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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13
0f94d17899b3 tiobjd: disassembly integrated, no relocs or hints yet
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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14 char *shift_types[4] = {"lsl", "lsr", "asr", "ror"};