FreeCalypso > hg > freecalypso-reveng
annotate pirelli/undersim @ 342:6ff231195905
fluid-mnf/serial.[ch]: beginning of Linux port
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 13 Mar 2020 05:39:37 +0000 |
parents | 7a84f9e42a84 |
children |
rev | line source |
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9
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
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1 There are 4 test points accessible from the battery compartment under the |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
2 SIM card slot. I shall number them as follows: |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
3 |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
4 B |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
5 A (battery connector) |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
6 T |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
7 |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
8 +-----+ |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
9 | | |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
10 | SIM | |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
11 | | |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
12 +-----+ |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
13 1 2 3 4 |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
14 |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
15 i.e., the test point closest to the headset jack shall be numbered 4. |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
16 |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
17 TP 1 and TP 2 have tiny vias inside the TP pads themselves; these vias |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
18 appear to go no deeper than L2. |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
19 |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
20 TP 1: on L2 it crosses over the tiny via coming from L1 to a larger via |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
21 that penetrates almost the entire layer stack. On L7 the latter via |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
22 connects to a trace. The latter trace runs at normal signal thickness |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
23 until it hits yet another via. On the other side of that via, still on |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
24 the same L7, there is a dead-end arm of what appears to be the same net, |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
25 and the latter arm is thick - almost as if it acts as an antenna of |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
26 some kind. From there the connections are unclear, but it appears to |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
27 connect a bunch of fat traces and possibly even copper fill on other |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
28 layers, so it's unlikely to be an interesting signal. |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
29 |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
30 TP 2: on L2 it goes to a trace, that trace goes to another via at image |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
31 coords (4378,1746). |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
32 |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
33 TP 3 connects to a via; that via appears to make a solid connection to |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
34 the copper flood-fill on L6. |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
35 |
7a84f9e42a84
Pirelli PCB: failed attempt at tracing out the 4 under-SIM test points
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
36 TP 4 is connected to the L1 GND copper fill with thermals. |