FreeCalypso > hg > freecalypso-reveng

annotate frbl/reconst/boot.c @ 373:754be25cd6a0

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new-aec-defaults: read out from the DSP
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 29 Jul 2021 09:48:50 +0000
parents 4e1d7ce0ee71
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
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1 /******************************************************************************
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2 * FLUID (Flash Loader Utility Independent of Device)
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3 *
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4 * (C) Delta Technologies 2001.
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5 * Cleanup, modifications and extensions by Mads Meisner-Jensen, mmj@ti.com.
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6 *
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7 * Target Bootloader
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8 *
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9 * $Id: boot.c 1.18 Mon, 28 Apr 2003 08:49:16 +0200 tsj $
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10 *
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11 ******************************************************************************/
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12
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13 #include "chipset.cfg"
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14 #include "target.h"
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16
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17 #define DEBUG_TRACE 0
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19
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20 // Protocol version of this bootloader
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21
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22 // Version 0: Original, unmodified Delta Technology Bootloader.
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23
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24 // Version 1: First Fluid Bootloader. 'B'audrate command and 'V'ersion
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25 // command. Backward compatibly with version 0.
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26
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27 // Version 2: 'H'ardware chipset query command. Debug/Trace
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28 // functionality. Backward compatibly with version 0, 1. Fixed bug where
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29 // IND$CALL was used to start command interpreter instead of private jump()
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30 // function
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31
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32 // Version 3: Generic 'Q'uery command. Discontinued 'H'ardware query command
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33 // from version 2.
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34
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35 #define BOOTLOADER_VERSION '3'
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37
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38 /******************************************************************************
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39 * Bootstrap/Init
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40 ******************************************************************************/
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41
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42 // Initialize stackpointer according to chipset. Note that we ALWAYS do
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43 // this, no matter if we were laoded with JTAG or if we were compiled-in.
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44
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45 #if (CHIPSET == 3)
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46 asm("STACK_INIT .equ 03000000h");
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47 asm("STACK_ADD .equ 00020000h ; 128kB");
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48 #elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11)
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49 asm("STACK_INIT .equ 00800000h");
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50 asm("STACK_ADD .equ 00020000h ; 128kB");
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51 #elif (CHIPSET == 12)
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52 asm("STACK_INIT .equ 08000000h");
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53 asm("STACK_ADD .equ 00020000h ; 128kB");
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54 #else
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55 #error Unknown target hardware selected
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56 #endif
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57
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58 #ifdef FLUID_BOOT_STAND_ALONE
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59 asm(" .def _c_int00 ");
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60 asm("_c_int00:");
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61 #endif
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62
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63 asm(" .state32 ");
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64 asm(" mov sp,#STACK_INIT");
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65 asm(" add sp,sp,#STACK_ADD");
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66 asm(" adr lr,start_end + 1 ; module end address with lsb set");
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67 asm(" bx lr ; branch to start");
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68 asm(" nop");
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69 asm("start_end:");
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70
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72
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73 /******************************************************************************
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74 * Main
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75 ******************************************************************************/
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76
318
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77 uint32 uart_base;
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78
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79 void jump(uint32, uint32);
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80
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81 static void putchar(uint8 ch);
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82 uint8 getchar(void);
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83 void uart_init(UBYTE dlh, UBYTE dll);
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84 void hardware_init(uint16 *code);
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85
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86 void fluid_bootloader(void)
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87 {
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88 uint8 ch;
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89 uint16 *mem;
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90 union32_t addr;
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91 union16_t size;
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92 union16_t data;
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93 uint8 uart_dlh, uart_dll;
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94 uint16 chip_id_code;
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95
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96 hardware_init(&chip_id_code);
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97
318
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98 uart_base = UART_BASE_MODEM;
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99 uart_init(0, 0x07); // baudrate = 115200kbps
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100 uart_base = UART_BASE_IRDA;
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101 uart_init(0, 0x07); // baudrate = 115200kbps
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102
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103 #ifdef TESTBOOT
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104 while (1) {
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105 uart_base = UART_BASE_MODEM;
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106 if ((REGISTER_8_READ(uart_base + UART_LSR) & STAT_RXRDY))
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107 break;
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108 uart_base = UART_BASE_IRDA;
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109 if ((REGISTER_8_READ(uart_base + UART_LSR) & STAT_RXRDY))
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110 break;
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111 }
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112 while (getchar() != 0xAA)
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113 ;
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114 while (getchar() != 0x01)
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115 ;
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116 while (getchar() != 0xDD)
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117 ;
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118 #endif
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119
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120 while (1) {
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121 uart_base = UART_BASE_MODEM;
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122 putchar(PROTO_HELLO);
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diff changeset
123 if ((REGISTER_8_READ(uart_base + UART_LSR) & STAT_RXRDY))
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 break;
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
125 uart_base = UART_BASE_IRDA;
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 putchar(PROTO_HELLO);
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
127 if ((REGISTER_8_READ(uart_base + UART_LSR) & STAT_RXRDY))
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 break;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 }
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 while (1) {
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 ch = getchar();
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 switch (ch) {
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 case PROTO_VERSION:
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 putchar(BOOTLOADER_VERSION);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 break;
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
136 /* FreeCalypso reconstruction of TCS211 boot.obj */
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
137 case PROTO_HARDWARE:
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
138 putchar('0');
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
139 break;
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
140 /* end FC reconstruction */
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 case PROTO_QUERY:
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 ch = getchar();
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 if (ch == PROTO_QUERY_CHIP) {
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 data.i = chip_id_code;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 putchar(data.b[0]);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 putchar(data.b[1]);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 putchar(0);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 putchar(0);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 }
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 else {
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 putchar(PROTO_ERROR);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 }
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 break;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 case PROTO_BAUDRATE:
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 ch = getchar(); // Get DLH
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156 case 0:
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 uart_init(ch, getchar());
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 break;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 case PROTO_DOWNLOAD:
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 addr.b[0] = getchar();
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 addr.b[1] = getchar();
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 addr.b[2] = getchar();
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 addr.b[3] = getchar();
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 size.b[0] = getchar();
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 size.b[1] = getchar();
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 putchar(PROTO_READY);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 mem = (uint16 *) addr.i;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 while (size.i--) {
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 // Data bytes arrive in reverse order due to little endian mode
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 data.b[1] = getchar();
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 data.b[0] = getchar();
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 *mem++ = data.i;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 }
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 #if DEBUG_TRACE
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 // Insert convenient tracing here...
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 #endif
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 // Start the program we loaded.
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
179 jump(uart_base, addr.i);
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 break;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 default:
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 putchar(PROTO_ERROR);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 }
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 }
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 }
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 // Little assembly function that makes a jump to the address/argument,
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 // similar to the compiler's IND$CALL. We do not use the compiler's IND$CALL
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 // because when we compile for non-standalone, IND$CALL is already
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 // defined. We expect that the base address of the UART is in R0, so it can
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 // be properly passed on to the command interpreter.
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 asm("$jump:");
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 asm(" bx r1");
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
195 static void putchar(uint8 ch)
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 {
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
197 PUTCHAR_FUNCTION_CODE(uart_base)
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 }
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 uint8 getchar(void)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 {
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
202 GETCHAR_FUNCTION_CODE(uart_base)
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 }
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 /******************************************************************************
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 * Initialization
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 ******************************************************************************/
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 #if (CHIPSET == 3)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 #define IQ_MASK (0xFFFFFA02) /* Mask Interrupt Register */
316
2ceb1f263e19 frbl/reconst: first attempt to compile boot.c
Mychaela Falconia <falcon@freecalypso.org>
parents: 315
diff changeset
211 #elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11) \
2ceb1f263e19 frbl/reconst: first attempt to compile boot.c
Mychaela Falconia <falcon@freecalypso.org>
parents: 315
diff changeset
212 || (CHIPSET == 12)
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 #define IQ_MASK1 (0xFFFFFA08) /* Mask Interrupt Register 1 */
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 #define IQ_MASK2 (0xFFFFFA0A) /* Mask Interrupt Register 2 */
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 #else
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 #error Unknown target hardware selected
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 #endif
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218
317
c71e3156170a frbl/reconst: boot.c passes compilation
Mychaela Falconia <falcon@freecalypso.org>
parents: 316
diff changeset
219 /* FreeCalypso reconstruction: definition missing from TCS211 target.h */
c71e3156170a frbl/reconst: boot.c passes compilation
Mychaela Falconia <falcon@freecalypso.org>
parents: 316
diff changeset
220 #define CHIP_ID_CODE 0xFFFEF000
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 void hardware_init(uint16 *chip_id_code)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 {
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 uint16 clk;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 char chip_set = 0;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 // We read the chipset version directly from the hardware because
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 // otherwise the stand-alone bootloader (to be downloaded with JTAG) is
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 // obviously not target independent!
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 *chip_id_code = *((volatile uint16 *) CHIP_ID_CODE);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233 // We should only intialize the hardware if we were downloaded with JTAG
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 #ifdef FLUID_BOOT_STAND_ALONE
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 // FIXME: we should perhaps have different init depending on chipset
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 // detected?
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 // Mask all interrupts
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 #if (CHIPSET == 3)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 *((volatile uint16 *) IQ_MASK) = 0xFFFF;
316
2ceb1f263e19 frbl/reconst: first attempt to compile boot.c
Mychaela Falconia <falcon@freecalypso.org>
parents: 315
diff changeset
243 #elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11)
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 *((volatile uint16 *) IQ_MASK1) = 0xFFFF;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 *((volatile uint16 *) IQ_MASK2) = 0x001F;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 #elif (CHIPSET == 12)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 *((volatile uint16 *) IQ_MASK1) = 0xFFFF;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
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248 *((volatile uint16 *) IQ_MASK2) = 0xFFFF; //BJO Check IRQ_29_MSK - should it be 0 ?
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
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parents:
diff changeset
249 #endif
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250
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
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251 // Disable watchdog timer
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 *((volatile uint16 *) WATCHDOG_TIM_MODE) = 0xF5;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
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253 *((volatile uint16 *) WATCHDOG_TIM_MODE) = 0xA0;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 #if (CHIPSET == 12) //BJO Check this (documented?)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
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parents:
diff changeset
255 *((volatile uint16 *) WATCHDOG_TIM_MODE+80) = 0xF5; // Secure watchdog CALPLUS
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256 *((volatile uint16 *) WATCHDOG_TIM_MODE+80) = 0xA0; // Secure watchdog CALPLUS
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257 #endif
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258
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
259
316
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diff changeset
260 #if (CHIPSET == 3) || (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11)
315
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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261 // FIXME: Describe exactly how the CSs are initialized
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
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parents:
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262 *((volatile uint16 *) CS0_MEM_REG) = 0x2A1;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
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263 *((volatile uint16 *) CS1_MEM_REG) = 0x2A1;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 *((volatile uint16 *) CS2_MEM_REG) = 0x2A1;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
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265 *((volatile uint16 *) CS3_MEM_REG) = 0x283;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
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266 *((volatile uint16 *) CS4_MEM_REG) = 0x283;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 *((volatile uint16 *) CS6_MEM_REG) = 0x2C0;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
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268 #elif (CHIPSET == 12)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
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269 *((volatile uint16 *) CS0_MEM_REG) = 0x2A3; //*BJO Check these settings
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
270 *((volatile uint16 *) CS1_MEM_REG) = 0x2A3;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 *((volatile uint16 *) CS2_MEM_REG) = 0x2A3;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272 *((volatile uint16 *) CS3_MEM_REG) = 0x2A3;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
273 *((volatile uint16 *) CS4_MEM_REG) = 0x2A3;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
274 *((volatile uint16 *) CS5_MEM_REG) = 0x2A3;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
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parents:
diff changeset
275 #endif
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
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276
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
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277
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
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diff changeset
278 #if (CHIPSET == 3)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
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279 clk = *(volatile uint16 *) CLKM_CNTL_ARM_CLK;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280 clk &= ~(0x0C | 0x30);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
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281 clk |= (2 << 4);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282 *(volatile uint16 *) CLKM_CNTL_ARM_CLK = clk;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283
316
2ceb1f263e19 frbl/reconst: first attempt to compile boot.c
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diff changeset
284 #elif (CHIPSET == 7 || CHIPSET == 8 || CHIPSET == 10 || CHIPSET == 11)
315
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285
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
286 // Reset DPLL register
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
287 * (volatile uint16 *) MEM_DPLL_ADDR = DPLL_RESET_VALUE;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
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288
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
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parents:
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289 // Wait that DPLL is in BYPASS mode
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
290 while (((* (volatile uint16 *) MEM_DPLL_ADDR) & 1) != 1)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
291 ;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
292
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
293 // Reset CLKM register
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
294 *(volatile uint16 *) MEM_CLKM_ADDR = CLKM_CNTL_ARM_CLK_RST;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
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295
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
296 #elif (CHIPSET == 12)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
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297
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
298 *((volatile uint8*)CTNL_CLK) = 0x91; // Make sure we are set to 26MHz mode (div 2) // CALPLUS
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
299 *((volatile uint16 *) MEM_DPLL_ADDR) = 0x6012 | (8<<7) | (1<<5); // multiplyer=8, divider=2 (-1) 52MHz!!! // CALPLUS
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
300 // Wait that DPLL is locked
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
301 while (((* (volatile unsigned short *) MEM_DPLL_ADDR) & 1) != 1) ; // CALPLUS
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
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diff changeset
302
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
303 #endif
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
304
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
305
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
306 #endif // ifdef FLUID_BOOT_STAND_ALONE
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
307 }
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
308
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
309 void uart_init(uint8 my_dlh, uint8 my_dll)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
310 {
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
311 uint8 ch;
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
312
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
313 /*
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
314 * Transition from the DSP Rhea bus to the MCU Rhea bus.
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
315 */
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
316 BIT_SET (UART_UIR, UART_MASK_IT);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
317 BIT_CLR (UART_UIR, UART_ACCESS);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
318 BIT_CLR (UART_UIR, UART_MASK_IT);
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
319
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
320 /*
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
321 * Set the UART in reset mode.
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
322 */
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
323 REGISTER_8_WRITE(uart_base + UART_MDR1, CMD_UART_RESET);
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
324
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
325 /*
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
326 * FIFO configuration
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
327 */
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
328 REGISTER_8_WRITE(uart_base + UART_LCR, CMD_EFR_EN);
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
329 BIT_SET (uart_base + UART_EFR, ENHANCED_EN);
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
330 REGISTER_8_WRITE(uart_base + UART_LCR, CMD_FCR_MCR_EN);
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
331 REGISTER_8_WRITE(uart_base + UART_FCR, CMD_FIFO_EN);
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
332
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
333 /*
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
334 * Speed configuration
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
335 */
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
336 REGISTER_8_WRITE(uart_base + UART_LCR, CMD_EFR_EN);
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
337 REGISTER_8_WRITE(uart_base + UART_DLL, my_dll);
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
338 REGISTER_8_WRITE(uart_base + UART_DLH, my_dlh);
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
339
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
340 /*
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
341 * Character format configuration
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
342 */
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
343 REGISTER_8_WRITE(uart_base + UART_LCR, CMD_CHAR8_STOP1_NOPAR);
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
344
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
345 /*
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
346 * Modem configuration
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
347 */
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
348 REGISTER_8_WRITE(uart_base + UART_MDR1, CMD_UART_MODE);
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
349
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
350 /*
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
351 * Flush Rx buffer
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
352 */
318
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
353 while ((REGISTER_8_READ(uart_base + UART_LSR) & STAT_RXRDY))
4e1d7ce0ee71 frbl/reconst/boot.c: perfect match to TCS211 boot.obj
Mychaela Falconia <falcon@freecalypso.org>
parents: 317
diff changeset
354 ch = (REGISTER_8_READ(uart_base + UART_RHR));
315
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
355 }
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
356
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
357
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
358 /******************************************************************************
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
359 * Debug
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
360 ******************************************************************************/
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
361
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
362 #if (DEBUG_TRACE == 1)
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
363 #include "debug.c"
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
364 #endif
bc3391aa3d35 frbl/reconst/boot.c: import from TI's FLUID package
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
365