FreeCalypso > hg > freecalypso-reveng
comparison dsample-fw-disasm @ 299:1a8300df2a02
dsample-fw-disasm: found l1_drive and tpudrv modules
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sat, 05 Oct 2019 07:56:47 +0000 |
parents | b7d93ff628a8 |
children | 74ebb63948d2 |
comparison
equal
deleted
inserted
replaced
298:84e5c88343e0 | 299:1a8300df2a02 |
---|---|
1985 80542c: 00000001 | 1985 80542c: 00000001 |
1986 805430: 00000004 | 1986 805430: 00000004 |
1987 805434: 00000080 | 1987 805434: 00000080 |
1988 805438: 00150304 | 1988 805438: 00150304 |
1989 80543c: 00000001 | 1989 80543c: 00000001 |
1990 | |
1991 $l1ddsp_load_info: | |
1992 80568c: b530 push {r4, r5, lr} | |
1993 80568e: 280a cmp r0, #10 ; 0xa | |
1994 805690: d036 beq 0x805700 | |
1995 805692: 2001 mov r0, #1 | |
1996 805694: 03c0 lsl r0, r0, #15 | |
1997 805696: 8008 strh r0, [r1, #0] | |
1998 805698: 2000 mov r0, #0 | |
1999 80569a: 8048 strh r0, [r1, #2] | |
2000 80569c: 8088 strh r0, [r1, #4] | |
2001 80569e: 48d7 ldr r0, =0x83cdac ; via 0x8059fc | |
2002 8056a0: 6800 ldr r0, [r0, #0] | |
2003 8056a2: 2315 mov r3, #21 ; 0x15 | |
2004 8056a4: 015b lsl r3, r3, #5 | |
2005 8056a6: 181b add r3, r3, r0 | |
2006 8056a8: 4299 cmp r1, r3 | |
2007 8056aa: d017 beq 0x8056dc | |
2008 8056ac: 30ff add r0, #255 ; 0xff | |
2009 8056ae: 3035 add r0, #53 ; 0x35 | |
2010 8056b0: 4281 cmp r1, r0 | |
2011 8056b2: d013 beq 0x8056dc | |
2012 8056b4: 2000 mov r0, #0 | |
2013 8056b6: 2303 mov r3, #3 | |
2014 8056b8: 1884 add r4, r0, r2 | |
2015 8056ba: 7864 ldrb r4, [r4, #1] | |
2016 8056bc: 0224 lsl r4, r4, #8 | |
2017 8056be: 5c85 ldrb r5, [r0, r2] | |
2018 8056c0: 432c orr r4, r5 | |
2019 8056c2: 005d lsl r5, r3, #1 | |
2020 8056c4: 534c strh r4, [r1, r5] | |
2021 8056c6: 1c80 add r0, r0, #2 | |
2022 8056c8: 0600 lsl r0, r0, #24 | |
2023 8056ca: 0e00 lsr r0, r0, #24 | |
2024 8056cc: 1c5b add r3, r3, #1 | |
2025 8056ce: 061b lsl r3, r3, #24 | |
2026 8056d0: 0e1b lsr r3, r3, #24 | |
2027 8056d2: 2b0e cmp r3, #14 ; 0xe | |
2028 8056d4: dbf0 blt 0x8056b8 | |
2029 8056d6: 7d90 ldrb r0, [r2, #22] ; 0x16 | |
2030 8056d8: 8388 strh r0, [r1, #28] ; 0x1c | |
2031 8056da: bd30 pop {r4, r5, pc} | |
2032 8056dc: 2300 mov r3, #0 | |
2033 8056de: 2003 mov r0, #3 | |
2034 8056e0: 189c add r4, r3, r2 | |
2035 8056e2: 7864 ldrb r4, [r4, #1] | |
2036 8056e4: 0224 lsl r4, r4, #8 | |
2037 8056e6: 5c9d ldrb r5, [r3, r2] | |
2038 8056e8: 432c orr r4, r5 | |
2039 8056ea: 0045 lsl r5, r0, #1 | |
2040 8056ec: 534c strh r4, [r1, r5] | |
2041 8056ee: 1c9b add r3, r3, #2 | |
2042 8056f0: 061b lsl r3, r3, #24 | |
2043 8056f2: 0e1b lsr r3, r3, #24 | |
2044 8056f4: 1c40 add r0, r0, #1 | |
2045 8056f6: 0600 lsl r0, r0, #24 | |
2046 8056f8: 0e00 lsr r0, r0, #24 | |
2047 8056fa: 2812 cmp r0, #18 ; 0x12 | |
2048 8056fc: dbf0 blt 0x8056e0 | |
2049 8056fe: bd30 pop {r4, r5, pc} | |
2050 805700: 7850 ldrb r0, [r2, #1] | |
2051 805702: 0200 lsl r0, r0, #8 | |
2052 805704: 7812 ldrb r2, [r2, #0] | |
2053 805706: 4310 orr r0, r2 | |
2054 805708: 8008 strh r0, [r1, #0] | |
2055 80570a: bd30 pop {r4, r5, pc} | |
2056 | |
2057 $l1ddsp_load_monit_task: | |
2058 80570c: 4af2 ldr r2, =0x83cda0 ; via 0x805ad8 | |
2059 80570e: 6893 ldr r3, [r2, #8] | |
2060 805710: 8118 strh r0, [r3, #8] | |
2061 805712: 48f2 ldr r0, =0x83db44 ; via 0x805adc | |
2062 805714: 6800 ldr r0, [r0, #0] | |
2063 805716: 2801 cmp r0, #1 | |
2064 805718: d004 beq 0x805724 | |
2065 80571a: 214a mov r1, #74 ; 0x4a | |
2066 80571c: 68d2 ldr r2, [r2, #12] ; 0xc | |
2067 80571e: 2001 mov r0, #1 | |
2068 805720: 5288 strh r0, [r1, r2] | |
2069 805722: 4770 bx lr | |
2070 805724: 234a mov r3, #74 ; 0x4a | |
2071 805726: 68d0 ldr r0, [r2, #12] ; 0xc | |
2072 805728: 5219 strh r1, [r3, r0] | |
2073 80572a: 4770 bx lr | |
2074 | |
2075 $l1ddsp_load_afc: | |
2076 80572c: 49ea ldr r1, =0x83cda0 ; via 0x805ad8 | |
2077 80572e: 688a ldr r2, [r1, #8] | |
2078 805730: 83d0 strh r0, [r2, #30] ; 0x1e | |
2079 805732: 6888 ldr r0, [r1, #8] | |
2080 805734: 3016 add r0, #22 ; 0x16 | |
2081 805736: 2110 mov r1, #16 ; 0x10 | |
2082 805738: 8802 ldrh r2, [r0, #0] | |
2083 80573a: 4311 orr r1, r2 | |
2084 80573c: 8001 strh r1, [r0, #0] | |
2085 80573e: 4770 bx lr | |
2086 | |
2087 $l1ddsp_load_txpwr: | |
2088 805740: b5f0 push {r4, r5, r6, r7, lr} | |
2089 805742: 4642 mov r2, r8 | |
2090 805744: b404 push {r2} | |
2091 805746: 4688 mov r8, r1 | |
2092 805748: 1c04 add r4, r0, #0 | |
2093 80574a: 4df1 ldr r5, =0x83cdb4 ; via 0x805b10 | |
2094 80574c: 203d mov r0, #61 ; 0x3d | |
2095 80574e: 5d40 ldrb r0, [r0, r5] | |
2096 805750: 2800 cmp r0, #0 | |
2097 805752: d113 bne 0x80577c | |
2098 805754: 4ee0 ldr r6, =0x83cda0 ; via 0x805ad8 | |
2099 805756: 2072 mov r0, #114 ; 0x72 | |
2100 805758: 5b41 ldrh r1, [r0, r5] | |
2101 80575a: 68b0 ldr r0, [r6, #8] | |
2102 80575c: 8381 strh r1, [r0, #28] ; 0x1c | |
2103 80575e: 68f0 ldr r0, [r6, #12] ; 0xc | |
2104 805760: 30ff add r0, #255 ; 0xff | |
2105 805762: 30dd add r0, #221 ; 0xdd | |
2106 805764: 1c21 add r1, r4, #0 | |
2107 805766: 1c22 add r2, r4, #0 | |
2108 805768: 4643 mov r3, r8 | |
2109 80576a: f7fe f9be bl 0x803aea | |
2110 80576e: 68b0 ldr r0, [r6, #8] | |
2111 805770: 3016 add r0, #22 ; 0x16 | |
2112 805772: 210d mov r1, #13 ; 0xd | |
2113 805774: 8802 ldrh r2, [r0, #0] | |
2114 805776: 4311 orr r1, r2 | |
2115 805778: 8001 strh r1, [r0, #0] | |
2116 80577a: e069 b 0x805850 | |
2117 80577c: 7828 ldrb r0, [r5, #0] | |
2118 80577e: 2805 cmp r0, #5 | |
2119 805780: d003 beq 0x80578a | |
2120 805782: 2806 cmp r0, #6 | |
2121 805784: d001 beq 0x80578a | |
2122 805786: 2808 cmp r0, #8 | |
2123 805788: d102 bne 0x805790 | |
2124 80578a: 68e8 ldr r0, [r5, #12] ; 0xc | |
2125 80578c: 4580 cmp r8, r0 | |
2126 80578e: d201 bcs 0x805794 | |
2127 805790: 2701 mov r7, #1 | |
2128 805792: e000 b 0x805796 | |
2129 805794: 2702 mov r7, #2 | |
2130 805796: 2cff cmp r4, #255 ; 0xff | |
2131 805798: d04d beq 0x805836 | |
2132 80579a: 1c20 add r0, r4, #0 | |
2133 80579c: 4641 mov r1, r8 | |
2134 80579e: f7fe f9dd bl 0x803b5c | |
2135 8057a2: 4ecd ldr r6, =0x83cda0 ; via 0x805ad8 | |
2136 8057a4: 2112 mov r1, #18 ; 0x12 | |
2137 8057a6: 0180 lsl r0, r0, #6 | |
2138 8057a8: 4301 orr r1, r0 | |
2139 8057aa: 68b0 ldr r0, [r6, #8] | |
2140 8057ac: 8381 strh r1, [r0, #28] ; 0x1c | |
2141 8057ae: 20c0 mov r0, #192 ; 0xc0 | |
2142 8057b0: 5d40 ldrb r0, [r0, r5] | |
2143 8057b2: 2800 cmp r0, #0 | |
2144 8057b4: d00e beq 0x8057d4 | |
2145 8057b6: 20cd mov r0, #205 ; 0xcd | |
2146 8057b8: 5d40 ldrb r0, [r0, r5] | |
2147 8057ba: 0840 lsr r0, r0, #1 | |
2148 8057bc: d30a bcc 0x8057d4 | |
2149 8057be: 2100 mov r1, #0 | |
2150 8057c0: 48e0 ldr r0, =0x83cd9c ; via 0x805b44 | |
2151 8057c2: 7800 ldrb r0, [r0, #0] | |
2152 8057c4: 42a0 cmp r0, r4 | |
2153 8057c6: d000 beq 0x8057ca | |
2154 8057c8: 2101 mov r1, #1 | |
2155 8057ca: 20d1 mov r0, #209 ; 0xd1 | |
2156 8057cc: 5d40 ldrb r0, [r0, r5] | |
2157 8057ce: 4308 orr r0, r1 | |
2158 8057d0: 2800 cmp r0, #0 | |
2159 8057d2: d11b bne 0x80580c | |
2160 8057d4: 48dc ldr r0, =0x83c738 ; via 0x805b48 | |
2161 8057d6: 49dd ldr r1, =0x664 ; via 0x805b4c | |
2162 8057d8: 5c09 ldrb r1, [r1, r0] | |
2163 8057da: 42a1 cmp r1, r4 | |
2164 8057dc: d103 bne 0x8057e6 | |
2165 8057de: 49dc ldr r1, =0x83bbf4 ; via 0x805b50 | |
2166 8057e0: 7809 ldrb r1, [r1, #0] | |
2167 8057e2: 42b9 cmp r1, r7 | |
2168 8057e4: d034 beq 0x805850 | |
2169 8057e6: 49d9 ldr r1, =0x664 ; via 0x805b4c | |
2170 8057e8: 540c strb r4, [r1, r0] | |
2171 8057ea: 48d9 ldr r0, =0x83bbf4 ; via 0x805b50 | |
2172 8057ec: 7007 strb r7, [r0, #0] | |
2173 8057ee: 68f0 ldr r0, [r6, #12] ; 0xc | |
2174 8057f0: 30ff add r0, #255 ; 0xff | |
2175 8057f2: 30dd add r0, #221 ; 0xdd | |
2176 8057f4: 1c21 add r1, r4, #0 | |
2177 8057f6: 1c22 add r2, r4, #0 | |
2178 8057f8: 4643 mov r3, r8 | |
2179 8057fa: f7fe f976 bl 0x803aea | |
2180 8057fe: 68b0 ldr r0, [r6, #8] | |
2181 805800: 3016 add r0, #22 ; 0x16 | |
2182 805802: 210d mov r1, #13 ; 0xd | |
2183 805804: 8802 ldrh r2, [r0, #0] | |
2184 805806: 4311 orr r1, r2 | |
2185 805808: 8001 strh r1, [r0, #0] | |
2186 80580a: e021 b 0x805850 | |
2187 80580c: 68f0 ldr r0, [r6, #12] ; 0xc | |
2188 80580e: 30ff add r0, #255 ; 0xff | |
2189 805810: 30dd add r0, #221 ; 0xdd | |
2190 805812: 1c21 add r1, r4, #0 | |
2191 805814: 1c22 add r2, r4, #0 | |
2192 805816: 4643 mov r3, r8 | |
2193 805818: f7fe f967 bl 0x803aea | |
2194 80581c: 68b0 ldr r0, [r6, #8] | |
2195 80581e: 3016 add r0, #22 ; 0x16 | |
2196 805820: 2105 mov r1, #5 | |
2197 805822: 8802 ldrh r2, [r0, #0] | |
2198 805824: 4311 orr r1, r2 | |
2199 805826: 8001 strh r1, [r0, #0] | |
2200 805828: 48c7 ldr r0, =0x83c738 ; via 0x805b48 | |
2201 80582a: 49c8 ldr r1, =0x664 ; via 0x805b4c | |
2202 80582c: 540c strb r4, [r1, r0] | |
2203 80582e: 21d1 mov r1, #209 ; 0xd1 | |
2204 805830: 2000 mov r0, #0 | |
2205 805832: 5548 strb r0, [r1, r5] | |
2206 805834: e00c b 0x805850 | |
2207 805836: 48a8 ldr r0, =0x83cda0 ; via 0x805ad8 | |
2208 805838: 6881 ldr r1, [r0, #8] | |
2209 80583a: 2212 mov r2, #18 ; 0x12 | |
2210 80583c: 838a strh r2, [r1, #28] ; 0x1c | |
2211 80583e: 6880 ldr r0, [r0, #8] | |
2212 805840: 3016 add r0, #22 ; 0x16 | |
2213 805842: 210d mov r1, #13 ; 0xd | |
2214 805844: 8802 ldrh r2, [r0, #0] | |
2215 805846: 4311 orr r1, r2 | |
2216 805848: 8001 strh r1, [r0, #0] | |
2217 80584a: 49be ldr r1, =0x83cd9c ; via 0x805b44 | |
2218 80584c: 20ff mov r0, #255 ; 0xff | |
2219 80584e: 7008 strb r0, [r1, #0] | |
2220 805850: bc04 pop {r2} | |
2221 805852: 4690 mov r8, r2 | |
2222 805854: bdf0 pop {r4, r5, r6, r7, pc} | |
2223 | |
2224 $l1ddsp_load_rx_task: | |
2225 805856: b510 push {r4, lr} | |
2226 805858: 4b9f ldr r3, =0x83cda0 ; via 0x805ad8 | |
2227 80585a: 689c ldr r4, [r3, #8] | |
2228 80585c: 8020 strh r0, [r4, #0] | |
2229 80585e: 6898 ldr r0, [r3, #8] | |
2230 805860: 8041 strh r1, [r0, #2] | |
2231 805862: 6898 ldr r0, [r3, #8] | |
2232 805864: 3020 add r0, #32 ; 0x20 | |
2233 805866: 8801 ldrh r1, [r0, #0] | |
2234 805868: 4311 orr r1, r2 | |
2235 80586a: 8001 strh r1, [r0, #0] | |
2236 80586c: bd10 pop {r4, pc} | |
2237 | |
2238 $l1ddsp_load_tx_task: | |
2239 80586e: b510 push {r4, lr} | |
2240 805870: 4b99 ldr r3, =0x83cda0 ; via 0x805ad8 | |
2241 805872: 689c ldr r4, [r3, #8] | |
2242 805874: 80a0 strh r0, [r4, #4] | |
2243 805876: 6898 ldr r0, [r3, #8] | |
2244 805878: 80c1 strh r1, [r0, #6] | |
2245 80587a: 6898 ldr r0, [r3, #8] | |
2246 80587c: 3020 add r0, #32 ; 0x20 | |
2247 80587e: 8801 ldrh r1, [r0, #0] | |
2248 805880: 4311 orr r1, r2 | |
2249 805882: 8001 strh r1, [r0, #0] | |
2250 805884: bd10 pop {r4, pc} | |
2251 | |
2252 $l1ddsp_load_ra_task: | |
2253 805886: 49dc ldr r1, =0x83cda8 ; via 0x805bf8 | |
2254 805888: 6809 ldr r1, [r1, #0] | |
2255 80588a: 81c8 strh r0, [r1, #14] ; 0xe | |
2256 80588c: 4770 bx lr | |
2257 | |
2258 $l1ddsp_load_tch_mode: | |
2259 80588e: 4a5b ldr r2, =0x83cdac ; via 0x8059fc | |
2260 805890: 6812 ldr r2, [r2, #0] | |
2261 805892: 0089 lsl r1, r1, #2 | |
2262 805894: 88d3 ldrh r3, [r2, #6] | |
2263 805896: 041b lsl r3, r3, #16 | |
2264 805898: 0cdb lsr r3, r3, #19 | |
2265 80589a: 00db lsl r3, r3, #3 | |
2266 80589c: 4319 orr r1, r3 | |
2267 80589e: 4301 orr r1, r0 | |
2268 8058a0: 80d1 strh r1, [r2, #6] | |
2269 8058a2: 4770 bx lr | |
2270 | |
2271 8058a4: 4af3 ldr r2, =0x2d6 ; via 0x805c74 | |
2272 8058a6: 4955 ldr r1, =0x83cdac ; via 0x8059fc | |
2273 8058a8: 6809 ldr r1, [r1, #0] | |
2274 8058aa: 5250 strh r0, [r2, r1] | |
2275 8058ac: 4770 bx lr | |
2276 | |
2277 $l1ddsp_load_tch_param: | |
2278 8058ae: b5f0 push {r4, r5, r6, r7, lr} | |
2279 8058b0: 4644 mov r4, r8 | |
2280 8058b2: 464d mov r5, r9 | |
2281 8058b4: 4656 mov r6, r10 | |
2282 8058b6: b470 push {r4, r5, r6} | |
2283 8058b8: af08 add r7, sp, #32 ; 0x20 | |
2284 8058ba: 1c0d add r5, r1, #0 | |
2285 8058bc: 4682 mov r10, r0 | |
2286 8058be: 4694 mov r12, r2 | |
2287 8058c0: 787e ldrb r6, [r7, #1] | |
2288 8058c2: 783a ldrb r2, [r7, #0] | |
2289 8058c4: 7981 ldrb r1, [r0, #6] | |
2290 8058c6: 79c0 ldrb r0, [r0, #7] | |
2291 8058c8: 0140 lsl r0, r0, #5 | |
2292 8058ca: 4301 orr r1, r0 | |
2293 8058cc: 4689 mov r9, r1 | |
2294 8058ce: 4650 mov r0, r10 | |
2295 8058d0: 8880 ldrh r0, [r0, #4] | |
2296 8058d2: 4680 mov r8, r0 | |
2297 8058d4: 4c80 ldr r4, =0x83cda0 ; via 0x805ad8 | |
2298 8058d6: 4650 mov r0, r10 | |
2299 8058d8: 6800 ldr r0, [r0, #0] | |
2300 8058da: 2168 mov r1, #104 ; 0x68 | |
2301 8058dc: f00e f9fe bl 0x813cdc | |
2302 8058e0: 0201 lsl r1, r0, #8 | |
2303 8058e2: 4650 mov r0, r10 | |
2304 8058e4: 7a40 ldrb r0, [r0, #9] | |
2305 8058e6: 4301 orr r1, r0 | |
2306 8058e8: 68a0 ldr r0, [r4, #8] | |
2307 8058ea: 8201 strh r1, [r0, #16] ; 0x10 | |
2308 8058ec: 68a1 ldr r1, [r4, #8] | |
2309 8058ee: 4648 mov r0, r9 | |
2310 8058f0: 8308 strh r0, [r1, #24] ; 0x18 | |
2311 8058f2: 68a1 ldr r1, [r4, #8] | |
2312 8058f4: 4640 mov r0, r8 | |
2313 8058f6: 8348 strh r0, [r1, #26] ; 0x1a | |
2314 8058f8: 00d8 lsl r0, r3, #3 | |
2315 8058fa: 4240 neg r0, r0 | |
2316 8058fc: 4310 orr r0, r2 | |
2317 8058fe: 00c0 lsl r0, r0, #3 | |
2318 805900: 4330 orr r0, r6 | |
2319 805902: 0040 lsl r0, r0, #1 | |
2320 805904: 4330 orr r0, r6 | |
2321 805906: 0100 lsl r0, r0, #4 | |
2322 805908: 4661 mov r1, r12 | |
2323 80590a: 4308 orr r0, r1 | |
2324 80590c: 0100 lsl r0, r0, #4 | |
2325 80590e: 4328 orr r0, r5 | |
2326 805910: 68a1 ldr r1, [r4, #8] | |
2327 805912: 8248 strh r0, [r1, #18] ; 0x12 | |
2328 805914: bc70 pop {r4, r5, r6} | |
2329 805916: 46a0 mov r8, r4 | |
2330 805918: 46a9 mov r9, r5 | |
2331 80591a: 46b2 mov r10, r6 | |
2332 80591c: bdf0 pop {r4, r5, r6, r7, pc} | |
2333 | |
2334 $l1ddsp_load_ciph_param: | |
2335 80591e: b530 push {r4, r5, lr} | |
2336 805920: 4a6d ldr r2, =0x83cda0 ; via 0x805ad8 | |
2337 805922: 23ff mov r3, #255 ; 0xff | |
2338 805924: 33cf add r3, #207 ; 0xcf | |
2339 805926: 68d4 ldr r4, [r2, #12] ; 0xc | |
2340 805928: 5318 strh r0, [r3, r4] | |
2341 80592a: 4cd3 ldr r4, =0x2ce ; via 0x805c78 | |
2342 80592c: 68d3 ldr r3, [r2, #12] ; 0xc | |
2343 80592e: 7848 ldrb r0, [r1, #1] | |
2344 805930: 0200 lsl r0, r0, #8 | |
2345 805932: 780d ldrb r5, [r1, #0] | |
2346 805934: 4328 orr r0, r5 | |
2347 805936: 52e0 strh r0, [r4, r3] | |
2348 805938: 202d mov r0, #45 ; 0x2d | |
2349 80593a: 0103 lsl r3, r0, #4 | |
2350 80593c: 68d5 ldr r5, [r2, #12] ; 0xc | |
2351 80593e: 78c8 ldrb r0, [r1, #3] | |
2352 805940: 0200 lsl r0, r0, #8 | |
2353 805942: 788c ldrb r4, [r1, #2] | |
2354 805944: 4320 orr r0, r4 | |
2355 805946: 5358 strh r0, [r3, r5] | |
2356 805948: 4ccc ldr r4, =0x2d2 ; via 0x805c7c | |
2357 80594a: 68d5 ldr r5, [r2, #12] ; 0xc | |
2358 80594c: 7948 ldrb r0, [r1, #5] | |
2359 80594e: 0200 lsl r0, r0, #8 | |
2360 805950: 790b ldrb r3, [r1, #4] | |
2361 805952: 4318 orr r0, r3 | |
2362 805954: 5360 strh r0, [r4, r5] | |
2363 805956: 20b5 mov r0, #181 ; 0xb5 | |
2364 805958: 0080 lsl r0, r0, #2 | |
2365 80595a: 68d3 ldr r3, [r2, #12] ; 0xc | |
2366 80595c: 79ca ldrb r2, [r1, #7] | |
2367 80595e: 0212 lsl r2, r2, #8 | |
2368 805960: 7989 ldrb r1, [r1, #6] | |
2369 805962: 430a orr r2, r1 | |
2370 805964: 52c2 strh r2, [r0, r3] | |
2371 805966: bd30 pop {r4, r5, pc} | |
2372 | |
2373 $l1ddsp_stop_tch: | |
2374 805968: 48a3 ldr r0, =0x83cda8 ; via 0x805bf8 | |
2375 80596a: 6800 ldr r0, [r0, #0] | |
2376 80596c: 3012 add r0, #18 ; 0x12 | |
2377 80596e: 2103 mov r1, #3 | |
2378 805970: 028a lsl r2, r1, #10 | |
2379 805972: 8801 ldrh r1, [r0, #0] | |
2380 805974: 430a orr r2, r1 | |
2381 805976: 8002 strh r2, [r0, #0] | |
2382 805978: 4770 bx lr | |
2383 | |
2384 $l1ddsp_meas_read: | |
2385 80597a: b510 push {r4, lr} | |
2386 80597c: 2800 cmp r0, #0 | |
2387 80597e: d00d beq 0x80599c | |
2388 805980: 2200 mov r2, #0 | |
2389 805982: 4be9 ldr r3, =0x83cda4 ; via 0x805d28 | |
2390 805984: 681c ldr r4, [r3, #0] | |
2391 805986: 0053 lsl r3, r2, #1 | |
2392 805988: 18e3 add r3, r4, r3 | |
2393 80598a: 8b1b ldrh r3, [r3, #24] ; 0x18 | |
2394 80598c: 095b lsr r3, r3, #5 | |
2395 80598e: 5453 strb r3, [r2, r1] | |
2396 805990: 1c52 add r2, r2, #1 | |
2397 805992: 0612 lsl r2, r2, #24 | |
2398 805994: 0e12 lsr r2, r2, #24 | |
2399 805996: 3801 sub r0, #1 | |
2400 805998: 2800 cmp r0, #0 | |
2401 80599a: d1f2 bne 0x805982 | |
2402 80599c: 48e3 ldr r0, =0x83ce74 ; via 0x805d2c | |
2403 80599e: 7800 ldrb r0, [r0, #0] | |
2404 8059a0: 2800 cmp r0, #0 | |
2405 8059a2: d004 beq 0x8059ae | |
2406 8059a4: 49e2 ldr r1, =0x1077ffc ; via 0x805d30 | |
2407 8059a6: 48e0 ldr r0, =0x83cda4 ; via 0x805d28 | |
2408 8059a8: 6800 ldr r0, [r0, #0] | |
2409 8059aa: 8b00 ldrh r0, [r0, #24] ; 0x18 | |
2410 8059ac: 8008 strh r0, [r1, #0] | |
2411 8059ae: bd10 pop {r4, pc} | |
2412 | |
2413 $l1ddsp_end_scenario: | |
2414 8059b0: b500 push {lr} | |
2415 8059b2: 2800 cmp r0, #0 | |
2416 8059b4: d014 beq 0x8059e0 | |
2417 8059b6: 3801 sub r0, #1 | |
2418 8059b8: 2800 cmp r0, #0 | |
2419 8059ba: d00a beq 0x8059d2 | |
2420 8059bc: 3801 sub r0, #1 | |
2421 8059be: 2800 cmp r0, #0 | |
2422 8059c0: d115 bne 0x8059ee | |
2423 8059c2: 4945 ldr r1, =0x83cda0 ; via 0x805ad8 | |
2424 8059c4: 780a ldrb r2, [r1, #0] | |
2425 8059c6: 200a mov r0, #10 ; 0xa | |
2426 8059c8: 4310 orr r0, r2 | |
2427 8059ca: 2301 mov r3, #1 | |
2428 8059cc: 4053 eor r3, r2 | |
2429 8059ce: 700b strb r3, [r1, #0] | |
2430 8059d0: e00d b 0x8059ee | |
2431 8059d2: 2001 mov r0, #1 | |
2432 8059d4: 4940 ldr r1, =0x83cda0 ; via 0x805ad8 | |
2433 8059d6: 7809 ldrb r1, [r1, #0] | |
2434 8059d8: 4048 eor r0, r1 | |
2435 8059da: 2108 mov r1, #8 | |
2436 8059dc: 4308 orr r0, r1 | |
2437 8059de: e006 b 0x8059ee | |
2438 8059e0: 4a3d ldr r2, =0x83cda0 ; via 0x805ad8 | |
2439 8059e2: 7811 ldrb r1, [r2, #0] | |
2440 8059e4: 2002 mov r0, #2 | |
2441 8059e6: 4308 orr r0, r1 | |
2442 8059e8: 2301 mov r3, #1 | |
2443 8059ea: 404b eor r3, r1 | |
2444 8059ec: 7013 strb r3, [r2, #0] | |
2445 8059ee: 4903 ldr r1, =0x83cdac ; via 0x8059fc | |
2446 8059f0: 6809 ldr r1, [r1, #0] | |
2447 8059f2: 8008 strh r0, [r1, #0] | |
2448 8059f4: f00e f8c7 bl 0x813b86 | |
2449 8059f8: bd00 pop {pc} | |
2450 8059fa: 46c0 nop (mov r8, r8) | |
2451 | |
2452 $l1dtpu_meas: | |
2453 805a00: b5f0 push {r4, r5, r6, r7, lr} | |
2454 805a02: 4644 mov r4, r8 | |
2455 805a04: 464d mov r5, r9 | |
2456 805a06: 4656 mov r6, r10 | |
2457 805a08: b470 push {r4, r5, r6} | |
2458 805a0a: af08 add r7, sp, #32 ; 0x20 | |
2459 805a0c: 1c1d add r5, r3, #0 | |
2460 805a0e: 1c14 add r4, r2, #0 | |
2461 805a10: 1c0e add r6, r1, #0 | |
2462 805a12: 4680 mov r8, r0 | |
2463 805a14: 78b8 ldrb r0, [r7, #2] | |
2464 805a16: 4682 mov r10, r0 | |
2465 805a18: 8838 ldrh r0, [r7, #0] | |
2466 805a1a: 4681 mov r9, r0 | |
2467 805a1c: 493c ldr r1, =0x83cdb4 ; via 0x805b10 | |
2468 805a1e: 20c1 mov r0, #193 ; 0xc1 | |
2469 805a20: 5c40 ldrb r0, [r0, r1] | |
2470 805a22: 2800 cmp r0, #0 | |
2471 805a24: d103 bne 0x805a2e | |
2472 805a26: 20d5 mov r0, #213 ; 0xd5 | |
2473 805a28: 5646 ldrsb r6, [r0, r1] | |
2474 805a2a: 20d6 mov r0, #214 ; 0xd6 | |
2475 805a2c: 5c44 ldrb r4, [r0, r1] | |
2476 805a2e: 48e2 ldr r0, =0x271 ; via 0x805db8 | |
2477 805a30: 4368 mul r0, r5 | |
2478 805a32: 1140 asr r0, r0, #5 | |
2479 805a34: 0400 lsl r0, r0, #16 | |
2480 805a36: 0c03 lsr r3, r0, #16 | |
2481 805a38: 4648 mov r0, r9 | |
2482 805a3a: 1818 add r0, r3, r0 | |
2483 805a3c: 0400 lsl r0, r0, #16 | |
2484 805a3e: 1400 asr r0, r0, #16 | |
2485 805a40: 4ade ldr r2, =0x1388 ; via 0x805dbc | |
2486 805a42: 4290 cmp r0, r2 | |
2487 805a44: db02 blt 0x805a4c | |
2488 805a46: 1a80 sub r0, r0, r2 | |
2489 805a48: 0400 lsl r0, r0, #16 | |
2490 805a4a: 1400 asr r0, r0, #16 | |
2491 805a4c: 2240 mov r2, #64 ; 0x40 | |
2492 805a4e: 5a51 ldrh r1, [r2, r1] | |
2493 805a50: 1a59 sub r1, r3, r1 | |
2494 805a52: 3140 add r1, #64 ; 0x40 | |
2495 805a54: 0409 lsl r1, r1, #16 | |
2496 805a56: 1409 asr r1, r1, #16 | |
2497 805a58: 2900 cmp r1, #0 | |
2498 805a5a: d503 bpl 0x805a64 | |
2499 805a5c: 4ad7 ldr r2, =0x1388 ; via 0x805dbc | |
2500 805a5e: 1851 add r1, r2, r1 | |
2501 805a60: 0409 lsl r1, r1, #16 | |
2502 805a62: 1409 asr r1, r1, #16 | |
2503 805a64: f00d fffd bl 0x813a62 ; $l1dmacro_offset | |
2504 805a68: 4640 mov r0, r8 | |
2505 805a6a: f00d f827 bl 0x812abc ; $l1dmacro_rx_synth | |
2506 805a6e: 4650 mov r0, r10 | |
2507 805a70: 2803 cmp r0, #3 | |
2508 805a72: d101 bne 0x805a78 | |
2509 805a74: f00e f82b bl 0x813ace ; $l1dmacro_adc_read_rx | |
2510 805a78: 4640 mov r0, r8 | |
2511 805a7a: 1c31 add r1, r6, #0 | |
2512 805a7c: 1c22 add r2, r4, #0 | |
2513 805a7e: f00c ff99 bl 0x8129b4 ; $l1dmacro_agc | |
2514 805a82: 4640 mov r0, r8 | |
2515 805a84: f00d fb44 bl 0x813110 ; $l1dmacro_rx_ms | |
2516 805a88: 4648 mov r0, r9 | |
2517 805a8a: 49cc ldr r1, =0x1388 ; via 0x805dbc | |
2518 805a8c: f00d ffe9 bl 0x813a62 ; $l1dmacro_offset | |
2519 805a90: 2d00 cmp r5, #0 | |
2520 805a92: d103 bne 0x805a9c | |
2521 805a94: 48ec ldr r0, =0x83cc58 ; via 0x805e48 | |
2522 805a96: 8800 ldrh r0, [r0, #0] | |
2523 805a98: f7ff fe48 bl 0x80572c ; $l1ddsp_load_afc | |
2524 805a9c: bc70 pop {r4, r5, r6} | |
2525 805a9e: 46a0 mov r8, r4 | |
2526 805aa0: 46a9 mov r9, r5 | |
2527 805aa2: 46b2 mov r10, r6 | |
2528 805aa4: bdf0 pop {r4, r5, r6, r7, pc} | |
2529 | |
2530 $l1dtpu_neig_fb: | |
2531 805aa6: b570 push {r4, r5, r6, lr} | |
2532 805aa8: 1c15 add r5, r2, #0 | |
2533 805aaa: 1c0e add r6, r1, #0 | |
2534 805aac: 1c04 add r4, r0, #0 | |
2535 805aae: 4818 ldr r0, =0x83cdb4 ; via 0x805b10 | |
2536 805ab0: 21c1 mov r1, #193 ; 0xc1 | |
2537 805ab2: 5c09 ldrb r1, [r1, r0] | |
2538 805ab4: 2900 cmp r1, #0 | |
2539 805ab6: d103 bne 0x805ac0 | |
2540 805ab8: 21d5 mov r1, #213 ; 0xd5 | |
2541 805aba: 560e ldrsb r6, [r1, r0] | |
2542 805abc: 21d6 mov r1, #214 ; 0xd6 | |
2543 805abe: 5c0d ldrb r5, [r1, r0] | |
2544 805ac0: 1c20 add r0, r4, #0 | |
2545 805ac2: f00c fffb bl 0x812abc ; $l1dmacro_rx_synth | |
2546 805ac6: 1c20 add r0, r4, #0 | |
2547 805ac8: 1c31 add r1, r6, #0 | |
2548 805aca: 1c2a add r2, r5, #0 | |
2549 805acc: f00c ff72 bl 0x8129b4 ; $l1dmacro_agc | |
2550 805ad0: 1c20 add r0, r4, #0 | |
2551 805ad2: f00d fb33 bl 0x81313c ; $l1dmacro_rx_fb | |
2552 805ad6: bd70 pop {r4, r5, r6, pc} | |
1990 | 2553 |
1991 ; apparent beginning of tpudrv10 module | 2554 ; apparent beginning of tpudrv10 module |
1992 | 2555 |
1993 811df8: b500 push {lr} | 2556 811df8: b500 push {lr} |
1994 811dfa: b084 sub sp, #16 ; 0x10 | 2557 811dfa: b084 sub sp, #16 ; 0x10 |
3547 81384e: 600b str r3, [r1, #0] | 4110 81384e: 600b str r3, [r1, #0] |
3548 813850: 8002 strh r2, [r0, #0] | 4111 813850: 8002 strh r2, [r0, #0] |
3549 813852: f000 f8f3 bl 0x813a3c | 4112 813852: f000 f8f3 bl 0x813a3c |
3550 813856: b001 add sp, #4 | 4113 813856: b001 add sp, #4 |
3551 813858: bd00 pop {pc} | 4114 813858: bd00 pop {pc} |
4115 81385a: 46c0 nop (mov r8, r8) | |
4116 ; end of tpudrv10 module | |
4117 | |
4118 ; tpudrv (RF-independent) module | |
4119 | |
4120 $TPU_Reset: | |
4121 8138a8: b081 sub sp, #4 | |
4122 8138aa: 4669 mov r1, sp | |
4123 8138ac: 8008 strh r0, [r1, #0] | |
4124 8138ae: 4668 mov r0, sp | |
4125 8138b0: 8800 ldrh r0, [r0, #0] | |
4126 8138b2: 2800 cmp r0, #0 | |
4127 8138b4: d009 beq 0x8138ca | |
4128 8138b6: 49b6 ldr r1, =0xffff1000 ; via 0x813b90 | |
4129 8138b8: 2001 mov r0, #1 | |
4130 8138ba: 880a ldrh r2, [r1, #0] | |
4131 8138bc: 4310 orr r0, r2 | |
4132 8138be: 8008 strh r0, [r1, #0] | |
4133 8138c0: 48b3 ldr r0, =0xffff1000 ; via 0x813b90 | |
4134 8138c2: 8800 ldrh r0, [r0, #0] | |
4135 8138c4: 0840 lsr r0, r0, #1 | |
4136 8138c6: d3fb bcc 0x8138c0 | |
4137 8138c8: e008 b 0x8138dc | |
4138 8138ca: 48b1 ldr r0, =0xffff1000 ; via 0x813b90 | |
4139 8138cc: 8801 ldrh r1, [r0, #0] | |
4140 8138ce: 0849 lsr r1, r1, #1 | |
4141 8138d0: 0049 lsl r1, r1, #1 | |
4142 8138d2: 8001 strh r1, [r0, #0] | |
4143 8138d4: 48ae ldr r0, =0xffff1000 ; via 0x813b90 | |
4144 8138d6: 8800 ldrh r0, [r0, #0] | |
4145 8138d8: 0840 lsr r0, r0, #1 | |
4146 8138da: d2fb bcs 0x8138d4 | |
4147 8138dc: b001 add sp, #4 | |
4148 8138de: 4770 bx lr | |
4149 | |
4150 $TSP_Reset: | |
4151 8138e0: b081 sub sp, #4 | |
4152 8138e2: 4669 mov r1, sp | |
4153 8138e4: 8008 strh r0, [r1, #0] | |
4154 8138e6: 4668 mov r0, sp | |
4155 8138e8: 8800 ldrh r0, [r0, #0] | |
4156 8138ea: 2800 cmp r0, #0 | |
4157 8138ec: d009 beq 0x813902 | |
4158 8138ee: 49a8 ldr r1, =0xffff1000 ; via 0x813b90 | |
4159 8138f0: 2080 mov r0, #128 ; 0x80 | |
4160 8138f2: 880a ldrh r2, [r1, #0] | |
4161 8138f4: 4310 orr r0, r2 | |
4162 8138f6: 8008 strh r0, [r1, #0] | |
4163 8138f8: 48a5 ldr r0, =0xffff1000 ; via 0x813b90 | |
4164 8138fa: 8800 ldrh r0, [r0, #0] | |
4165 8138fc: 0a00 lsr r0, r0, #8 | |
4166 8138fe: d3fb bcc 0x8138f8 | |
4167 813900: e008 b 0x813914 | |
4168 813902: 49a3 ldr r1, =0xffff1000 ; via 0x813b90 | |
4169 813904: 8808 ldrh r0, [r1, #0] | |
4170 813906: 2280 mov r2, #128 ; 0x80 | |
4171 813908: 4390 bic r0, r2 | |
4172 81390a: 8008 strh r0, [r1, #0] | |
4173 81390c: 48a0 ldr r0, =0xffff1000 ; via 0x813b90 | |
4174 81390e: 8800 ldrh r0, [r0, #0] | |
4175 813910: 0a00 lsr r0, r0, #8 | |
4176 813912: d2fb bcs 0x81390c | |
4177 813914: b001 add sp, #4 | |
4178 813916: 4770 bx lr | |
4179 | |
4180 $TPU_SPIReset: | |
4181 813918: b081 sub sp, #4 | |
4182 81391a: 4669 mov r1, sp | |
4183 81391c: 8008 strh r0, [r1, #0] | |
4184 81391e: 4668 mov r0, sp | |
4185 813920: 8800 ldrh r0, [r0, #0] | |
4186 813922: 2800 cmp r0, #0 | |
4187 813924: d009 beq 0x81393a | |
4188 813926: 499a ldr r1, =0xffff1000 ; via 0x813b90 | |
4189 813928: 2080 mov r0, #128 ; 0x80 | |
4190 81392a: 880a ldrh r2, [r1, #0] | |
4191 81392c: 4310 orr r0, r2 | |
4192 81392e: 8008 strh r0, [r1, #0] | |
4193 813930: 4897 ldr r0, =0xffff1000 ; via 0x813b90 | |
4194 813932: 8800 ldrh r0, [r0, #0] | |
4195 813934: 0a00 lsr r0, r0, #8 | |
4196 813936: d3fb bcc 0x813930 | |
4197 813938: e008 b 0x81394c | |
4198 81393a: 4995 ldr r1, =0xffff1000 ; via 0x813b90 | |
4199 81393c: 8808 ldrh r0, [r1, #0] | |
4200 81393e: 2280 mov r2, #128 ; 0x80 | |
4201 813940: 4390 bic r0, r2 | |
4202 813942: 8008 strh r0, [r1, #0] | |
4203 813944: 4892 ldr r0, =0xffff1000 ; via 0x813b90 | |
4204 813946: 8800 ldrh r0, [r0, #0] | |
4205 813948: 0a00 lsr r0, r0, #8 | |
4206 81394a: d2fb bcs 0x813944 | |
4207 81394c: b001 add sp, #4 | |
4208 81394e: 4770 bx lr | |
4209 | |
4210 $TPU_ClkEnable: | |
4211 813950: b081 sub sp, #4 | |
4212 813952: 4669 mov r1, sp | |
4213 813954: 8008 strh r0, [r1, #0] | |
4214 813956: 4668 mov r0, sp | |
4215 813958: 8800 ldrh r0, [r0, #0] | |
4216 81395a: 2800 cmp r0, #0 | |
4217 81395c: d00a beq 0x813974 | |
4218 81395e: 498c ldr r1, =0xffff1000 ; via 0x813b90 | |
4219 813960: 2001 mov r0, #1 | |
4220 813962: 0280 lsl r0, r0, #10 | |
4221 813964: 880a ldrh r2, [r1, #0] | |
4222 813966: 4310 orr r0, r2 | |
4223 813968: 8008 strh r0, [r1, #0] | |
4224 81396a: 4889 ldr r0, =0xffff1000 ; via 0x813b90 | |
4225 81396c: 8800 ldrh r0, [r0, #0] | |
4226 81396e: 0ac0 lsr r0, r0, #11 | |
4227 813970: d3fb bcc 0x81396a | |
4228 813972: e009 b 0x813988 | |
4229 813974: 4986 ldr r1, =0xffff1000 ; via 0x813b90 | |
4230 813976: 8808 ldrh r0, [r1, #0] | |
4231 813978: 2201 mov r2, #1 | |
4232 81397a: 0292 lsl r2, r2, #10 | |
4233 81397c: 4390 bic r0, r2 | |
4234 81397e: 8008 strh r0, [r1, #0] | |
4235 813980: 4883 ldr r0, =0xffff1000 ; via 0x813b90 | |
4236 813982: 8800 ldrh r0, [r0, #0] | |
4237 813984: 0ac0 lsr r0, r0, #11 | |
4238 813986: d2fb bcs 0x813980 | |
4239 813988: b001 add sp, #4 | |
4240 81398a: 4770 bx lr | |
4241 | |
4242 $TPU_FrameItOn: | |
4243 81398c: b081 sub sp, #4 | |
4244 81398e: 4669 mov r1, sp | |
4245 813990: 8008 strh r0, [r1, #0] | |
4246 813992: 4980 ldr r1, =0xffff1002 ; via 0x813b94 | |
4247 813994: 8808 ldrh r0, [r1, #0] | |
4248 813996: 466a mov r2, sp | |
4249 813998: 8812 ldrh r2, [r2, #0] | |
4250 81399a: 4390 bic r0, r2 | |
4251 81399c: 8008 strh r0, [r1, #0] | |
4252 81399e: b001 add sp, #4 | |
4253 8139a0: 4770 bx lr | |
4254 | |
4255 $TPU_FrameItEnable: | |
4256 8139a2: 497b ldr r1, =0xffff1000 ; via 0x813b90 | |
4257 8139a4: 2010 mov r0, #16 ; 0x10 | |
4258 8139a6: 880a ldrh r2, [r1, #0] | |
4259 8139a8: 4310 orr r0, r2 | |
4260 8139aa: 8008 strh r0, [r1, #0] | |
4261 8139ac: 4878 ldr r0, =0xffff1000 ; via 0x813b90 | |
4262 8139ae: 8800 ldrh r0, [r0, #0] | |
4263 8139b0: 0940 lsr r0, r0, #5 | |
4264 8139b2: d3fb bcc 0x8139ac | |
4265 8139b4: 4770 bx lr | |
4266 | |
4267 $TPU_DisableAllIt: | |
4268 8139b6: 4977 ldr r1, =0xffff1002 ; via 0x813b94 | |
4269 8139b8: 2007 mov r0, #7 | |
4270 8139ba: 880a ldrh r2, [r1, #0] | |
4271 8139bc: 4310 orr r0, r2 | |
4272 8139be: 8008 strh r0, [r1, #0] | |
4273 8139c0: 4770 bx lr | |
4274 | |
4275 $TP_Program: | |
4276 8139c2: b081 sub sp, #4 | |
4277 8139c4: 9000 str r0, [sp, #0] | |
4278 8139c6: 9800 ldr r0, [sp, #0] | |
4279 8139c8: 8800 ldrh r0, [r0, #0] | |
4280 8139ca: 2800 cmp r0, #0 | |
4281 8139cc: d00c beq 0x8139e8 | |
4282 8139ce: 4872 ldr r0, =0x83c0a4 ; via 0x813b98 | |
4283 8139d0: 6801 ldr r1, [r0, #0] | |
4284 8139d2: 1c8a add r2, r1, #2 | |
4285 8139d4: 6002 str r2, [r0, #0] | |
4286 8139d6: 9800 ldr r0, [sp, #0] | |
4287 8139d8: 8802 ldrh r2, [r0, #0] | |
4288 8139da: 3002 add r0, #2 | |
4289 8139dc: 9000 str r0, [sp, #0] | |
4290 8139de: 800a strh r2, [r1, #0] | |
4291 8139e0: 9800 ldr r0, [sp, #0] | |
4292 8139e2: 8800 ldrh r0, [r0, #0] | |
4293 8139e4: 2800 cmp r0, #0 | |
4294 8139e6: d1f2 bne 0x8139ce | |
4295 8139e8: b001 add sp, #4 | |
4296 8139ea: 4770 bx lr | |
4297 | |
4298 $TP_Reset: | |
4299 8139ec: b081 sub sp, #4 | |
4300 8139ee: 4669 mov r1, sp | |
4301 8139f0: 8008 strh r0, [r1, #0] | |
4302 8139f2: 4668 mov r0, sp | |
4303 8139f4: 8800 ldrh r0, [r0, #0] | |
4304 8139f6: 2800 cmp r0, #0 | |
4305 8139f8: d005 beq 0x813a06 | |
4306 8139fa: 4a65 ldr r2, =0xffff1000 ; via 0x813b90 | |
4307 8139fc: 2081 mov r0, #129 ; 0x81 | |
4308 8139fe: 8811 ldrh r1, [r2, #0] | |
4309 813a00: 4308 orr r0, r1 | |
4310 813a02: 8010 strh r0, [r2, #0] | |
4311 813a04: e004 b 0x813a10 | |
4312 813a06: 4962 ldr r1, =0xffff1000 ; via 0x813b90 | |
4313 813a08: 8808 ldrh r0, [r1, #0] | |
4314 813a0a: 2281 mov r2, #129 ; 0x81 | |
4315 813a0c: 4390 bic r0, r2 | |
4316 813a0e: 8008 strh r0, [r1, #0] | |
4317 813a10: b001 add sp, #4 | |
4318 813a12: 4770 bx lr | |
4319 | |
4320 $TP_Enable: | |
4321 813a14: b081 sub sp, #4 | |
4322 813a16: 4669 mov r1, sp | |
4323 813a18: 8008 strh r0, [r1, #0] | |
4324 813a1a: 4668 mov r0, sp | |
4325 813a1c: 8800 ldrh r0, [r0, #0] | |
4326 813a1e: 2800 cmp r0, #0 | |
4327 813a20: d005 beq 0x813a2e | |
4328 813a22: 4a5b ldr r2, =0xffff1000 ; via 0x813b90 | |
4329 813a24: 2004 mov r0, #4 | |
4330 813a26: 8811 ldrh r1, [r2, #0] | |
4331 813a28: 4308 orr r0, r1 | |
4332 813a2a: 8010 strh r0, [r2, #0] | |
4333 813a2c: e004 b 0x813a38 | |
4334 813a2e: 4958 ldr r1, =0xffff1000 ; via 0x813b90 | |
4335 813a30: 8808 ldrh r0, [r1, #0] | |
4336 813a32: 2204 mov r2, #4 | |
4337 813a34: 4390 bic r0, r2 | |
4338 813a36: 8008 strh r0, [r1, #0] | |
4339 813a38: b001 add sp, #4 | |
4340 813a3a: 4770 bx lr | |
4341 | |
4342 $l1dmacro_idle: | |
4343 813a3c: b500 push {lr} | |
4344 813a3e: 4956 ldr r1, =0x83c0a4 ; via 0x813b98 | |
4345 813a40: 6808 ldr r0, [r1, #0] | |
4346 813a42: 1c82 add r2, r0, #2 | |
4347 813a44: 600a str r2, [r1, #0] | |
4348 813a46: 2100 mov r1, #0 | |
4349 813a48: 8001 strh r1, [r0, #0] | |
4350 813a4a: 4853 ldr r0, =0x83c0a4 ; via 0x813b98 | |
4351 813a4c: 4953 ldr r1, =0xffff9000 ; via 0x813b9c | |
4352 813a4e: 6001 str r1, [r0, #0] | |
4353 813a50: 2001 mov r0, #1 | |
4354 813a52: f7ff ffdf bl 0x813a14 ; $TP_Enable | |
4355 813a56: 4852 ldr r0, =0xbb8 ; via 0x813ba0 | |
4356 813a58: f02b fb04 bl 0x83f064 ; $convert_nanosec_to_cycles | |
4357 813a5c: f02b f9d2 bl 0x83ee04 ; $wait_ARM_cycles | |
4358 813a60: bd00 pop {pc} | |
4359 | |
4360 $l1dmacro_offset: | |
4361 813a62: b082 sub sp, #8 | |
4362 813a64: 9101 str r1, [sp, #4] | |
4363 813a66: 9000 str r0, [sp, #0] | |
4364 813a68: 9901 ldr r1, [sp, #4] | |
4365 813a6a: 484e ldr r0, =0x1388 ; via 0x813ba4 | |
4366 813a6c: 4281 cmp r1, r0 | |
4367 813a6e: d008 beq 0x813a82 | |
4368 813a70: 4849 ldr r0, =0x83c0a4 ; via 0x813b98 | |
4369 813a72: 6801 ldr r1, [r0, #0] | |
4370 813a74: 1c8a add r2, r1, #2 | |
4371 813a76: 6002 str r2, [r0, #0] | |
4372 813a78: 2001 mov r0, #1 | |
4373 813a7a: 0340 lsl r0, r0, #13 | |
4374 813a7c: 9a01 ldr r2, [sp, #4] | |
4375 813a7e: 4310 orr r0, r2 | |
4376 813a80: 8008 strh r0, [r1, #0] | |
4377 813a82: 4845 ldr r0, =0x83c0a4 ; via 0x813b98 | |
4378 813a84: 6801 ldr r1, [r0, #0] | |
4379 813a86: 1c8a add r2, r1, #2 | |
4380 813a88: 6002 str r2, [r0, #0] | |
4381 813a8a: 2001 mov r0, #1 | |
4382 813a8c: 0380 lsl r0, r0, #14 | |
4383 813a8e: 9a00 ldr r2, [sp, #0] | |
4384 813a90: 4310 orr r0, r2 | |
4385 813a92: 8008 strh r0, [r1, #0] | |
4386 813a94: b002 add sp, #8 | |
4387 813a96: 4770 bx lr | |
4388 | |
4389 $l1dmacro_synchro: | |
4390 813a98: b082 sub sp, #8 | |
4391 813a9a: 9101 str r1, [sp, #4] | |
4392 813a9c: 9000 str r0, [sp, #0] | |
4393 813a9e: 9901 ldr r1, [sp, #4] | |
4394 813aa0: 4841 ldr r0, =0x1388 ; via 0x813ba8 | |
4395 813aa2: 4281 cmp r1, r0 | |
4396 813aa4: d008 beq 0x813ab8 | |
4397 813aa6: 483c ldr r0, =0x83c0a4 ; via 0x813b98 | |
4398 813aa8: 6801 ldr r1, [r0, #0] | |
4399 813aaa: 1c8a add r2, r1, #2 | |
4400 813aac: 6002 str r2, [r0, #0] | |
4401 813aae: 2001 mov r0, #1 | |
4402 813ab0: 0340 lsl r0, r0, #13 | |
4403 813ab2: 9a00 ldr r2, [sp, #0] | |
4404 813ab4: 4310 orr r0, r2 | |
4405 813ab6: 8008 strh r0, [r1, #0] | |
4406 813ab8: 4837 ldr r0, =0x83c0a4 ; via 0x813b98 | |
4407 813aba: 6801 ldr r1, [r0, #0] | |
4408 813abc: 1c8a add r2, r1, #2 | |
4409 813abe: 6002 str r2, [r0, #0] | |
4410 813ac0: 2003 mov r0, #3 | |
4411 813ac2: 0340 lsl r0, r0, #13 | |
4412 813ac4: 9a01 ldr r2, [sp, #4] | |
4413 813ac6: 4310 orr r0, r2 | |
4414 813ac8: 8008 strh r0, [r1, #0] | |
4415 813aca: b002 add sp, #8 | |
4416 813acc: 4770 bx lr | |
4417 | |
4418 $l1dmacro_adc_read_rx: | |
4419 813ace: 4932 ldr r1, =0x83c0a4 ; via 0x813b98 | |
4420 813ad0: 6808 ldr r0, [r1, #0] | |
4421 813ad2: 1c82 add r2, r0, #2 | |
4422 813ad4: 600a str r2, [r1, #0] | |
4423 813ad6: 4935 ldr r1, =0xa005 ; via 0x813bac | |
4424 813ad8: 8001 strh r1, [r0, #0] | |
4425 813ada: 482f ldr r0, =0x83c0a4 ; via 0x813b98 | |
4426 813adc: 6801 ldr r1, [r0, #0] | |
4427 813ade: 1c8a add r2, r1, #2 | |
4428 813ae0: 6002 str r2, [r0, #0] | |
4429 813ae2: 4833 ldr r0, =0x80c0 ; via 0x813bb0 | |
4430 813ae4: 8008 strh r0, [r1, #0] | |
4431 813ae6: 482c ldr r0, =0x83c0a4 ; via 0x813b98 | |
4432 813ae8: 6801 ldr r1, [r0, #0] | |
4433 813aea: 1c8a add r2, r1, #2 | |
4434 813aec: 6002 str r2, [r0, #0] | |
4435 813aee: 4831 ldr r0, =0x8044 ; via 0x813bb4 | |
4436 813af0: 8008 strh r0, [r1, #0] | |
4437 813af2: 4829 ldr r0, =0x83c0a4 ; via 0x813b98 | |
4438 813af4: 6801 ldr r1, [r0, #0] | |
4439 813af6: 1c8a add r2, r1, #2 | |
4440 813af8: 6002 str r2, [r0, #0] | |
4441 813afa: 482f ldr r0, =0x8041 ; via 0x813bb8 | |
4442 813afc: 8008 strh r0, [r1, #0] | |
4443 813afe: 4926 ldr r1, =0x83c0a4 ; via 0x813b98 | |
4444 813b00: 6808 ldr r0, [r1, #0] | |
4445 813b02: 1c82 add r2, r0, #2 | |
4446 813b04: 600a str r2, [r1, #0] | |
4447 813b06: 4929 ldr r1, =0xa005 ; via 0x813bac | |
4448 813b08: 8001 strh r1, [r0, #0] | |
4449 813b0a: 4823 ldr r0, =0x83c0a4 ; via 0x813b98 | |
4450 813b0c: 6801 ldr r1, [r0, #0] | |
4451 813b0e: 1c8a add r2, r1, #2 | |
4452 813b10: 6002 str r2, [r0, #0] | |
4453 813b12: 482a ldr r0, =0x8004 ; via 0x813bbc | |
4454 813b14: 8008 strh r0, [r1, #0] | |
4455 813b16: 4920 ldr r1, =0x83c0a4 ; via 0x813b98 | |
4456 813b18: 6808 ldr r0, [r1, #0] | |
4457 813b1a: 1c82 add r2, r0, #2 | |
4458 813b1c: 600a str r2, [r1, #0] | |
4459 813b1e: 4926 ldr r1, =0x8041 ; via 0x813bb8 | |
4460 813b20: 8001 strh r1, [r0, #0] | |
4461 813b22: 4770 bx lr | |
4462 | |
4463 $l1dmacro_adc_read_tx: | |
4464 813b24: b081 sub sp, #4 | |
4465 813b26: 9000 str r0, [sp, #0] | |
4466 813b28: 481b ldr r0, =0x83c0a4 ; via 0x813b98 | |
4467 813b2a: 6801 ldr r1, [r0, #0] | |
4468 813b2c: 1c8a add r2, r1, #2 | |
4469 813b2e: 6002 str r2, [r0, #0] | |
4470 813b30: 2001 mov r0, #1 | |
4471 813b32: 0340 lsl r0, r0, #13 | |
4472 813b34: 9a00 ldr r2, [sp, #0] | |
4473 813b36: 4310 orr r0, r2 | |
4474 813b38: 8008 strh r0, [r1, #0] | |
4475 813b3a: 4917 ldr r1, =0x83c0a4 ; via 0x813b98 | |
4476 813b3c: 6808 ldr r0, [r1, #0] | |
4477 813b3e: 1c82 add r2, r0, #2 | |
4478 813b40: 600a str r2, [r1, #0] | |
4479 813b42: 491b ldr r1, =0x80c0 ; via 0x813bb0 | |
4480 813b44: 8001 strh r1, [r0, #0] | |
4481 813b46: 4814 ldr r0, =0x83c0a4 ; via 0x813b98 | |
4482 813b48: 6801 ldr r1, [r0, #0] | |
4483 813b4a: 1c8a add r2, r1, #2 | |
4484 813b4c: 6002 str r2, [r0, #0] | |
4485 813b4e: 481c ldr r0, =0x9444 ; via 0x813bc0 | |
4486 813b50: 8008 strh r0, [r1, #0] | |
4487 813b52: 4811 ldr r0, =0x83c0a4 ; via 0x813b98 | |
4488 813b54: 6801 ldr r1, [r0, #0] | |
4489 813b56: 1c8a add r2, r1, #2 | |
4490 813b58: 6002 str r2, [r0, #0] | |
4491 813b5a: 4817 ldr r0, =0x8041 ; via 0x813bb8 | |
4492 813b5c: 8008 strh r0, [r1, #0] | |
4493 813b5e: 490e ldr r1, =0x83c0a4 ; via 0x813b98 | |
4494 813b60: 6808 ldr r0, [r1, #0] | |
4495 813b62: 1c82 add r2, r0, #2 | |
4496 813b64: 600a str r2, [r1, #0] | |
4497 813b66: 4911 ldr r1, =0xa005 ; via 0x813bac | |
4498 813b68: 8001 strh r1, [r0, #0] | |
4499 813b6a: 480b ldr r0, =0x83c0a4 ; via 0x813b98 | |
4500 813b6c: 6801 ldr r1, [r0, #0] | |
4501 813b6e: 1c8a add r2, r1, #2 | |
4502 813b70: 6002 str r2, [r0, #0] | |
4503 813b72: 4814 ldr r0, =0x9404 ; via 0x813bc4 | |
4504 813b74: 8008 strh r0, [r1, #0] | |
4505 813b76: 4908 ldr r1, =0x83c0a4 ; via 0x813b98 | |
4506 813b78: 6808 ldr r0, [r1, #0] | |
4507 813b7a: 1c82 add r2, r0, #2 | |
4508 813b7c: 600a str r2, [r1, #0] | |
4509 813b7e: 490e ldr r1, =0x8041 ; via 0x813bb8 | |
4510 813b80: 8001 strh r1, [r0, #0] | |
4511 813b82: b001 add sp, #4 | |
4512 813b84: 4770 bx lr | |
4513 | |
4514 $l1dmacro_set_frame_it: | |
4515 813b86: b500 push {lr} | |
4516 813b88: f7ff ff0b bl 0x8139a2 ; $TPU_FrameItEnable | |
4517 813b8c: bd00 pop {pc} | |
4518 813b8e: 46c0 nop (mov r8, r8) | |
3552 | 4519 |
3553 IRAM data: | 4520 IRAM data: |
3554 | 4521 |
3555 0x839ea8 rf structure | 4522 0x839ea8 rf structure |
3556 0x83a09c adc_cal structure | 4523 0x83a09c adc_cal structure |