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comparison pirelli/fw-disasm @ 250:431efc676a9c

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pirelli/fw-disasm: started analysing the Switch_ON() code
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 24 Dec 2017 17:18:06 +0000
parents b84fa089a560
children 6d9a6627b085
comparison
equal deleted inserted replaced
249:b84fa089a560 250:431efc676a9c
1439 3a14a0: d303 bcc 0x3a14aa 1439 3a14a0: d303 bcc 0x3a14aa
1440 3a14a2: 2001 mov r0, #1 1440 3a14a2: 2001 mov r0, #1
1441 3a14a4: 4328 orr r0, r5 1441 3a14a4: 4328 orr r0, r5
1442 3a14a6: 0600 lsl r0, r0, #24 1442 3a14a6: 0600 lsl r0, r0, #24
1443 3a14a8: 0e05 lsr r5, r0, #24 1443 3a14a8: 0e05 lsr r5, r0, #24
1444 ; R5: bit 0 is set if the power button is held down or if
1445 ; the ONBSTS bit is set with charging power connected
1446 ; bit 2 is set if the charging power is connected
1444 3a14aa: 4ec0 ldr r6, =0xfffe1811 ; via 0x3a17ac 1447 3a14aa: 4ec0 ldr r6, =0xfffe1811 ; via 0x3a17ac
1445 3a14ac: 2000 mov r0, #0 1448 3a14ac: 2000 mov r0, #0
1446 3a14ae: 5630 ldrsb r0, [r6, r0] 1449 3a14ae: 5630 ldrsb r0, [r6, r0]
1447 3a14b0: 09c0 lsr r0, r0, #7 1450 3a14b0: 09c0 lsr r0, r0, #7
1448 3a14b2: d308 bcc 0x3a14c6 1451 3a14b2: d308 bcc 0x3a14c6
1453 3a14bc: 7030 strb r0, [r6, #0] 1456 3a14bc: 7030 strb r0, [r6, #0]
1454 3a14be: 2008 mov r0, #8 1457 3a14be: 2008 mov r0, #8
1455 3a14c0: 4328 orr r0, r5 1458 3a14c0: 4328 orr r0, r5
1456 3a14c2: 0600 lsl r0, r0, #24 1459 3a14c2: 0600 lsl r0, r0, #24
1457 3a14c4: 0e05 lsr r5, r0, #24 1460 3a14c4: 0e05 lsr r5, r0, #24
1461 ; bit 3 is set in R5 if an RTC alarm has occurred
1462 ; write 0 into ABB VBATREG
1458 3a14c6: 2001 mov r0, #1 1463 3a14c6: 2001 mov r0, #1
1459 3a14c8: 211e mov r1, #30 ; 0x1e 1464 3a14c8: 211e mov r1, #30 ; 0x1e
1460 3a14ca: 2200 mov r2, #0 1465 3a14ca: 2200 mov r2, #0
1461 3a14cc: f7a7 fe9e bl 0x34920c 1466 3a14cc: f7a7 fe9e bl 0x34920c ; $ABB_Write_Register_on_page
1462 3a14d0: 2001 mov r0, #1 1467 3a14d0: 2001 mov r0, #1
1463 3a14d2: f710 f9e4 bl 0x2b189e 1468 3a14d2: f710 f9e4 bl 0x2b189e ; rvf_delay()
1464 3a14d6: 4fb1 ldr r7, =0x1774e38 ; via 0x3a179c 1469 3a14d6: 4fb1 ldr r7, =0x1774e38 ; via 0x3a179c
1465 3a14d8: 2001 mov r0, #1 1470 3a14d8: 2001 mov r0, #1
1466 3a14da: 211e mov r1, #30 ; 0x1e 1471 3a14da: 211e mov r1, #30 ; 0x1e
1467 3a14dc: f7a7 febd bl 0x34925a 1472 3a14dc: f7a7 febd bl 0x34925a ; $ABB_Read_Register_on_page
1468 3a14e0: 6839 ldr r1, [r7, #0] 1473 3a14e0: 6839 ldr r1, [r7, #0]
1469 3a14e2: 8088 strh r0, [r1, #4] 1474 3a14e2: 8088 strh r0, [r1, #4]
1470 3a14e4: f78c fb00 bl 0x32dae8 1475 3a14e4: f78c fb00 bl 0x32dae8
1471 3a14e8: 1c04 add r4, r0, #0 1476 3a14e8: 1c04 add r4, r0, #0
1472 3a14ea: 6838 ldr r0, [r7, #0] 1477 3a14ea: 6838 ldr r0, [r7, #0]
1576 3a15be: 5c08 ldrb r0, [r1, r0] 1581 3a15be: 5c08 ldrb r0, [r1, r0]
1577 3a15c0: 2800 cmp r0, #0 1582 3a15c0: 2800 cmp r0, #0
1578 3a15c2: d103 bne 0x3a15cc 1583 3a15c2: d103 bne 0x3a15cc
1579 3a15c4: 20ff mov r0, #255 ; 0xff 1584 3a15c4: 20ff mov r0, #255 ; 0xff
1580 3a15c6: 30b2 add r0, #178 ; 0xb2 1585 3a15c6: 30b2 add r0, #178 ; 0xb2
1581 3a15c8: f710 f969 bl 0x2b189e 1586 3a15c8: f710 f969 bl 0x2b189e ; rvf_delay()
1582 3a15cc: 2003 mov r0, #3 1587 3a15cc: 2003 mov r0, #3
1583 3a15ce: f789 fcc9 bl 0x32af64 1588 3a15ce: f789 fcc9 bl 0x32af64
1584 3a15d2: f7f3 fb5d bl 0x394c90 1589 3a15d2: f7f3 fb5d bl 0x394c90
1585 3a15d6: f78c fc1b bl 0x32de10 1590 3a15d6: f78c fc1b bl 0x32de10
1586 3a15da: bd00 pop {pc} 1591 3a15da: bd00 pop {pc}