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comparison compal/sym-fw-disasm @ 282:52d21957bf2e

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compal/sym-fw-disasm: initial analysis
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 14 Mar 2019 06:55:02 +0000
parents
children f724d574cff3
comparison
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281:b7d93ff628a8 282:52d21957bf2e
1 ; This disassembly is an analysis of the boot path up to Init_Target()
2 ; and AI_InitIOConfig() in the special Mot C11x fw version with symbols
3 ; (R87.2.1.03.m0 and R87.2.1.03.map), made in order to look into these
4 ; critical board-specific init functions and in order to better prepare
5 ; ourselves for doing similar analysis on other Compal fw versions
6 ; for which we don't have any symbols.
7
8 0: ea000225 b 0x89c
9 4: ea000825 b 0x20a0
10 8: ea000825 b 0x20a4
11 c: ea000825 b 0x20a8
12 10: ea000825 b 0x20ac
13 14: ea000825 b 0x20b0
14 18: ea000825 b 0x20b4
15 1c: ea000825 b 0x20b8
16
17 _INT_Bootloader_Start:
18 ; Compal's addition for 26 MHz clock input to Calypso
19 89c: e51f1020 ldr r1, =0xfffffd00 ; via 0x884
20 8a0: e1d120b2 ldrh r2, [r1, #2]
21 8a4: e51f002c ldr r0, =0x40 ; via 0x880
22 8a8: e1800002 orr r0, r0, r2
23 8ac: e1c100b2 strh r0, [r1, #2]
24 ; matches TI's version from here
25 8b0: e51f1030 ldr r1, =0xffff9800 ; via 0x888
26 8b4: e15f22b6 ldrh r2, =0x2006 ; via 0x896
27 8b8: e1c120b0 strh r2, [r1]
28 8bc: e5912000 ldr r2, [r1]
29 8c0: e2022001 and r2, r2, #1
30 8c4: e3520001 cmp r2, #1
31 8c8: 0afffffb beq 0x8bc
32 8cc: e51f1050 ldr r1, =0xfffffd00 ; via 0x884
33 8d0: e15f24b4 ldrh r2, =0x1081 ; via 0x894
34 8d4: e1c120b0 strh r2, [r1]
35 8d8: e51f1054 ldr r1, =0xfffffb10 ; via 0x88c
36 8dc: e15f24bc ldrh r2, =0x800 ; via 0x898
37 8e0: e1d100b0 ldrh r0, [r1]
38 8e4: e1800002 orr r0, r0, r2
39 8e8: e1c100b0 strh r0, [r1]
40 8ec: e51f1064 ldr r1, =0xffffff08 ; via 0x890
41 8f0: e15f25be ldrh r2, =0x0 ; via 0x89a
42 8f4: e1c120b0 strh r2, [r1]
43 8f8: e51f1094 ldr r1, =0xfffffb00 ; via 0x86c
44 8fc: e15f29b4 ldrh r2, =0x2a1 ; via 0x870
45 900: e1c120b0 strh r2, [r1]
46 904: e15f29ba ldrh r2, =0x2a1 ; via 0x872
47 908: e1c120b2 strh r2, [r1, #2]
48 90c: e15f2ab0 ldrh r2, =0x2a1 ; via 0x874
49 910: e1c120b4 strh r2, [r1, #4]
50 914: e15f2ab6 ldrh r2, =0x283 ; via 0x876
51 918: e1c120b6 strh r2, [r1, #6]
52 91c: e15f2abc ldrh r2, =0x281 ; via 0x878
53 920: e1c120ba strh r2, [r1, #10] ; 0xa
54 924: e15f2bb2 ldrh r2, =0xc0 ; via 0x87a
55 928: e1c120bc strh r2, [r1, #12] ; 0xc
56 92c: e15f2bb8 ldrh r2, =0x40 ; via 0x87c
57 930: e1c120b8 strh r2, [r1, #8]
58 934: e15f2bbe ldrh r2, =0x2a ; via 0x87e
59 938: e1c120be strh r2, [r1, #14] ; 0xe
60 93c: e59f0020 ldr r0, =0x83e730 ; via 0x964
61 940: e3a01b01 mov r1, #1024 ; 0x400
62 944: e2411004 sub r1, r1, #4
63 948: e0802001 add r2, r0, r1
64 94c: e3c22003 bic r2, r2, #3
65 950: e1a0d002 mov sp, r2
66 954: e92d100f stmdb sp!, {r0, r1, r2, r3, r12}
67 958: eb00051e bl 0x1dd8 ; _sta_select_application
68 95c: e8bd100f ldmia sp!, {r0, r1, r2, r3, r12}
69 960: ea0005e4 b 0x20f8 ; _INT_Initialize
70
71 _INT_Initialize:
72 ; beginning matches TI's version
73 20f8: e51f1024 ldr r1, =0xffff9800 ; via 0x20dc
74 20fc: e15f21ba ldrh r2, =0x2002 ; via 0x20ea
75 2100: e1c120b0 strh r2, [r1]
76 2104: e5912000 ldr r2, [r1]
77 2108: e2022001 and r2, r2, #1
78 210c: e3520001 cmp r2, #1
79 2110: 0afffffb beq 0x2104
80 2114: e51f1044 ldr r1, =0xfffffd00 ; via 0x20d8
81 2118: e15f23b8 ldrh r2, =0x1081 ; via 0x20e8
82 211c: e1c120b0 strh r2, [r1]
83 2120: e51f1048 ldr r1, =0xfffffb10 ; via 0x20e0
84 2124: e15f23be ldrh r2, =0xf7ff ; via 0x20ee
85 2128: e1d100b0 ldrh r0, [r1]
86 212c: e0000002 and r0, r0, r2
87 2130: e1c100b0 strh r0, [r1]
88 2134: e51f1058 ldr r1, =0xffffff08 ; via 0x20e4
89 2138: e15f25b0 ldrh r2, =0x0 ; via 0x20f0
90 213c: e1c120b0 strh r2, [r1]
91 2140: e51f107c ldr r1, =0xfffffb00 ; via 0x20cc
92 2144: e15f29b0 ldrh r2, =0x2a1 ; via 0x20bc
93 2148: e1c120b0 strh r2, [r1]
94 214c: e15f29b6 ldrh r2, =0x2a1 ; via 0x20be
95 2150: e1c120b2 strh r2, [r1, #2]
96 2154: e15f29bc ldrh r2, =0x2a1 ; via 0x20c0
97 2158: e1c120b4 strh r2, [r1, #4]
98 215c: e15f2ab2 ldrh r2, =0x283 ; via 0x20c2
99 2160: e1c120b6 strh r2, [r1, #6]
100 2164: e15f2ab8 ldrh r2, =0xe85 ; via 0x20c4
101 2168: e1c120ba strh r2, [r1, #10] ; 0xa
102 216c: e15f2abe ldrh r2, =0x2c0 ; via 0x20c6
103 2170: e1c120bc strh r2, [r1, #12] ; 0xc
104 2174: e15f2bb4 ldrh r2, =0x40 ; via 0x20c8
105 2178: e1c120b8 strh r2, [r1, #8]
106 217c: e15f2bba ldrh r2, =0x2a ; via 0x20ca
107 2180: e1c120be strh r2, [r1, #14] ; 0xe
108 2184: e51f10bc ldr r1, =0xfffef006 ; via 0x20d0
109 2188: e1d120b0 ldrh r2, [r1]
110 218c: e51f00c0 ldr r0, =0x8 ; via 0x20d4
111 2190: e1800002 orr r0, r0, r2
112 2194: e1c100b0 strh r0, [r1]
113 2198: e10f0000 mrs r0, CPSR
114 219c: e3c0001f bic r0, r0, #31 ; 0x1f
115 21a0: e3800013 orr r0, r0, #19 ; 0x13
116 21a4: e38000c0 orr r0, r0, #192 ; 0xc0
117 21a8: e129f000 msr CPSR_fc, r0
118 ; diff from TI: Compal's full RAM clearing
119 21ac: e3a00502 mov r0, #8388608 ; 0x800000
120 21b0: e3a02000 mov r2, #0
121 21b4: e3a01721 mov r1, #8650752 ; 0x840000
122 21b8: e2411080 sub r1, r1, #128 ; 0x80
123 21bc: e4802004 str r2, [r0], #4
124 21c0: e1500001 cmp r0, r1
125 21c4: 1afffffc bne 0x21bc
126 21c8: e3a00401 mov r0, #16777216 ; 0x1000000
127 21cc: e3a02000 mov r2, #0
128 21d0: e3a01741 mov r1, #17039360 ; 0x1040000
129 21d4: e2411080 sub r1, r1, #128 ; 0x80
130 21d8: e4802004 str r2, [r0], #4
131 21dc: e1500001 cmp r0, r1
132 21e0: 1afffffc bne 0x21d8
133 ; TI's code continues with INT_Loaded_Flag setting
134 21e4: e3a00001 mov r0, #1
135 21e8: e59f12c8 ldr r1, =0x83e6f4 ; via 0x24b8
136 21ec: e5810000 str r0, [r1]
137 21f0: e59f02bc ldr r0, =0x83e818 ; via 0x24b4
138 21f4: e3a01b01 mov r1, #1024 ; 0x400
139 21f8: e2411004 sub r1, r1, #4
140 21fc: e0802001 add r2, r0, r1
141 2200: e1a0a000 mov r10, r0
142 2204: e59f32b0 ldr r3, =0x83e6dc ; via 0x24bc
143 2208: e583a000 str r10, [r3]
144 220c: e1a0d002 mov sp, r2
145 2210: e59f32a8 ldr r3, =0x834920 ; via 0x24c0
146 2214: e583d000 str sp, [r3]
147 2218: e3a01080 mov r1, #128 ; 0x80
148 221c: e0822001 add r2, r2, r1
149 2220: e10f0000 mrs r0, CPSR
150 2224: e3c0001f bic r0, r0, #31 ; 0x1f
151 2228: e3800012 orr r0, r0, #18 ; 0x12
152 222c: e129f000 msr CPSR_fc, r0
153 2230: e1a0d002 mov sp, r2
154 2234: e3a01c02 mov r1, #512 ; 0x200
155 2238: e0822001 add r2, r2, r1
156 223c: e10f0000 mrs r0, CPSR
157 2240: e3c0001f bic r0, r0, #31 ; 0x1f
158 2244: e3800011 orr r0, r0, #17 ; 0x11
159 2248: e129f000 msr CPSR_fc, r0
160 224c: e1a0d002 mov sp, r2
161 2250: e10f0000 mrs r0, CPSR
162 2254: e3c0001f bic r0, r0, #31 ; 0x1f
163 2258: e3800017 orr r0, r0, #23 ; 0x17
164 225c: e129f000 msr CPSR_fc, r0
165 2260: e59fd268 ldr sp, =0x83e780 ; via 0x24d0
166 2264: e10f0000 mrs r0, CPSR
167 2268: e3c0001f bic r0, r0, #31 ; 0x1f
168 226c: e380001b orr r0, r0, #27 ; 0x1b
169 2270: e129f000 msr CPSR_fc, r0
170 2274: e59fd254 ldr sp, =0x83e780 ; via 0x24d0
171 2278: e10f0000 mrs r0, CPSR
172 227c: e3c0001f bic r0, r0, #31 ; 0x1f
173 2280: e3800013 orr r0, r0, #19 ; 0x13
174 2284: e129f000 msr CPSR_fc, r0
175 2288: e59f3234 ldr r3, =0x83cfd8 ; via 0x24c4
176 228c: e2822004 add r2, r2, #4
177 2290: e5832000 str r2, [r3]
178 2294: e3a01b01 mov r1, #1024 ; 0x400
179 2298: e3c11003 bic r1, r1, #3
180 229c: e0822001 add r2, r2, r1
181 22a0: e59f3220 ldr r3, =0x83d05c ; via 0x24c8
182 22a4: e5831000 str r1, [r3]
183 22a8: e3a01002 mov r1, #2
184 22ac: e59f3218 ldr r3, =0x83d06c ; via 0x24cc
185 22b0: e5831000 str r1, [r3]
186 22b4: e1a04002 mov r4, r2
187 22b8: eb061cb4 bl 0x189590 ; _f_load_int_mem
188 22bc: e1a02004 mov r2, r4
189 22c0: e59f11f4 ldr r1, =0x83e6dc ; via 0x24bc
190 22c4: e5910000 ldr r0, [r1]
191 22c8: e3a030fe mov r3, #254 ; 0xfe
192 22cc: e5c03000 strb r3, [r0]
193 22d0: e5c03001 strb r3, [r0, #1]
194 22d4: e5c03002 strb r3, [r0, #2]
195 22d8: e5c03003 strb r3, [r0, #3]
196 22dc: e4903004 ldr r3, [r0], #4
197 22e0: e4803004 str r3, [r0], #4
198 22e4: e1500002 cmp r0, r2
199 22e8: bafffffc blt 0x22e0
200 22ec: e51f0200 ldr r0, =0x280c ; via 0x20f4
201 22f0: e3700001 cmn r0, #1
202 22f4: 1b000077 blne 0x24d8 ; _auto_init
203 22f8: e1a00002 mov r0, r2
204 22fc: ea061cdf b 0x189680 ; _INC_Initialize
205
206 $Init_Target:
207 17ba8c: b530 push {r4, r5, lr}
208 17ba8e: b081 sub sp, #4
209 17ba90: 496e ldr r1, =0xfffef008 ; via 0x17bc4c
210 17ba92: 2003 mov r0, #3
211 17ba94: 0340 lsl r0, r0, #13
212 17ba96: 8008 strh r0, [r1, #0]
213 17ba98: f006 f860 bl 0x181b5c ; $TM_DisableWatchdog
214 17ba9c: 486c ldr r0, =0xfffffd02 ; via 0x17bc50
215 17ba9e: 2105 mov r1, #5
216 17baa0: 8001 strh r1, [r0, #0]
217 17baa2: 2180 mov r1, #128 ; 0x80
218 17baa4: 8802 ldrh r2, [r0, #0]
219 17baa6: 4311 orr r1, r2
220 17baa8: 8001 strh r1, [r0, #0]
221 17baaa: 496a ldr r1, =0xffdf ; via 0x17bc54
222 17baac: 8802 ldrh r2, [r0, #0]
223 17baae: 4011 and r1, r2
224 17bab0: 8001 strh r1, [r0, #0]
225 17bab2: 4d69 ldr r5, =0xfffff900 ; via 0x17bc58
226 17bab4: 20ff mov r0, #255 ; 0xff
227 17bab6: 0200 lsl r0, r0, #8
228 17bab8: 8028 strh r0, [r5, #0]
229 17baba: 4c68 ldr r4, =0xffff9800 ; via 0x17bc5c
230 17babc: 4868 ldr r0, =0xfff3 ; via 0x17bc60
231 17babe: 8821 ldrh r1, [r4, #0]
232 17bac0: 4008 and r0, r1
233 17bac2: 8020 strh r0, [r4, #0]
234 17bac4: 8820 ldrh r0, [r4, #0]
235 17bac6: 8020 strh r0, [r4, #0]
236 17bac8: 4866 ldr r0, =0xf01f ; via 0x17bc64
237 17baca: 8821 ldrh r1, [r4, #0]
238 17bacc: 4008 and r0, r1
239 17bace: 8020 strh r0, [r4, #0]
240 17bad0: 2001 mov r0, #1
241 17bad2: 0280 lsl r0, r0, #10
242 17bad4: 8821 ldrh r1, [r4, #0]
243 17bad6: 4308 orr r0, r1
244 17bad8: 8020 strh r0, [r4, #0]
245 17bada: 2000 mov r0, #0
246 17badc: 2102 mov r1, #2
247 17bade: 2200 mov r2, #0
248 17bae0: f006 fd30 bl 0x182544 ; $CLKM_InitARMClock
249 17bae4: 4860 ldr r0, =0xfffffb00 ; via 0x17bc68
250 17bae6: 21a3 mov r1, #163 ; 0xa3
251 17bae8: 8001 strh r1, [r0, #0]
252 17baea: 8041 strh r1, [r0, #2]
253 17baec: 22a5 mov r2, #165 ; 0xa5
254 17baee: 8082 strh r2, [r0, #4]
255 17baf0: 80c1 strh r1, [r0, #6]
256 17baf2: 2180 mov r1, #128 ; 0x80
257 17baf4: 8141 strh r1, [r0, #10] ; 0xa
258 17baf6: 21c0 mov r1, #192 ; 0xc0
259 17baf8: 8181 strh r1, [r0, #12] ; 0xc
260 17bafa: 2140 mov r1, #64 ; 0x40
261 17bafc: 8101 strh r1, [r0, #8]
262 17bafe: 2020 mov r0, #32 ; 0x20
263 17bb00: 8068 strh r0, [r5, #2]
264 17bb02: 2000 mov r0, #0
265 17bb04: 80a8 strh r0, [r5, #4]
266 17bb06: 2010 mov r0, #16 ; 0x10
267 17bb08: 8821 ldrh r1, [r4, #0]
268 17bb0a: 4308 orr r0, r1
269 17bb0c: 8020 strh r0, [r4, #0]
270 17bb0e: 4857 ldr r0, =0xfffffa08 ; via 0x17bc6c
271 17bb10: 4957 ldr r1, =0xffff ; via 0x17bc70
272 17bb12: 8001 strh r1, [r0, #0]
273 17bb14: 8041 strh r1, [r0, #2]
274 17bb16: 2103 mov r1, #3
275 17bb18: 8181 strh r1, [r0, #12] ; 0xc
276 17bb1a: f004 ff21 bl 0x180960 ; $IQ_SetupInterrupts
277 17bb1e: 4855 ldr r0, =0xfffffc00 ; via 0x17bc74
278 17bb20: 2124 mov r1, #36 ; 0x24
279 17bb22: 8001 strh r1, [r0, #0]
280 17bb24: 210d mov r1, #13 ; 0xd
281 17bb26: 8041 strh r1, [r0, #2]
282 17bb28: 2500 mov r5, #0
283 17bb2a: 4853 ldr r0, =0xfffe2016 ; via 0x17bc78
284 17bb2c: 8005 strh r5, [r0, #0]
285 17bb2e: 4953 ldr r1, =0xfffe2014 ; via 0x17bc7c
286 17bb30: 2002 mov r0, #2
287 17bb32: 8008 strh r0, [r1, #0]
288 17bb34: 4952 ldr r1, =0xfffe2002 ; via 0x17bc80
289 17bb36: 2084 mov r0, #132 ; 0x84
290 17bb38: 8008 strh r0, [r1, #0]
291 17bb3a: 4852 ldr r0, =0xfffe2000 ; via 0x17bc84
292 17bb3c: 4952 ldr r1, =0x3de0 ; via 0x17bc88
293 17bb3e: 8001 strh r1, [r0, #0]
294 17bb40: 4952 ldr r1, =0xfffe2022 ; via 0x17bc8c
295 ; ULPD setup different from TI's
296 17bb42: 220a mov r2, #10 ; 0xa
297 17bb44: 800a strh r2, [r1, #0]
298 17bb46: 4952 ldr r1, =0xfffe2020 ; via 0x17bc90
299 17bb48: 4a52 ldr r2, =0x45a ; via 0x17bc94
300 17bb4a: 800a strh r2, [r1, #0]
301 17bb4c: 4a52 ldr r2, =0xfffe201e ; via 0x17bc98
302 ; ULPD setup different from TI's
303 17bb4e: 21ff mov r1, #255 ; 0xff
304 17bb50: 314b add r1, #75 ; 0x4b
305 17bb52: 8011 strh r1, [r2, #0]
306 17bb54: 4951 ldr r1, =0xfffe201c ; via 0x17bc9c
307 17bb56: 221f mov r2, #31 ; 0x1f
308 17bb58: 800a strh r2, [r1, #0]
309 17bb5a: 4951 ldr r1, =0xfffe2024 ; via 0x17bca0
310 17bb5c: 800d strh r5, [r1, #0]
311 17bb5e: 4951 ldr r1, =0xfffe2010 ; via 0x17bca4
312 17bb60: 2202 mov r2, #2
313 17bb62: 880b ldrh r3, [r1, #0]
314 17bb64: 431a orr r2, r3
315 17bb66: 800a strh r2, [r1, #0]
316 17bb68: 4b4e ldr r3, =0xfffe2010 ; via 0x17bca4
317 17bb6a: 2104 mov r1, #4
318 17bb6c: 881a ldrh r2, [r3, #0]
319 17bb6e: 4311 orr r1, r2
320 17bb70: 8019 strh r1, [r3, #0]
321 17bb72: 4c4d ldr r4, =0xfffef006 ; via 0x17bca8
322 17bb74: 2127 mov r1, #39 ; 0x27
323 17bb76: 80e1 strh r1, [r4, #6]
324 17bb78: 8a01 ldrh r1, [r0, #16] ; 0x10
325 17bb7a: 0849 lsr r1, r1, #1
326 17bb7c: d30f bcc 0x17bb9e
327 17bb7e: 8a01 ldrh r1, [r0, #16] ; 0x10
328 17bb80: 0409 lsl r1, r1, #16
329 17bb82: 0c49 lsr r1, r1, #17
330 17bb84: 0049 lsl r1, r1, #1
331 17bb86: 8201 strh r1, [r0, #16] ; 0x10
332 17bb88: 2101 mov r1, #1
333 17bb8a: e001 b 0x17bb90
334 17bb8c: 9900 ldr r1, [sp, #0]
335 17bb8e: 3101 add r1, #1
336 17bb90: 9100 str r1, [sp, #0]
337 17bb92: 9900 ldr r1, [sp, #0]
338 17bb94: 2932 cmp r1, #50 ; 0x32
339 17bb96: d3f9 bcc 0x17bb8c
340 17bb98: 8a41 ldrh r1, [r0, #18] ; 0x12
341 17bb9a: 2900 cmp r1, #0
342 17bb9c: d0fc beq 0x17bb98
343 17bb9e: f006 fb10 bl 0x1821c2 ; $AI_ClockEnable
344 17bba2: f006 fb14 bl 0x1821ce ; $AI_InitIOConfig
345 17bba6: 2027 mov r0, #39 ; 0x27
346 17bba8: 0500 lsl r0, r0, #20
347 17bbaa: 8005 strh r5, [r0, #0]
348 ; extra code not in TI's version
349 ; superfluous bit clearing in the FFFE:F006 debug register
350 17bbac: 483f ldr r0, =0xffbf ; via 0x17bcac
351 17bbae: 8821 ldrh r1, [r4, #0]
352 17bbb0: 4008 and r0, r1
353 17bbb2: 8020 strh r0, [r4, #0]
354 ; setting GPIO 2 high - shuts off UART
355 17bbb4: 2002 mov r0, #2
356 17bbb6: f006 fad3 bl 0x182160 ; $AI_SetBit
357 ; setting bits 9 and 5 in FFFE:F00A - selecting IO9 and IO13
358 17bbba: 2001 mov r0, #1
359 17bbbc: 0240 lsl r0, r0, #9
360 17bbbe: 88a1 ldrh r1, [r4, #4]
361 17bbc0: 4308 orr r0, r1
362 17bbc2: 80a0 strh r0, [r4, #4]
363 17bbc4: 2020 mov r0, #32 ; 0x20
364 17bbc6: 88a1 ldrh r1, [r4, #4]
365 17bbc8: 4308 orr r0, r1
366 17bbca: 80a0 strh r0, [r4, #4]
367 ; tail end of TI's original code
368 17bbcc: 2001 mov r0, #1
369 17bbce: f005 ffd3 bl 0x181b78 ; $TM_EnableTimer
370 17bbd2: 2002 mov r0, #2
371 17bbd4: f005 ffd0 bl 0x181b78 ; $TM_EnableTimer
372 17bbd8: b001 add sp, #4
373 17bbda: bd30 pop {r4, r5, pc}
374
375 $Init_Drivers:
376 17bbdc: b500 push {lr}
377 17bbde: f7ca fb85 bl 0x1462ec
378 17bbe2: f7cc fab7 bl 0x148154
379 17bbe6: f00c fdac bl 0x188742
380 17bbea: f00c fdab bl 0x188744
381 17bbee: f7eb f9c5 bl 0x166f7c
382 17bbf2: f7ed fcb2 bl 0x16955a
383 17bbf6: f7cc fabf bl 0x148178
384 17bbfa: f7e3 f9e6 bl 0x15efca
385 17bbfe: f007 fe1d bl 0x18383c
386 17bc02: f7ed fa9b bl 0x16913c
387 17bc06: f77e fb27 bl 0xfa258
388 17bc0a: bd00 pop {pc}
389
390 $Init_Serial_Flows:
391 17bc0c: b500 push {lr}
392 17bc0e: 4828 ldr r0, =0x83dfa8 ; via 0x17bcb0
393 17bc10: f7c9 ffea bl 0x145be8
394 17bc14: 2000 mov r0, #0
395 17bc16: 2102 mov r1, #2
396 17bc18: 2200 mov r2, #0
397 17bc1a: f7ca f85e bl 0x145cda
398 17bc1e: f7ca f8b8 bl 0x145d92
399 17bc22: bd00 pop {pc}
400
401 $Init_Unmask_IT:
402 17bc24: b500 push {lr}
403 17bc26: 2004 mov r0, #4
404 17bc28: f004 fefb bl 0x180a22 ; $IQ_Unmask
405 17bc2c: 2012 mov r0, #18 ; 0x12
406 17bc2e: f004 fef8 bl 0x180a22 ; $IQ_Unmask
407 17bc32: 2007 mov r0, #7
408 17bc34: f004 fef5 bl 0x180a22 ; $IQ_Unmask
409 17bc38: 2008 mov r0, #8
410 17bc3a: f004 fef2 bl 0x180a22 ; $IQ_Unmask
411 17bc3e: bd00 pop {pc}
412
413 $GpUnmaskRTCAlarmInterrupts:
414 17bc40: b500 push {lr}
415 17bc42: 200a mov r0, #10 ; 0xa
416 17bc44: f004 feed bl 0x180a22 ; $IQ_Unmask
417 17bc48: bd00 pop {pc}
418 17bc4a: 46c0 nop (mov r8, r8)
419
420 $AI_EnableBit:
421 182144: 4a4b ldr r2, =0xfffef00a ; via 0x182274
422 182146: 2101 mov r1, #1
423 182148: 4081 lsl r1, r0
424 18214a: 8810 ldrh r0, [r2, #0]
425 18214c: 4301 orr r1, r0
426 18214e: 8011 strh r1, [r2, #0]
427 182150: 4770 bx lr
428
429 $AI_DisableBit:
430 182152: 4a48 ldr r2, =0xfffef00a ; via 0x182274
431 182154: 2101 mov r1, #1
432 182156: 4081 lsl r1, r0
433 182158: 8810 ldrh r0, [r2, #0]
434 18215a: 4388 bic r0, r1
435 18215c: 8010 strh r0, [r2, #0]
436 18215e: 4770 bx lr
437
438 $AI_SetBit:
439 182160: 4a45 ldr r2, =0xfffe4802 ; via 0x182278
440 182162: 2101 mov r1, #1
441 182164: 4081 lsl r1, r0
442 182166: 8810 ldrh r0, [r2, #0]
443 182168: 4301 orr r1, r0
444 18216a: 8011 strh r1, [r2, #0]
445 18216c: 4770 bx lr
446
447 $AI_ResetBit:
448 18216e: 4a42 ldr r2, =0xfffe4802 ; via 0x182278
449 182170: 2101 mov r1, #1
450 182172: 4081 lsl r1, r0
451 182174: 8810 ldrh r0, [r2, #0]
452 182176: 4388 bic r0, r1
453 182178: 8010 strh r0, [r2, #0]
454 18217a: 4770 bx lr
455
456 $AI_ConfigBitAsOutput:
457 18217c: 4a3f ldr r2, =0xfffe4804 ; via 0x18227c
458 18217e: 2101 mov r1, #1
459 182180: 4081 lsl r1, r0
460 182182: 8810 ldrh r0, [r2, #0]
461 182184: 4388 bic r0, r1
462 182186: 8010 strh r0, [r2, #0]
463 182188: 4770 bx lr
464
465 $AI_ConfigBitAsInput:
466 18218a: 4a3c ldr r2, =0xfffe4804 ; via 0x18227c
467 18218c: 2101 mov r1, #1
468 18218e: 4081 lsl r1, r0
469 182190: 8810 ldrh r0, [r2, #0]
470 182192: 4301 orr r1, r0
471 182194: 8011 strh r1, [r2, #0]
472 182196: 4770 bx lr
473
474 $AI_ReadBit:
475 182198: 4939 ldr r1, =0xfffe4800 ; via 0x182280
476 18219a: 8809 ldrh r1, [r1, #0]
477 18219c: 4101 asr r1, r0
478 18219e: 07c8 lsl r0, r1, #31
479 1821a0: 0fc0 lsr r0, r0, #31
480 1821a2: 0600 lsl r0, r0, #24
481 1821a4: 0e00 lsr r0, r0, #24
482 1821a6: 4770 bx lr
483
484 $AI_Power:
485 1821a8: b500 push {lr}
486 1821aa: 2800 cmp r0, #0
487 1821ac: d101 bne 0x1821b2
488 1821ae: f7c4 fbdb bl 0x146968 ; $ABB_Power_Off
489 1821b2: bd00 pop {pc}
490
491 $AI_ResetIoConfig:
492 1821b4: 4931 ldr r1, =0xfffe4804 ; via 0x18227c
493 1821b6: 4833 ldr r0, =0xffff ; via 0x182284
494 1821b8: 8008 strh r0, [r1, #0]
495 1821ba: 482e ldr r0, =0xfffef00a ; via 0x182274
496 1821bc: 2100 mov r1, #0
497 1821be: 8001 strh r1, [r0, #0]
498 1821c0: 4770 bx lr
499
500 $AI_ClockEnable:
501 1821c2: 4931 ldr r1, =0xfffe4806 ; via 0x182288
502 1821c4: 2020 mov r0, #32 ; 0x20
503 1821c6: 880a ldrh r2, [r1, #0]
504 1821c8: 4310 orr r0, r2
505 1821ca: 8008 strh r0, [r1, #0]
506 1821cc: 4770 bx lr
507
508 $AI_InitIOConfig:
509 1821ce: b500 push {lr}
510 1821d0: f7ff fff0 bl 0x1821b4 ; $AI_ResetIoConfig
511 1821d4: 2002 mov r0, #2
512 1821d6: f7ff ffb5 bl 0x182144 ; $AI_EnableBit
513 1821da: 2003 mov r0, #3
514 1821dc: f7ff ffb2 bl 0x182144 ; $AI_EnableBit
515 1821e0: 2004 mov r0, #4
516 1821e2: f7ff ffaf bl 0x182144 ; $AI_EnableBit
517 1821e6: 2005 mov r0, #5
518 1821e8: f7ff ffac bl 0x182144 ; $AI_EnableBit
519 1821ec: 2006 mov r0, #6
520 1821ee: f7ff ffa9 bl 0x182144 ; $AI_EnableBit
521 1821f2: 2007 mov r0, #7
522 1821f4: f7ff ffa6 bl 0x182144 ; $AI_EnableBit
523 1821f8: 2008 mov r0, #8
524 1821fa: f7ff ffa3 bl 0x182144 ; $AI_EnableBit
525 1821fe: 2009 mov r0, #9
526 182200: f7ff ffa0 bl 0x182144 ; $AI_EnableBit
527 182204: 491c ldr r1, =0xfffe4802 ; via 0x182278
528 182206: 4821 ldr r0, =0x3f02 ; via 0x18228c
529 182208: 8008 strh r0, [r1, #0]
530 18220a: 2001 mov r0, #1
531 18220c: f7ff ffb6 bl 0x18217c ; $AI_ConfigBitAsOutput
532 182210: 2002 mov r0, #2
533 182212: f7ff ffb3 bl 0x18217c ; $AI_ConfigBitAsOutput
534 182216: 2005 mov r0, #5
535 182218: f7ff ffb0 bl 0x18217c ; $AI_ConfigBitAsOutput
536 18221c: 2007 mov r0, #7
537 18221e: f7ff ffad bl 0x18217c ; $AI_ConfigBitAsOutput
538 182222: 2009 mov r0, #9
539 182224: f7ff ffb1 bl 0x18218a ; $AI_ConfigBitAsInput
540 182228: 200b mov r0, #11 ; 0xb
541 18222a: f7ff ffae bl 0x18218a ; $AI_ConfigBitAsInput
542 18222e: 200d mov r0, #13 ; 0xd
543 182230: f7ff ffab bl 0x18218a ; $AI_ConfigBitAsInput
544 182234: 200e mov r0, #14 ; 0xe
545 182236: f7ff ffa1 bl 0x18217c ; $AI_ConfigBitAsOutput
546 18223a: 200f mov r0, #15 ; 0xf
547 18223c: f7ff ff9e bl 0x18217c ; $AI_ConfigBitAsOutput
548 182240: bd00 pop {pc}
549
550 $AI_SelectIOForIT:
551 182242: 0109 lsl r1, r1, #4
552 182244: 1840 add r0, r0, r1
553 182246: 0040 lsl r0, r0, #1
554 182248: 3001 add r0, #1
555 18224a: 4911 ldr r1, =0xfffe4814 ; via 0x182290
556 18224c: 8008 strh r0, [r1, #0]
557 18224e: 4770 bx lr
558
559 $AI_CheckITSource:
560 182250: 2100 mov r1, #0
561 182252: 4a10 ldr r2, =0xfffe4816 ; via 0x182294
562 182254: 8812 ldrh r2, [r2, #0]
563 182256: 4210 tst r0, r2
564 182258: d000 beq 0x18225c
565 18225a: 2101 mov r1, #1
566 18225c: 1c08 add r0, r1, #0
567 18225e: 4770 bx lr
568
569 $AI_UnmaskIT:
570 182260: 4a0d ldr r2, =0xfffe4818 ; via 0x182298
571 182262: 8811 ldrh r1, [r2, #0]
572 182264: 4381 bic r1, r0
573 182266: 8011 strh r1, [r2, #0]
574 182268: 4770 bx lr
575
576 $AI_MaskIT:
577 18226a: 4a0b ldr r2, =0xfffe4818 ; via 0x182298
578 18226c: 8811 ldrh r1, [r2, #0]
579 18226e: 4301 orr r1, r0
580 182270: 8011 strh r1, [r2, #0]
581 182272: 4770 bx lr
582
583 $INC_Initialize:
584 1887ac: b510 push {r4, lr}
585 1887ae: 1c04 add r4, r0, #0
586 1887b0: 4813 ldr r0, =0x83e688 ; via 0x188800
587 1887b2: 2101 mov r1, #1
588 1887b4: 6001 str r1, [r0, #0]
589 1887b6: f001 f883 bl 0x1898c0
590 1887ba: f001 f87d bl 0x1898b8
591 1887be: f001 f859 bl 0x189874
592 1887c2: f000 fbd9 bl 0x188f78
593 1887c6: f7fb f8e7 bl 0x183998
594 1887ca: f000 fe2f bl 0x18942c
595 1887ce: f000 fdad bl 0x18932c
596 1887d2: f000 fd8b bl 0x1892ec
597 1887d6: f000 fd99 bl 0x18930c
598 1887da: f000 fde7 bl 0x1893ac
599 1887de: f000 fdb5 bl 0x18934c
600 1887e2: f000 fe13 bl 0x18940c
601 1887e6: f7fe f881 bl 0x1868ec
602 1887ea: f000 fe2f bl 0x18944c
603 1887ee: 1c20 add r0, r4, #0
604 1887f0: f000 fd10 bl 0x189214 ; $Application_Initialize
605 1887f4: 4902 ldr r1, =0x83e688 ; via 0x188800
606 1887f6: 2002 mov r0, #2
607 1887f8: 6008 str r0, [r1, #0]
608 1887fa: f7a8 ff75 bl 0x1316e8
609 1887fe: bd10 pop {r4, pc}
610
611 $Application_Initialize:
612 189214: b500 push {lr}
613 189216: f7f2 fc39 bl 0x17ba8c ; $Init_Target
614 18921a: f7f2 fcdf bl 0x17bbdc ; $Init_Drivers
615 18921e: f7cb fa31 bl 0x154684 ; $key_pressed_times
616 189222: f736 fafa bl 0xbf81a ; $Cust_Init_Layer1
617 189226: f7cb fa2d bl 0x154684 ; $key_pressed_times
618 18922a: f7f2 fcef bl 0x17bc0c ; $Init_Serial_Flows
619 18922e: f7ad f8d6 bl 0x1363de ; $StartFrame
620 189232: f7f2 fcf7 bl 0x17bc24 ; $Init_Unmask_IT
621 189236: bd00 pop {pc}
622
623 _INC_Initialize: ; call veneer
624 189680: e92d4000 stmdb sp!, {lr}
625 189684: e28fe001 add lr, pc, #1
626 189688: e12fff1e bx lr
627 18968c: f7ff f88e bl 0x1887ac ; $INC_Initialize
628 189690: 4778 bx pc
629 189692: 46c0 nop (mov r8, r8)
630 189694: e8bd8000 ldmia sp!, {pc}