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comparison pirelli/fw-disasm @ 261:61e0be63559c

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pirelli/fw-disasm: pwr_start_CV_charging() analyzed
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 26 Dec 2017 07:13:21 +0000
parents 863b483bf9e7
children db000ea183a5
comparison
equal deleted inserted replaced
260:863b483bf9e7 261:61e0be63559c
565 2e2260: 5e08 ldrsh r0, [r1, r0] 565 2e2260: 5e08 ldrsh r0, [r1, r0]
566 2e2262: 1a10 sub r0, r2, r0 566 2e2262: 1a10 sub r0, r2, r0
567 2e2264: 0280 lsl r0, r0, #10 567 2e2264: 0280 lsl r0, r0, #10
568 2e2266: 4979 ldr r1, =0x801734 ; via 0x2e244c 568 2e2266: 4979 ldr r1, =0x801734 ; via 0x2e244c
569 2e2268: 8809 ldrh r1, [r1, #0] 569 2e2268: 8809 ldrh r1, [r1, #0]
570 2e226a: f114 ffc7 bl 0x3f71fc 570 2e226a: f114 ffc7 bl 0x3f71fc ; U$DIV
571 2e226e: 4668 mov r0, sp 571 2e226e: 4668 mov r0, sp
572 2e2270: 8101 strh r1, [r0, #8] 572 2e2270: 8101 strh r1, [r0, #8]
573 2e2272: 8900 ldrh r0, [r0, #8] 573 2e2272: 8900 ldrh r0, [r0, #8]
574 2e2274: 4976 ldr r1, =0x17749ca ; via 0x2e2450 574 2e2274: 4976 ldr r1, =0x17749ca ; via 0x2e2450
575 2e2276: 8008 strh r0, [r1, #0] 575 2e2276: 8008 strh r0, [r1, #0]
2351 32e23c: 8599 strh r1, [r3, #44] ; 0x2c 2351 32e23c: 8599 strh r1, [r3, #44] ; 0x2c
2352 32e23e: 6820 ldr r0, [r4, #0] 2352 32e23e: 6820 ldr r0, [r4, #0]
2353 32e240: 8d80 ldrh r0, [r0, #44] ; 0x2c 2353 32e240: 8d80 ldrh r0, [r0, #44] ; 0x2c
2354 32e242: b002 add sp, #8 2354 32e242: b002 add sp, #8
2355 32e244: bdf0 pop {r4, r5, r6, r7, pc} 2355 32e244: bdf0 pop {r4, r5, r6, r7, pc}
2356
2357 ; This function gets called at the beginning of CI and CV charging phases
2358 ; it clears the Ichg averaging structure
2359 32e246: 4a84 ldr r2, =0x1774e38 ; via 0x32e458
2360 32e248: 6810 ldr r0, [r2, #0]
2361 32e24a: 2100 mov r1, #0
2362 32e24c: 8601 strh r1, [r0, #48] ; 0x30
2363 32e24e: 8581 strh r1, [r0, #44] ; 0x2c
2364 32e250: 6812 ldr r2, [r2, #0]
2365 32e252: 2000 mov r0, #0
2366 32e254: 0043 lsl r3, r0, #1
2367 32e256: 18d3 add r3, r2, r3
2368 32e258: 8419 strh r1, [r3, #32] ; 0x20
2369 32e25a: 1c40 add r0, r0, #1
2370 32e25c: 0400 lsl r0, r0, #16
2371 32e25e: 0c00 lsr r0, r0, #16
2372 32e260: 2806 cmp r0, #6
2373 32e262: dbf7 blt 0x32e254
2374 32e264: 4770 bx lr
2375 32e266: 46c0 nop (mov r8, r8)
2356 2376
2357 ; This function seems to be in charge of enforcing some kind of time limit 2377 ; This function seems to be in charge of enforcing some kind of time limit
2358 ; on the charging process, with non-understood handling when this limit 2378 ; on the charging process, with non-understood handling when this limit
2359 ; is exceeded and the "Charge Process exceeds .!!" trace is emitted. 2379 ; is exceeded and the "Charge Process exceeds .!!" trace is emitted.
2360 32e294: b510 push {r4, lr} 2380 32e294: b510 push {r4, lr}
5285 0x17741e0: abb_sem 5305 0x17741e0: abb_sem
5286 5306
5287 0x17749b8: 8-bit var zeroed in pwr_stop_charging(), set to 1 in 5307 0x17749b8: 8-bit var zeroed in pwr_stop_charging(), set to 1 in
5288 pwr_start_CI_charging() and pwr_start_CV_charging() 5308 pwr_start_CI_charging() and pwr_start_CV_charging()
5289 5309
5310 0x17749c0: 16-bit var, init to 0 in pwr_start_CV_charging()
5311 0x17749c2: 16-bit var, init to 0 in pwr_start_CV_charging()
5312 0x17749c4: 16-bit var, init to 3 in pwr_start_CV_charging()
5313 0x17749c6: 16-bit var, initial CV DAC value gets written here
5314 0x17749c8: 16-bit var, init to 0 in pwr_start_CV_charging()
5315 0x17749ca: 16-bit var, initial CV DAC value gets written here
5316
5290 0x1774b78: 16-bit var, gets -4 written into it if the battery T 5317 0x1774b78: 16-bit var, gets -4 written into it if the battery T
5291 is too high, or -5 if it is too low 5318 is too high, or -5 if it is too low
5292 0x1774b7a: 16-bit var set to 0 when starting CI charging, 5319 0x1774b7a: 16-bit var set to 0 when starting CI charging,
5293 set to 1 when starting CV charging 5320 set to 1 when starting CV charging
5294 0x1774b7c: 16-bit var battery voltage in mV 5321 0x1774b7c: 16-bit var battery voltage in mV