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comparison pirelli/fw-disasm @ 251:6d9a6627b085

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pirelli/fw-disasm: continuing Switch_ON() analysis
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 24 Dec 2017 18:03:25 +0000
parents 431efc676a9c
children 2eae53bb4a4e
comparison
equal deleted inserted replaced
250:431efc676a9c 251:6d9a6627b085
635 31c746: f7ff fc68 bl 0x31c01a ; $l1_tpu_init 635 31c746: f7ff fc68 bl 0x31c01a ; $l1_tpu_init
636 31c74a: f7ff fb47 bl 0x31bddc ; $l1_dsp_init 636 31c74a: f7ff fb47 bl 0x31bddc ; $l1_dsp_init
637 31c74e: f7ff fdf9 bl 0x31c344 ; $l1_initialize_var 637 31c74e: f7ff fdf9 bl 0x31c344 ; $l1_initialize_var
638 31c752: f0dc fccb bl 0x3f90ec ; $initialize_l1pvar 638 31c752: f0dc fccb bl 0x3f90ec ; $initialize_l1pvar
639 31c756: bd30 pop {r4, r5, pc} 639 31c756: bd30 pop {r4, r5, pc}
640
641 ; The following function takes a raw ADC VBAT measurement
642 ; as input (R0) and returns the mV value per the calibration.
643 32dae8: 498b ldr r1, =0x801734 ; via 0x32dd18
644 32daea: 880a ldrh r2, [r1, #0]
645 32daec: 4342 mul r2, r0
646 32daee: 0a90 lsr r0, r2, #10
647 32daf0: 8a49 ldrh r1, [r1, #18] ; 0x12
648 32daf2: 1808 add r0, r1, r0
649 32daf4: 0400 lsl r0, r0, #16
650 32daf6: 0c00 lsr r0, r0, #16
651 32daf8: 4770 bx lr
652
653 32dafa: b500 push {lr}
654 32dafc: 49c2 ldr r1, =0x1774e70 ; via 0x32de08
655 32dafe: 6809 ldr r1, [r1, #0]
656 32db00: 8909 ldrh r1, [r1, #8]
657 32db02: 4288 cmp r0, r1
658 32db04: dc01 bgt 0x32db0a
659 32db06: 2000 mov r0, #0
660 32db08: bd00 pop {pc}
661 32db0a: 1a40 sub r0, r0, r1
662 32db0c: 4983 ldr r1, =0x357 ; via 0x32dd1c
663 32db0e: 4348 mul r0, r1
664 32db10: 217d mov r1, #125 ; 0x7d
665 32db12: 00c9 lsl r1, r1, #3
666 32db14: f0c9 fb8a bl 0x3f722c
667 32db18: 0408 lsl r0, r1, #16
668 32db1a: 0c00 lsr r0, r0, #16
669 32db1c: bd00 pop {pc}
670
671 32db1e: b510 push {r4, lr}
672 32db20: b082 sub sp, #8
673 32db22: 1c04 add r4, r0, #0
674 32db24: 48b9 ldr r0, =0xa0020 ; via 0x32de0c
675 32db26: 9000 str r0, [sp, #0]
676 32db28: a0c8 add r0, pc, #800 ; 0x320
677 32db2a: 2126 mov r1, #38 ; 0x26
678 32db2c: 1c22 add r2, r4, #0
679 32db2e: 2305 mov r3, #5
680 32db30: f0ad f880 bl 0x3dac34
681 32db34: 2c32 cmp r4, #50 ; 0x32
682 32db36: da0c bge 0x32db52
683 32db38: 2c00 cmp r4, #0
684 32db3a: dd0a ble 0x32db52
685 32db3c: 48b3 ldr r0, =0xa0020 ; via 0x32de0c
686 32db3e: 9000 str r0, [sp, #0]
687 32db40: a0cc add r0, pc, #816 ; 0x330
688 32db42: 2121 mov r1, #33 ; 0x21
689 32db44: 2200 mov r2, #0
690 32db46: 43d2 mvn r2, r2
691 32db48: 2305 mov r3, #5
692 32db4a: f0ad f873 bl 0x3dac34
693 32db4e: 2001 mov r0, #1
694 32db50: e01c b 0x32db8c
695 32db52: 2148 mov r1, #72 ; 0x48
696 32db54: 48ac ldr r0, =0x1774e70 ; via 0x32de08
697 32db56: 6800 ldr r0, [r0, #0]
698 32db58: 5c08 ldrb r0, [r1, r0]
699 32db5a: 2801 cmp r0, #1
700 32db5c: d104 bne 0x32db68
701 32db5e: 48ab ldr r0, =0xa0020 ; via 0x32de0c
702 32db60: 9000 str r0, [sp, #0]
703 32db62: a0cd add r0, pc, #820 ; 0x334
704 32db64: 2117 mov r1, #23 ; 0x17
705 32db66: e7ed b 0x32db44
706 32db68: 2c32 cmp r4, #50 ; 0x32
707 32db6a: db01 blt 0x32db70
708 32db6c: 2003 mov r0, #3
709 32db6e: e000 b 0x32db72
710 32db70: 2004 mov r0, #4
711 32db72: 43c0 mvn r0, r0
712 32db74: 49b4 ldr r1, =0x1774b78 ; via 0x32de48
713 32db76: 8008 strh r0, [r1, #0]
714 32db78: 48a4 ldr r0, =0xa0020 ; via 0x32de0c
715 32db7a: 9000 str r0, [sp, #0]
716 32db7c: a0cc add r0, pc, #816 ; 0x330
717 32db7e: 2122 mov r1, #34 ; 0x22
718 32db80: 2200 mov r2, #0
719 32db82: 43d2 mvn r2, r2
720 32db84: 2304 mov r3, #4
721 32db86: f0ad f855 bl 0x3dac34
722 32db8a: 2000 mov r0, #0
723 32db8c: b002 add sp, #8
724 32db8e: bd10 pop {r4, pc}
725
726 32dfee: b510 push {r4, lr}
727 32dff0: b082 sub sp, #8
728 32dff2: 1c04 add r4, r0, #0
729 32dff4: f000 f9a4 bl 0x32e340
730 32dff8: 4669 mov r1, sp
731 32dffa: 8048 strh r0, [r1, #2]
732 32dffc: 48ce ldr r0, =0x17729d0 ; via 0x32e338
733 32dffe: 884a ldrh r2, [r1, #2]
734 32e000: 8801 ldrh r1, [r0, #0]
735 32e002: 428a cmp r2, r1
736 32e004: db1b blt 0x32e03e
737 32e006: 2101 mov r1, #1
738 32e008: e002 b 0x32e010
739 32e00a: 4669 mov r1, sp
740 32e00c: 8809 ldrh r1, [r1, #0]
741 32e00e: 3101 add r1, #1
742 32e010: 466a mov r2, sp
743 32e012: 8011 strh r1, [r2, #0]
744 32e014: 4669 mov r1, sp
745 32e016: 8809 ldrh r1, [r1, #0]
746 32e018: 2903 cmp r1, #3
747 32e01a: da07 bge 0x32e02c
748 32e01c: 4669 mov r1, sp
749 32e01e: 8809 ldrh r1, [r1, #0]
750 32e020: 0089 lsl r1, r1, #2
751 32e022: 5a41 ldrh r1, [r0, r1]
752 32e024: 466a mov r2, sp
753 32e026: 8852 ldrh r2, [r2, #2]
754 32e028: 428a cmp r2, r1
755 32e02a: daee bge 0x32e00a
756 32e02c: 4669 mov r1, sp
757 32e02e: 8809 ldrh r1, [r1, #0]
758 32e030: 0089 lsl r1, r1, #2
759 32e032: 1840 add r0, r0, r1
760 32e034: 3802 sub r0, #2
761 32e036: 8801 ldrh r1, [r0, #0]
762 32e038: 4668 mov r0, sp
763 32e03a: 8081 strh r1, [r0, #4]
764 32e03c: e002 b 0x32e044
765 32e03e: 4669 mov r1, sp
766 32e040: 2000 mov r0, #0
767 32e042: 8088 strh r0, [r1, #4]
768 32e044: 4668 mov r0, sp
769 32e046: 8880 ldrh r0, [r0, #4]
770 32e048: 1900 add r0, r0, r4
771 32e04a: 0400 lsl r0, r0, #16
772 32e04c: 0c04 lsr r4, r0, #16
773 32e04e: 4abb ldr r2, =0x177297c ; via 0x32e33c
774 32e050: 8810 ldrh r0, [r2, #0]
775 32e052: 4284 cmp r4, r0
776 32e054: db01 blt 0x32e05a
777 32e056: 7890 ldrb r0, [r2, #2]
778 32e058: e022 b 0x32e0a0
779 32e05a: 2001 mov r0, #1
780 32e05c: e002 b 0x32e064
781 32e05e: 4668 mov r0, sp
782 32e060: 8800 ldrh r0, [r0, #0]
783 32e062: 3001 add r0, #1
784 32e064: 4669 mov r1, sp
785 32e066: 8008 strh r0, [r1, #0]
786 32e068: 4668 mov r0, sp
787 32e06a: 8800 ldrh r0, [r0, #0]
788 32e06c: 2815 cmp r0, #21 ; 0x15
789 32e06e: db0c blt 0x32e08a
790 32e070: 4668 mov r0, sp
791 32e072: 8800 ldrh r0, [r0, #0]
792 32e074: 2815 cmp r0, #21 ; 0x15
793 32e076: d106 bne 0x32e086
794 32e078: 4668 mov r0, sp
795 32e07a: 8800 ldrh r0, [r0, #0]
796 32e07c: 0080 lsl r0, r0, #2
797 32e07e: 1810 add r0, r2, r0
798 32e080: 3802 sub r0, #2
799 32e082: 7800 ldrb r0, [r0, #0]
800 32e084: e00c b 0x32e0a0
801 32e086: 2000 mov r0, #0
802 32e088: e00a b 0x32e0a0
803 32e08a: 4668 mov r0, sp
804 32e08c: 8800 ldrh r0, [r0, #0]
805 32e08e: 0080 lsl r0, r0, #2
806 32e090: 5a10 ldrh r0, [r2, r0]
807 32e092: 4284 cmp r4, r0
808 32e094: dde3 ble 0x32e05e
809 32e096: 4668 mov r0, sp
810 32e098: 8800 ldrh r0, [r0, #0]
811 32e09a: 0080 lsl r0, r0, #2
812 32e09c: 1810 add r0, r2, r0
813 32e09e: 7880 ldrb r0, [r0, #2]
814 32e0a0: b002 add sp, #8
815 32e0a2: bd10 pop {r4, pc}
816
817 32e340: b510 push {r4, lr}
818 32e342: b08c sub sp, #48 ; 0x30
819 32e344: f0b0 ffbd bl 0x3df2c2
820 32e348: 1c04 add r4, r0, #0
821 32e34a: 484a ldr r0, =0x357 ; via 0x32e474
822 32e34c: 4360 mul r0, r4
823 32e34e: 217d mov r1, #125 ; 0x7d
824 32e350: 00c9 lsl r1, r1, #3
825 32e352: f0c8 ff6b bl 0x3f722c
826 32e356: 0408 lsl r0, r1, #16
827 32e358: 1404 asr r4, r0, #16
828 32e35a: f085 fea4 bl 0x3b40a6
829 32e35e: 2800 cmp r0, #0
830 32e360: d002 beq 0x32e368
831 32e362: 34e6 add r4, #230 ; 0xe6
832 32e364: 0420 lsl r0, r4, #16
833 32e366: 1404 asr r4, r0, #16
834 32e368: 483f ldr r0, =0x8036a8 ; via 0x32e468
835 32e36a: 6800 ldr r0, [r0, #0]
836 32e36c: 2802 cmp r0, #2
837 32e36e: d805 bhi 0x32e37c
838 32e370: f085 fe99 bl 0x3b40a6
839 32e374: 2800 cmp r0, #0
840 32e376: d14a bne 0x32e40e
841 32e378: 3432 add r4, #50 ; 0x32
842 32e37a: e046 b 0x32e40a
843 32e37c: 4668 mov r0, sp
844 32e37e: f0c9 fe35 bl 0x3f7fec
845 32e382: 4668 mov r0, sp
846 32e384: 7800 ldrb r0, [r0, #0]
847 32e386: 2800 cmp r0, #0
848 32e388: d137 bne 0x32e3fa
849 32e38a: 4668 mov r0, sp
850 32e38c: 7880 ldrb r0, [r0, #2]
851 32e38e: 1ec0 sub r0, r0, #3
852 32e390: 2800 cmp r0, #0
853 32e392: d00b beq 0x32e3ac
854 32e394: 3801 sub r0, #1
855 32e396: 2800 cmp r0, #0
856 32e398: d015 beq 0x32e3c6
857 32e39a: 3801 sub r0, #1
858 32e39c: 2800 cmp r0, #0
859 32e39e: d00c beq 0x32e3ba
860 32e3a0: 3801 sub r0, #1
861 32e3a2: 2800 cmp r0, #0
862 32e3a4: d004 beq 0x32e3b0
863 32e3a6: 3802 sub r0, #2
864 32e3a8: 2800 cmp r0, #0
865 32e3aa: d10a bne 0x32e3c2
866 32e3ac: 2202 mov r2, #2
867 32e3ae: e00b b 0x32e3c8
868 32e3b0: 4668 mov r0, sp
869 32e3b2: 8980 ldrh r0, [r0, #12] ; 0xc
870 32e3b4: 28af cmp r0, #175 ; 0xaf
871 32e3b6: db04 blt 0x32e3c2
872 32e3b8: e005 b 0x32e3c6
873 32e3ba: 4668 mov r0, sp
874 32e3bc: 8980 ldrh r0, [r0, #12] ; 0xc
875 32e3be: 287d cmp r0, #125 ; 0x7d
876 32e3c0: da01 bge 0x32e3c6
877 32e3c2: 2200 mov r2, #0
878 32e3c4: e000 b 0x32e3c8
879 32e3c6: 2201 mov r2, #1
880 32e3c8: 4668 mov r0, sp
881 32e3ca: 7d00 ldrb r0, [r0, #20] ; 0x14
882 32e3cc: 2814 cmp r0, #20 ; 0x14
883 32e3ce: db02 blt 0x32e3d6
884 32e3d0: 2013 mov r0, #19 ; 0x13
885 32e3d2: 4669 mov r1, sp
886 32e3d4: 7508 strb r0, [r1, #20] ; 0x14
887 32e3d6: 4669 mov r1, sp
888 32e3d8: 7c89 ldrb r1, [r1, #18] ; 0x12
889 32e3da: 2900 cmp r1, #0
890 32e3dc: d004 beq 0x32e3e8
891 32e3de: 2114 mov r1, #20 ; 0x14
892 32e3e0: 4351 mul r1, r2
893 32e3e2: 1840 add r0, r0, r1
894 32e3e4: 4921 ldr r1, =0x52e31c ; via 0x32e46c
895 32e3e6: e003 b 0x32e3f0
896 32e3e8: 2114 mov r1, #20 ; 0x14
897 32e3ea: 4351 mul r1, r2
898 32e3ec: 1840 add r0, r0, r1
899 32e3ee: 4920 ldr r1, =0x52e394 ; via 0x32e470
900 32e3f0: 0040 lsl r0, r0, #1
901 32e3f2: 5a08 ldrh r0, [r1, r0]
902 32e3f4: 1900 add r0, r0, r4
903 32e3f6: 0400 lsl r0, r0, #16
904 32e3f8: e001 b 0x32e3fe
905 32e3fa: 3496 add r4, #150 ; 0x96
906 32e3fc: 0420 lsl r0, r4, #16
907 32e3fe: 1404 asr r4, r0, #16
908 32e400: f085 fe51 bl 0x3b40a6
909 32e404: 2800 cmp r0, #0
910 32e406: d002 beq 0x32e40e
911 32e408: 3c32 sub r4, #50 ; 0x32
912 32e40a: 0420 lsl r0, r4, #16
913 32e40c: 1404 asr r4, r0, #16
914 32e40e: 0420 lsl r0, r4, #16
915 32e410: 0c00 lsr r0, r0, #16
916 32e412: b00c add sp, #48 ; 0x30
917 32e414: bd10 pop {r4, pc}
918 32e416: 46c0 nop (mov r8, r8)
640 919
641 $ABB_Sem_Create: 920 $ABB_Sem_Create:
642 3491ee: b500 push {lr} 921 3491ee: b500 push {lr}
643 3491f0: 48f2 ldr r0, =0x17741e0 ; via 0x3495bc 922 3491f0: 48f2 ldr r0, =0x17741e0 ; via 0x3495bc
644 3491f2: a1f0 add r1, pc, #960 ; 0x3c0 923 3491f2: a1f0 add r1, pc, #960 ; 0x3c0
1481 3a14f2: 8283 strh r3, [r0, #20] ; 0x14 1760 3a14f2: 8283 strh r3, [r0, #20] ; 0x14
1482 3a14f4: 3002 add r0, #2 1761 3a14f4: 3002 add r0, #2
1483 3a14f6: 3901 sub r1, #1 1762 3a14f6: 3901 sub r1, #1
1484 3a14f8: 2900 cmp r1, #0 1763 3a14f8: 2900 cmp r1, #0
1485 3a14fa: d1f9 bne 0x3a14f0 1764 3a14fa: d1f9 bne 0x3a14f0
1765 ; "First bat.voltage (mv):" trace
1486 3a14fc: 48a9 ldr r0, =0xa0020 ; via 0x3a17a4 1766 3a14fc: 48a9 ldr r0, =0xa0020 ; via 0x3a17a4
1487 3a14fe: 9000 str r0, [sp, #0] 1767 3a14fe: 9000 str r0, [sp, #0]
1488 3a1500: a090 add r0, pc, #576 ; 0x240 1768 3a1500: a090 add r0, pc, #576 ; 0x240
1489 3a1502: 2118 mov r1, #24 ; 0x18 1769 3a1502: 2118 mov r1, #24 ; 0x18
1490 3a1504: 1c22 add r2, r4, #0 1770 3a1504: 1c22 add r2, r4, #0
1491 3a1506: 2305 mov r3, #5 1771 3a1506: 2305 mov r3, #5
1492 3a1508: f039 fb94 bl 0x3dac34 1772 3a1508: f039 fb94 bl 0x3dac34
1773 ; "BatOperationMode =" trace
1493 3a150c: 48a8 ldr r0, =0x1774cd4 ; via 0x3a17b0 1774 3a150c: 48a8 ldr r0, =0x1774cd4 ; via 0x3a17b0
1494 3a150e: 6802 ldr r2, [r0, #0] 1775 3a150e: 6802 ldr r2, [r0, #0]
1495 3a1510: 48a4 ldr r0, =0xa0020 ; via 0x3a17a4 1776 3a1510: 48a4 ldr r0, =0xa0020 ; via 0x3a17a4
1496 3a1512: 9000 str r0, [sp, #0] 1777 3a1512: 9000 str r0, [sp, #0]
1497 3a1514: a092 add r0, pc, #584 ; 0x248 1778 3a1514: a092 add r0, pc, #584 ; 0x248
3205 0x17649b8: ABB_Hisr 3486 0x17649b8: ABB_Hisr
3206 0x1764a10: ABB_HisrStack 3487 0x1764a10: ABB_HisrStack
3207 3488
3208 0x17741e0: abb_sem 3489 0x17741e0: abb_sem
3209 3490
3491 0x1774b7c: 16-bit var battery voltage in mV
3492
3493 0x1774cd4: 32-bit var BatOperationMode
3494
3210 0x1774e38: SPI_GBL_INFO_PTR 3495 0x1774e38: SPI_GBL_INFO_PTR
3211 0x1774e3c: spi_error_ft 3496 0x1774e3c: spi_error_ft
3212 3497
3213 0x1774e70: pwr_env_ctrl_blk 3498 0x1774e70: pwr_env_ctrl_blk
3214 0x1774e74: pwr_error_ft 3499 0x1774e74: pwr_error_ft