FreeCalypso > hg > freecalypso-reveng
comparison gtm900/fw-disasm @ 289:d6b65114b82d
gtm900 subdir created, fw-disasm work moved inside
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 07 Jun 2019 18:44:00 +0000 |
parents | gtm900-fw-disasm@a679cff990bf |
children |
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288:a679cff990bf | 289:d6b65114b82d |
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1 ; This disassembly is a quick look at the firmware that has been read out | |
2 ; of a Huawei GTM900-B modem module. Unlike most other phone and modem | |
3 ; vendors' firmwares, this fw exhibits very few changes relative to TI's | |
4 ; reference version. Here I have only dug far enough to get to the | |
5 ; init module with the Init_Target() function and the ARMIO module with | |
6 ; the GPIO setup. | |
7 | |
8 ; Flash boot mode 1 reset entry | |
9 0: ea0004b3 b 0x12d4 | |
10 4: ea00083d b 0x2100 | |
11 8: ea00083d b 0x2104 | |
12 c: ea00083d b 0x2108 | |
13 10: ea00083d b 0x210c | |
14 14: ea00083d b 0x2110 | |
15 18: ea00083d b 0x2114 | |
16 1c: ea00083d b 0x2118 | |
17 | |
18 _INT_Bootloader_Start: | |
19 12d4: e51f101c ldr r1, =0xffff9800 ; via 0x12c0 | |
20 12d8: e15f21b2 ldrh r2, =0x2006 ; via 0x12ce | |
21 12dc: e1c120b0 strh r2, [r1] | |
22 12e0: e5912000 ldr r2, [r1] | |
23 12e4: e2022001 and r2, r2, #1 | |
24 12e8: e3520001 cmp r2, #1 | |
25 12ec: 0afffffb beq 0x12e0 | |
26 12f0: e51f103c ldr r1, =0xfffffd00 ; via 0x12bc | |
27 12f4: e15f23b0 ldrh r2, =0x1081 ; via 0x12cc | |
28 12f8: e1c120b0 strh r2, [r1] | |
29 12fc: e51f1040 ldr r1, =0xfffffb10 ; via 0x12c4 | |
30 1300: e15f23b8 ldrh r2, =0x800 ; via 0x12d0 | |
31 1304: e1d100b0 ldrh r0, [r1] | |
32 1308: e1800002 orr r0, r0, r2 | |
33 130c: e1c100b0 strh r0, [r1] | |
34 1310: e51f1050 ldr r1, =0xffffff08 ; via 0x12c8 | |
35 1314: e15f24ba ldrh r2, =0x0 ; via 0x12d2 | |
36 1318: e1c120b0 strh r2, [r1] | |
37 ; MEMIF setup, nCS0 and nCS1 WS increased from TI's 0x2A1 | |
38 131c: e51f107c ldr r1, =0xfffffb00 ; via 0x12a8 | |
39 1320: e15f27bc ldrh r2, =0x2a3 ; via 0x12ac | |
40 1324: e1c120b0 strh r2, [r1] | |
41 1328: e15f28b2 ldrh r2, =0x2a4 ; via 0x12ae | |
42 132c: e1c120b2 strh r2, [r1, #2] | |
43 1330: e15f28b8 ldrh r2, =0x2a1 ; via 0x12b0 | |
44 1334: e1c120b4 strh r2, [r1, #4] | |
45 1338: e15f28be ldrh r2, =0x283 ; via 0x12b2 | |
46 133c: e1c120b6 strh r2, [r1, #6] | |
47 1340: e15f29b4 ldrh r2, =0x281 ; via 0x12b4 | |
48 1344: e1c120ba strh r2, [r1, #10] ; 0xa | |
49 1348: e15f29ba ldrh r2, =0xc0 ; via 0x12b6 | |
50 134c: e1c120bc strh r2, [r1, #12] ; 0xc | |
51 1350: e15f2ab0 ldrh r2, =0x40 ; via 0x12b8 | |
52 1354: e1c120b8 strh r2, [r1, #8] | |
53 1358: e15f2ab6 ldrh r2, =0x2a ; via 0x12ba | |
54 135c: e1c120be strh r2, [r1, #14] ; 0xe | |
55 1360: e59f0020 ldr r0, =0x10ab4cc ; via 0x1388 | |
56 1364: e3a01b01 mov r1, #1024 ; 0x400 | |
57 1368: e2411004 sub r1, r1, #4 | |
58 136c: e0802001 add r2, r0, r1 | |
59 1370: e3c22003 bic r2, r2, #3 | |
60 1374: e1a0d002 mov sp, r2 | |
61 1378: e92d100f stmdb sp!, {r0, r1, r2, r3, r12} | |
62 137c: eb000043 bl 0x1490 ; _sta_select_application | |
63 1380: e8bd100f ldmia sp!, {r0, r1, r2, r3, r12} | |
64 1384: ea000373 b 0x2158 ; _INT_Initialize | |
65 | |
66 2000: 00000001 | |
67 | |
68 ; .inttext exception vectors | |
69 2100: ea0000cb b 0x2434 | |
70 2104: ea0000cd b 0x2440 | |
71 2108: ea0000cf b 0x244c | |
72 210c: ea0000d1 b 0x2458 | |
73 2110: ea0000d3 b 0x2464 | |
74 2114: ea0000b7 b 0x23f8 | |
75 2118: ea0000c0 b 0x2420 | |
76 | |
77 211c: 02a102a1 | |
78 2120: 028302a1 | |
79 2124: 02c00e85 | |
80 2128: 002a0040 | |
81 212c: fffffb00 | |
82 2130: fffef006 | |
83 2134: 00000008 | |
84 2138: fffffd00 | |
85 213c: ffff9800 | |
86 2140: fffffb10 | |
87 2144: ffffff08 | |
88 2148: 20021081 | |
89 214c: f7ff0800 | |
90 2150: 00000000 | |
91 2154: 002041a0 | |
92 | |
93 _INT_Initialize: | |
94 2158: e51f1024 ldr r1, =0xffff9800 ; via 0x213c | |
95 215c: e15f21ba ldrh r2, =0x2002 ; via 0x214a | |
96 2160: e1c120b0 strh r2, [r1] | |
97 2164: e5912000 ldr r2, [r1] | |
98 2168: e2022001 and r2, r2, #1 | |
99 216c: e3520001 cmp r2, #1 | |
100 2170: 0afffffb beq 0x2164 | |
101 2174: e51f1044 ldr r1, =0xfffffd00 ; via 0x2138 | |
102 2178: e15f23b8 ldrh r2, =0x1081 ; via 0x2148 | |
103 217c: e1c120b0 strh r2, [r1] | |
104 2180: e51f1048 ldr r1, =0xfffffb10 ; via 0x2140 | |
105 2184: e15f23be ldrh r2, =0xf7ff ; via 0x214e | |
106 2188: e1d100b0 ldrh r0, [r1] | |
107 218c: e0000002 and r0, r0, r2 | |
108 2190: e1c100b0 strh r0, [r1] | |
109 2194: e51f1058 ldr r1, =0xffffff08 ; via 0x2144 | |
110 2198: e15f25b0 ldrh r2, =0x0 ; via 0x2150 | |
111 219c: e1c120b0 strh r2, [r1] | |
112 ; MEMIF setup same as TI's original, no increased WS | |
113 21a0: e51f107c ldr r1, =0xfffffb00 ; via 0x212c | |
114 21a4: e15f29b0 ldrh r2, =0x2a1 ; via 0x211c | |
115 21a8: e1c120b0 strh r2, [r1] | |
116 21ac: e15f29b6 ldrh r2, =0x2a1 ; via 0x211e | |
117 21b0: e1c120b2 strh r2, [r1, #2] | |
118 21b4: e15f29bc ldrh r2, =0x2a1 ; via 0x2120 | |
119 21b8: e1c120b4 strh r2, [r1, #4] | |
120 21bc: e15f2ab2 ldrh r2, =0x283 ; via 0x2122 | |
121 21c0: e1c120b6 strh r2, [r1, #6] | |
122 21c4: e15f2ab8 ldrh r2, =0xe85 ; via 0x2124 | |
123 21c8: e1c120ba strh r2, [r1, #10] ; 0xa | |
124 21cc: e15f2abe ldrh r2, =0x2c0 ; via 0x2126 | |
125 21d0: e1c120bc strh r2, [r1, #12] ; 0xc | |
126 21d4: e15f2bb4 ldrh r2, =0x40 ; via 0x2128 | |
127 21d8: e1c120b8 strh r2, [r1, #8] | |
128 21dc: e15f2bba ldrh r2, =0x2a ; via 0x212a | |
129 21e0: e1c120be strh r2, [r1, #14] ; 0xe | |
130 21e4: e51f10bc ldr r1, =0xfffef006 ; via 0x2130 | |
131 21e8: e1d120b0 ldrh r2, [r1] | |
132 21ec: e51f00c0 ldr r0, =0x8 ; via 0x2134 | |
133 21f0: e1800002 orr r0, r0, r2 | |
134 21f4: e1c100b0 strh r0, [r1] | |
135 21f8: e10f0000 mrs r0, CPSR | |
136 21fc: e3c0001f bic r0, r0, #31 ; 0x1f | |
137 2200: e3800013 orr r0, r0, #19 ; 0x13 | |
138 2204: e38000c0 orr r0, r0, #192 ; 0xc0 | |
139 2208: e129f000 msr CPSR_fc, r0 | |
140 ; inline bss clearing, not like in our TCS211 reference | |
141 220c: e59f031c ldr r0, =0x1000cf8 ; via 0x2530 | |
142 2210: e3a02000 mov r2, #0 | |
143 2214: e59f1318 ldr r1, =0x10ab4cc ; via 0x2534 | |
144 2218: e4802004 str r2, [r0], #4 | |
145 221c: e1500001 cmp r0, r1 | |
146 2220: 1afffffc bne 0x2218 | |
147 2224: e59f030c ldr r0, =0x800000 ; via 0x2538 | |
148 2228: e3a02000 mov r2, #0 | |
149 222c: e59f1308 ldr r1, =0x82027c ; via 0x253c | |
150 2230: e4802004 str r2, [r0], #4 | |
151 2234: e1500001 cmp r0, r1 | |
152 2238: 1afffffc bne 0x2230 | |
153 ; INT_Loaded_Flag setting, familiar code continues | |
154 223c: e3a00001 mov r0, #1 | |
155 2240: e59f12fc ldr r1, =0x10ab3e4 ; via 0x2544 | |
156 2244: e5810000 str r0, [r1] | |
157 2248: e59f02f0 ldr r0, =0x10ab5b8 ; via 0x2540 | |
158 224c: e3a01b01 mov r1, #1024 ; 0x400 | |
159 2250: e2411004 sub r1, r1, #4 | |
160 2254: e0802001 add r2, r0, r1 | |
161 2258: e1a0a000 mov r10, r0 | |
162 225c: e59f32e4 ldr r3, =0x804950 ; via 0x2548 | |
163 2260: e583a000 str r10, [r3] | |
164 2264: e1a0d002 mov sp, r2 | |
165 2268: e59f32dc ldr r3, =0x804a74 ; via 0x254c | |
166 226c: e583d000 str sp, [r3] | |
167 2270: e3a01080 mov r1, #128 ; 0x80 | |
168 2274: e0822001 add r2, r2, r1 | |
169 2278: e10f0000 mrs r0, CPSR | |
170 227c: e3c0001f bic r0, r0, #31 ; 0x1f | |
171 2280: e3800012 orr r0, r0, #18 ; 0x12 | |
172 2284: e129f000 msr CPSR_fc, r0 | |
173 2288: e1a0d002 mov sp, r2 | |
174 228c: e3a01c02 mov r1, #512 ; 0x200 | |
175 2290: e0822001 add r2, r2, r1 | |
176 2294: e10f0000 mrs r0, CPSR | |
177 2298: e3c0001f bic r0, r0, #31 ; 0x1f | |
178 229c: e3800011 orr r0, r0, #17 ; 0x11 | |
179 22a0: e129f000 msr CPSR_fc, r0 | |
180 22a4: e1a0d002 mov sp, r2 | |
181 22a8: e10f0000 mrs r0, CPSR | |
182 22ac: e3c0001f bic r0, r0, #31 ; 0x1f | |
183 22b0: e3800017 orr r0, r0, #23 ; 0x17 | |
184 22b4: e129f000 msr CPSR_fc, r0 | |
185 22b8: e59fd29c ldr sp, =0x10ab520 ; via 0x255c | |
186 22bc: e10f0000 mrs r0, CPSR | |
187 22c0: e3c0001f bic r0, r0, #31 ; 0x1f | |
188 22c4: e380001b orr r0, r0, #27 ; 0x1b | |
189 22c8: e129f000 msr CPSR_fc, r0 | |
190 22cc: e59fd288 ldr sp, =0x10ab520 ; via 0x255c | |
191 22d0: e10f0000 mrs r0, CPSR | |
192 22d4: e3c0001f bic r0, r0, #31 ; 0x1f | |
193 22d8: e3800013 orr r0, r0, #19 ; 0x13 | |
194 22dc: e129f000 msr CPSR_fc, r0 | |
195 22e0: e59f3268 ldr r3, =0x8048b8 ; via 0x2550 | |
196 22e4: e2822004 add r2, r2, #4 | |
197 22e8: e5832000 str r2, [r3] | |
198 22ec: e3a01b01 mov r1, #1024 ; 0x400 | |
199 22f0: e3c11003 bic r1, r1, #3 | |
200 22f4: e0822001 add r2, r2, r1 | |
201 22f8: e59f3254 ldr r3, =0x80493c ; via 0x2554 | |
202 22fc: e5831000 str r1, [r3] | |
203 2300: e3a01002 mov r1, #2 | |
204 2304: e59f324c ldr r3, =0x80494c ; via 0x2558 | |
205 2308: e5831000 str r1, [r3] | |
206 230c: e1a04002 mov r4, r2 | |
207 2310: eb080707 bl 0x203f34 ; _f_load_int_mem | |
208 2314: e1a02004 mov r2, r4 | |
209 2318: e59f1228 ldr r1, =0x804950 ; via 0x2548 | |
210 231c: e5910000 ldr r0, [r1] | |
211 2320: e3a030fe mov r3, #254 ; 0xfe | |
212 2324: e5c03000 strb r3, [r0] | |
213 2328: e5c03001 strb r3, [r0, #1] | |
214 232c: e5c03002 strb r3, [r0, #2] | |
215 2330: e5c03003 strb r3, [r0, #3] | |
216 2334: e4903004 ldr r3, [r0], #4 | |
217 2338: e4803004 str r3, [r0], #4 | |
218 233c: e1500002 cmp r0, r2 | |
219 2340: bafffffc blt 0x2338 | |
220 2344: e51f01f8 ldr r0, =0x2041a0 ; via 0x2154 | |
221 2348: e3700001 cmn r0, #1 | |
222 234c: 1b000084 blne 0x2564 | |
223 2350: e1a00002 mov r0, r2 | |
224 2354: ea0806ea b 0x203f04 ; _INC_Initialize | |
225 | |
226 $Init_Target: | |
227 1f30a4: b570 push {r4, r5, r6, lr} | |
228 1f30a6: b081 sub sp, #4 | |
229 1f30a8: 4d62 ldr r5, =0xfffef008 ; via 0x1f3234 | |
230 1f30aa: 2003 mov r0, #3 | |
231 1f30ac: 0340 lsl r0, r0, #13 | |
232 1f30ae: 8028 strh r0, [r5, #0] | |
233 1f30b0: f008 fc40 bl 0x1fb934 ; $TM_DisableWatchdog | |
234 1f30b4: 4860 ldr r0, =0xfffffd02 ; via 0x1f3238 | |
235 1f30b6: 2105 mov r1, #5 | |
236 1f30b8: 8802 ldrh r2, [r0, #0] | |
237 1f30ba: 4311 orr r1, r2 | |
238 1f30bc: 8001 strh r1, [r0, #0] | |
239 1f30be: 495f ldr r1, =0xff3f ; via 0x1f323c | |
240 1f30c0: 8802 ldrh r2, [r0, #0] | |
241 1f30c2: 4011 and r1, r2 | |
242 1f30c4: 8001 strh r1, [r0, #0] | |
243 1f30c6: 2180 mov r1, #128 ; 0x80 | |
244 1f30c8: 8802 ldrh r2, [r0, #0] | |
245 1f30ca: 4311 orr r1, r2 | |
246 1f30cc: 8001 strh r1, [r0, #0] | |
247 1f30ce: 495c ldr r1, =0xffdf ; via 0x1f3240 | |
248 1f30d0: 8802 ldrh r2, [r0, #0] | |
249 1f30d2: 4011 and r1, r2 | |
250 1f30d4: 8001 strh r1, [r0, #0] | |
251 1f30d6: 4e5b ldr r6, =0xfffff900 ; via 0x1f3244 | |
252 1f30d8: 20ff mov r0, #255 ; 0xff | |
253 1f30da: 0200 lsl r0, r0, #8 | |
254 1f30dc: 8030 strh r0, [r6, #0] | |
255 1f30de: 4c5a ldr r4, =0xffff9800 ; via 0x1f3248 | |
256 1f30e0: 485a ldr r0, =0xfff3 ; via 0x1f324c | |
257 1f30e2: 8821 ldrh r1, [r4, #0] | |
258 1f30e4: 4008 and r0, r1 | |
259 1f30e6: 8020 strh r0, [r4, #0] | |
260 1f30e8: 8820 ldrh r0, [r4, #0] | |
261 1f30ea: 8020 strh r0, [r4, #0] | |
262 1f30ec: 4858 ldr r0, =0xf01f ; via 0x1f3250 | |
263 1f30ee: 8821 ldrh r1, [r4, #0] | |
264 1f30f0: 4008 and r0, r1 | |
265 1f30f2: 8020 strh r0, [r4, #0] | |
266 1f30f4: 2001 mov r0, #1 | |
267 1f30f6: 0280 lsl r0, r0, #10 | |
268 1f30f8: 8821 ldrh r1, [r4, #0] | |
269 1f30fa: 4308 orr r0, r1 | |
270 1f30fc: 8020 strh r0, [r4, #0] | |
271 1f30fe: 2000 mov r0, #0 | |
272 1f3100: 2102 mov r1, #2 | |
273 1f3102: 2200 mov r2, #0 | |
274 1f3104: f009 f84e bl 0x1fc1a4 ; $CLKM_InitARMClock | |
275 ; MEMIF setup, diff from reference version is nCS1 setting with WS=4 | |
276 1f3108: 4952 ldr r1, =0xfffffb00 ; via 0x1f3254 | |
277 1f310a: 20a3 mov r0, #163 ; 0xa3 | |
278 1f310c: 8008 strh r0, [r1, #0] | |
279 1f310e: 22a4 mov r2, #164 ; 0xa4 | |
280 1f3110: 804a strh r2, [r1, #2] | |
281 1f3112: 22a5 mov r2, #165 ; 0xa5 | |
282 1f3114: 808a strh r2, [r1, #4] | |
283 1f3116: 80c8 strh r0, [r1, #6] | |
284 1f3118: 2080 mov r0, #128 ; 0x80 | |
285 1f311a: 8148 strh r0, [r1, #10] ; 0xa | |
286 1f311c: 20c0 mov r0, #192 ; 0xc0 | |
287 1f311e: 8188 strh r0, [r1, #12] ; 0xc | |
288 1f3120: 2040 mov r0, #64 ; 0x40 | |
289 1f3122: 8108 strh r0, [r1, #8] | |
290 1f3124: 2020 mov r0, #32 ; 0x20 | |
291 1f3126: 8070 strh r0, [r6, #2] | |
292 1f3128: 2000 mov r0, #0 | |
293 1f312a: 80b0 strh r0, [r6, #4] | |
294 1f312c: 2010 mov r0, #16 ; 0x10 | |
295 1f312e: 8821 ldrh r1, [r4, #0] | |
296 1f3130: 4308 orr r0, r1 | |
297 1f3132: 8020 strh r0, [r4, #0] | |
298 1f3134: 4848 ldr r0, =0xfffffa08 ; via 0x1f3258 | |
299 1f3136: 4949 ldr r1, =0xffff ; via 0x1f325c | |
300 1f3138: 8001 strh r1, [r0, #0] | |
301 1f313a: 8041 strh r1, [r0, #2] | |
302 1f313c: 2103 mov r1, #3 | |
303 1f313e: 8181 strh r1, [r0, #12] ; 0xc | |
304 1f3140: f007 f980 bl 0x1fa444 ; $IQ_SetupInterrupts | |
305 1f3144: 4846 ldr r0, =0xfffffc00 ; via 0x1f3260 | |
306 1f3146: 2124 mov r1, #36 ; 0x24 | |
307 1f3148: 8001 strh r1, [r0, #0] | |
308 1f314a: 210d mov r1, #13 ; 0xd | |
309 1f314c: 8041 strh r1, [r0, #2] | |
310 1f314e: 2400 mov r4, #0 | |
311 1f3150: 4844 ldr r0, =0xfffe2016 ; via 0x1f3264 | |
312 1f3152: 8004 strh r4, [r0, #0] | |
313 1f3154: 4944 ldr r1, =0xfffe2014 ; via 0x1f3268 | |
314 1f3156: 2002 mov r0, #2 | |
315 1f3158: 8008 strh r0, [r1, #0] | |
316 1f315a: 4944 ldr r1, =0xfffe2002 ; via 0x1f326c | |
317 1f315c: 2084 mov r0, #132 ; 0x84 | |
318 1f315e: 8008 strh r0, [r1, #0] | |
319 1f3160: 4843 ldr r0, =0xfffe2000 ; via 0x1f3270 | |
320 1f3162: 4944 ldr r1, =0x3de0 ; via 0x1f3274 | |
321 1f3164: 8001 strh r1, [r0, #0] | |
322 1f3166: 4a44 ldr r2, =0xfffe2022 ; via 0x1f3278 | |
323 1f3168: 210c mov r1, #12 ; 0xc | |
324 1f316a: 8011 strh r1, [r2, #0] | |
325 1f316c: 4a43 ldr r2, =0xfffe2020 ; via 0x1f327c | |
326 1f316e: 4944 ldr r1, =0x45a ; via 0x1f3280 | |
327 1f3170: 8011 strh r1, [r2, #0] | |
328 1f3172: 4a44 ldr r2, =0xfffe201e ; via 0x1f3284 | |
329 1f3174: 21a5 mov r1, #165 ; 0xa5 | |
330 1f3176: 0089 lsl r1, r1, #2 | |
331 1f3178: 8011 strh r1, [r2, #0] | |
332 1f317a: 4a43 ldr r2, =0xfffe201c ; via 0x1f3288 | |
333 1f317c: 211f mov r1, #31 ; 0x1f | |
334 1f317e: 8011 strh r1, [r2, #0] | |
335 1f3180: 4942 ldr r1, =0xfffe2024 ; via 0x1f328c | |
336 1f3182: 800c strh r4, [r1, #0] | |
337 1f3184: 4b42 ldr r3, =0xfffe2010 ; via 0x1f3290 | |
338 1f3186: 2202 mov r2, #2 | |
339 1f3188: 8819 ldrh r1, [r3, #0] | |
340 1f318a: 430a orr r2, r1 | |
341 1f318c: 801a strh r2, [r3, #0] | |
342 1f318e: 4a40 ldr r2, =0xfffe2010 ; via 0x1f3290 | |
343 1f3190: 2104 mov r1, #4 | |
344 1f3192: 8813 ldrh r3, [r2, #0] | |
345 1f3194: 4319 orr r1, r3 | |
346 1f3196: 8011 strh r1, [r2, #0] | |
347 1f3198: 2127 mov r1, #39 ; 0x27 | |
348 1f319a: 80a9 strh r1, [r5, #4] | |
349 1f319c: 8a01 ldrh r1, [r0, #16] ; 0x10 | |
350 1f319e: 0849 lsr r1, r1, #1 | |
351 1f31a0: d30f bcc 0x1f31c2 | |
352 1f31a2: 8a01 ldrh r1, [r0, #16] ; 0x10 | |
353 1f31a4: 0409 lsl r1, r1, #16 | |
354 1f31a6: 0c49 lsr r1, r1, #17 | |
355 1f31a8: 0049 lsl r1, r1, #1 | |
356 1f31aa: 8201 strh r1, [r0, #16] ; 0x10 | |
357 1f31ac: 2101 mov r1, #1 | |
358 1f31ae: e001 b 0x1f31b4 | |
359 1f31b0: 9900 ldr r1, [sp, #0] | |
360 1f31b2: 3101 add r1, #1 | |
361 1f31b4: 9100 str r1, [sp, #0] | |
362 1f31b6: 9900 ldr r1, [sp, #0] | |
363 1f31b8: 2932 cmp r1, #50 ; 0x32 | |
364 1f31ba: d3f9 bcc 0x1f31b0 | |
365 1f31bc: 8a41 ldrh r1, [r0, #18] ; 0x12 | |
366 1f31be: 2900 cmp r1, #0 | |
367 1f31c0: d0fc beq 0x1f31bc | |
368 1f31c2: f009 f8d4 bl 0x1fc36e ; $AI_ClockEnable | |
369 1f31c6: f009 f8d8 bl 0x1fc37a ; $AI_InitIOConfig | |
370 ; Huawei's added LPG setup function | |
371 1f31ca: f009 fa5e bl 0x1fc68a | |
372 1f31ce: 2027 mov r0, #39 ; 0x27 | |
373 1f31d0: 0500 lsl r0, r0, #20 | |
374 1f31d2: 8004 strh r4, [r0, #0] | |
375 1f31d4: 2001 mov r0, #1 | |
376 1f31d6: f008 fbbb bl 0x1fb950 ; $TM_EnableTimer | |
377 1f31da: 2002 mov r0, #2 | |
378 1f31dc: f008 fbb8 bl 0x1fb950 ; $TM_EnableTimer | |
379 1f31e0: b001 add sp, #4 | |
380 1f31e2: bd70 pop {r4, r5, r6, pc} | |
381 | |
382 $Init_Drivers: | |
383 1f31e4: b500 push {lr} | |
384 1f31e6: f7b4 f9a5 bl 0x1a7534 | |
385 1f31ea: f7c9 fe00 bl 0x1bcdee | |
386 1f31ee: f74e ffd6 bl 0x14219e | |
387 1f31f2: f767 f9c7 bl 0x15a584 | |
388 1f31f6: f7d7 fd26 bl 0x1cac46 | |
389 1f31fa: f735 f841 bl 0x128280 | |
390 1f31fe: bd00 pop {pc} | |
391 | |
392 $Init_Serial_Flows: | |
393 1f3200: b500 push {lr} | |
394 1f3202: 4824 ldr r0, =0x10aa938 ; via 0x1f3294 | |
395 1f3204: f7b2 fa8a bl 0x1a571c | |
396 1f3208: 2000 mov r0, #0 | |
397 1f320a: 2103 mov r1, #3 | |
398 1f320c: 2200 mov r2, #0 | |
399 1f320e: f7b2 fb26 bl 0x1a585e | |
400 1f3212: f7b2 fb80 bl 0x1a5916 | |
401 1f3216: bd00 pop {pc} | |
402 | |
403 $Init_Unmask_IT: | |
404 1f3218: b500 push {lr} | |
405 1f321a: 2004 mov r0, #4 | |
406 1f321c: f007 f973 bl 0x1fa506 | |
407 1f3220: 2012 mov r0, #18 ; 0x12 | |
408 1f3222: f007 f970 bl 0x1fa506 | |
409 1f3226: 2007 mov r0, #7 | |
410 1f3228: f007 f96d bl 0x1fa506 | |
411 1f322c: 2008 mov r0, #8 | |
412 1f322e: f007 f96a bl 0x1fa506 | |
413 1f3232: bd00 pop {pc} | |
414 | |
415 $AI_EnableBit: | |
416 1fc2f0: 4a48 ldr r2, =0xfffef00a ; via 0x1fc414 | |
417 1fc2f2: 2101 mov r1, #1 | |
418 1fc2f4: 4081 lsl r1, r0 | |
419 1fc2f6: 8810 ldrh r0, [r2, #0] | |
420 1fc2f8: 4301 orr r1, r0 | |
421 1fc2fa: 8011 strh r1, [r2, #0] | |
422 1fc2fc: 4770 bx lr | |
423 | |
424 $AI_DisableBit: | |
425 1fc2fe: 4a45 ldr r2, =0xfffef00a ; via 0x1fc414 | |
426 1fc300: 2101 mov r1, #1 | |
427 1fc302: 4081 lsl r1, r0 | |
428 1fc304: 8810 ldrh r0, [r2, #0] | |
429 1fc306: 4388 bic r0, r1 | |
430 1fc308: 8010 strh r0, [r2, #0] | |
431 1fc30a: 4770 bx lr | |
432 | |
433 $AI_SetBit: | |
434 1fc30c: 4a42 ldr r2, =0xfffe4802 ; via 0x1fc418 | |
435 1fc30e: 2101 mov r1, #1 | |
436 1fc310: 4081 lsl r1, r0 | |
437 1fc312: 8810 ldrh r0, [r2, #0] | |
438 1fc314: 4301 orr r1, r0 | |
439 1fc316: 8011 strh r1, [r2, #0] | |
440 1fc318: 4770 bx lr | |
441 | |
442 $AI_ResetBit: | |
443 1fc31a: 4a3f ldr r2, =0xfffe4802 ; via 0x1fc418 | |
444 1fc31c: 2101 mov r1, #1 | |
445 1fc31e: 4081 lsl r1, r0 | |
446 1fc320: 8810 ldrh r0, [r2, #0] | |
447 1fc322: 4388 bic r0, r1 | |
448 1fc324: 8010 strh r0, [r2, #0] | |
449 1fc326: 4770 bx lr | |
450 | |
451 $AI_ConfigBitAsOutput: | |
452 1fc328: 4a3c ldr r2, =0xfffe4804 ; via 0x1fc41c | |
453 1fc32a: 2101 mov r1, #1 | |
454 1fc32c: 4081 lsl r1, r0 | |
455 1fc32e: 8810 ldrh r0, [r2, #0] | |
456 1fc330: 4388 bic r0, r1 | |
457 1fc332: 8010 strh r0, [r2, #0] | |
458 1fc334: 4770 bx lr | |
459 | |
460 $AI_ConfigBitAsInput: | |
461 1fc336: 4a39 ldr r2, =0xfffe4804 ; via 0x1fc41c | |
462 1fc338: 2101 mov r1, #1 | |
463 1fc33a: 4081 lsl r1, r0 | |
464 1fc33c: 8810 ldrh r0, [r2, #0] | |
465 1fc33e: 4301 orr r1, r0 | |
466 1fc340: 8011 strh r1, [r2, #0] | |
467 1fc342: 4770 bx lr | |
468 | |
469 $AI_ReadBit: | |
470 1fc344: 4936 ldr r1, =0xfffe4800 ; via 0x1fc420 | |
471 1fc346: 8809 ldrh r1, [r1, #0] | |
472 1fc348: 4101 asr r1, r0 | |
473 1fc34a: 07c8 lsl r0, r1, #31 | |
474 1fc34c: 0fc0 lsr r0, r0, #31 | |
475 1fc34e: 0600 lsl r0, r0, #24 | |
476 1fc350: 0e00 lsr r0, r0, #24 | |
477 1fc352: 4770 bx lr | |
478 | |
479 $AI_Power: | |
480 1fc354: b500 push {lr} | |
481 1fc356: 2800 cmp r0, #0 | |
482 1fc358: d101 bne 0x1fc35e | |
483 1fc35a: f7ab fc1b bl 0x1a7b94 ; $ABB_Power_Off | |
484 1fc35e: bd00 pop {pc} | |
485 | |
486 $AI_ResetIoConfig: | |
487 1fc360: 492e ldr r1, =0xfffe4804 ; via 0x1fc41c | |
488 1fc362: 4830 ldr r0, =0xffff ; via 0x1fc424 | |
489 1fc364: 8008 strh r0, [r1, #0] | |
490 1fc366: 482b ldr r0, =0xfffef00a ; via 0x1fc414 | |
491 1fc368: 2100 mov r1, #0 | |
492 1fc36a: 8001 strh r1, [r0, #0] | |
493 1fc36c: 4770 bx lr | |
494 | |
495 $AI_ClockEnable: | |
496 1fc36e: 492e ldr r1, =0xfffe4806 ; via 0x1fc428 | |
497 1fc370: 2020 mov r0, #32 ; 0x20 | |
498 1fc372: 880a ldrh r2, [r1, #0] | |
499 1fc374: 4310 orr r0, r2 | |
500 1fc376: 8008 strh r0, [r1, #0] | |
501 1fc378: 4770 bx lr | |
502 | |
503 $AI_InitIOConfig: | |
504 1fc37a: b500 push {lr} | |
505 1fc37c: f7ff fff0 bl 0x1fc360 ; $AI_ResetIoConfig | |
506 1fc380: 2002 mov r0, #2 | |
507 1fc382: f7ff ffb5 bl 0x1fc2f0 ; $AI_EnableBit | |
508 1fc386: 2004 mov r0, #4 | |
509 1fc388: f7ff ffb2 bl 0x1fc2f0 ; $AI_EnableBit | |
510 1fc38c: 2005 mov r0, #5 | |
511 1fc38e: f7ff ffaf bl 0x1fc2f0 ; $AI_EnableBit | |
512 1fc392: 2006 mov r0, #6 | |
513 1fc394: f7ff ffac bl 0x1fc2f0 ; $AI_EnableBit | |
514 1fc398: 2007 mov r0, #7 | |
515 1fc39a: f7ff ffa9 bl 0x1fc2f0 ; $AI_EnableBit | |
516 1fc39e: 2008 mov r0, #8 | |
517 1fc3a0: f7ff ffa6 bl 0x1fc2f0 ; $AI_EnableBit | |
518 1fc3a4: 2009 mov r0, #9 | |
519 1fc3a6: f7ff ffa3 bl 0x1fc2f0 ; $AI_EnableBit | |
520 1fc3aa: 491b ldr r1, =0xfffe4802 ; via 0x1fc418 | |
521 1fc3ac: 481f ldr r0, =0x3f02 ; via 0x1fc42c | |
522 1fc3ae: 8008 strh r0, [r1, #0] | |
523 1fc3b0: 2000 mov r0, #0 | |
524 1fc3b2: f7ff ffb9 bl 0x1fc328 ; $AI_ConfigBitAsOutput | |
525 1fc3b6: 2001 mov r0, #1 | |
526 1fc3b8: f7ff ffb6 bl 0x1fc328 ; $AI_ConfigBitAsOutput | |
527 1fc3bc: 2002 mov r0, #2 | |
528 1fc3be: f7ff ffb3 bl 0x1fc328 ; $AI_ConfigBitAsOutput | |
529 1fc3c2: 2005 mov r0, #5 | |
530 1fc3c4: f7ff ffb0 bl 0x1fc328 ; $AI_ConfigBitAsOutput | |
531 1fc3c8: 2007 mov r0, #7 | |
532 1fc3ca: f7ff ffad bl 0x1fc328 ; $AI_ConfigBitAsOutput | |
533 1fc3ce: 2009 mov r0, #9 | |
534 1fc3d0: f7ff ffaa bl 0x1fc328 ; $AI_ConfigBitAsOutput | |
535 1fc3d4: 200e mov r0, #14 ; 0xe | |
536 1fc3d6: f7ff ffa7 bl 0x1fc328 ; $AI_ConfigBitAsOutput | |
537 1fc3da: 200f mov r0, #15 ; 0xf | |
538 1fc3dc: f7ff ffa4 bl 0x1fc328 ; $AI_ConfigBitAsOutput | |
539 1fc3e0: bd00 pop {pc} | |
540 | |
541 $AI_SelectIOForIT: | |
542 1fc3e2: 0109 lsl r1, r1, #4 | |
543 1fc3e4: 1840 add r0, r0, r1 | |
544 1fc3e6: 0040 lsl r0, r0, #1 | |
545 1fc3e8: 3001 add r0, #1 | |
546 1fc3ea: 4911 ldr r1, =0xfffe4814 ; via 0x1fc430 | |
547 1fc3ec: 8008 strh r0, [r1, #0] | |
548 1fc3ee: 4770 bx lr | |
549 | |
550 $AI_CheckITSource: | |
551 1fc3f0: 2100 mov r1, #0 | |
552 1fc3f2: 4a10 ldr r2, =0xfffe4816 ; via 0x1fc434 | |
553 1fc3f4: 8812 ldrh r2, [r2, #0] | |
554 1fc3f6: 4210 tst r0, r2 | |
555 1fc3f8: d000 beq 0x1fc3fc | |
556 1fc3fa: 2101 mov r1, #1 | |
557 1fc3fc: 1c08 add r0, r1, #0 | |
558 1fc3fe: 4770 bx lr | |
559 | |
560 $AI_UnmaskIT: | |
561 1fc400: 4a0d ldr r2, =0xfffe4818 ; via 0x1fc438 | |
562 1fc402: 8811 ldrh r1, [r2, #0] | |
563 1fc404: 4381 bic r1, r0 | |
564 1fc406: 8011 strh r1, [r2, #0] | |
565 1fc408: 4770 bx lr | |
566 | |
567 $AI_MaskIT: | |
568 1fc40a: 4a0b ldr r2, =0xfffe4818 ; via 0x1fc438 | |
569 1fc40c: 8811 ldrh r1, [r2, #0] | |
570 1fc40e: 4301 orr r1, r0 | |
571 1fc410: 8011 strh r1, [r2, #0] | |
572 1fc412: 4770 bx lr | |
573 | |
574 ; Huawei's added LPG setup function | |
575 1fc68a: b500 push {lr} | |
576 1fc68c: 490e ldr r1, =0xfffef008 ; via 0x1fc6c8 | |
577 1fc68e: 2040 mov r0, #64 ; 0x40 | |
578 1fc690: 880a ldrh r2, [r1, #0] | |
579 1fc692: 4310 orr r0, r2 | |
580 1fc694: 8008 strh r0, [r1, #0] | |
581 1fc696: 490d ldr r1, =0xfffe7801 ; via 0x1fc6cc | |
582 1fc698: 2001 mov r0, #1 | |
583 1fc69a: 7008 strb r0, [r1, #0] | |
584 1fc69c: 2000 mov r0, #0 | |
585 1fc69e: f7ff ffcb bl 0x1fc638 | |
586 1fc6a2: bd00 pop {pc} | |
587 | |
588 $INC_Initialize: | |
589 202fbc: b530 push {r4, r5, lr} | |
590 202fbe: 1c05 add r5, r0, #0 | |
591 202fc0: 4c13 ldr r4, =0x10ab3cc ; via 0x203010 | |
592 202fc2: 2001 mov r0, #1 | |
593 202fc4: 6020 str r0, [r4, #0] | |
594 202fc6: f001 f8e3 bl 0x204190 | |
595 202fca: f001 f8e5 bl 0x204198 | |
596 202fce: f001 f8b3 bl 0x204138 | |
597 202fd2: f000 fc21 bl 0x203818 | |
598 202fd6: f7fc f8e9 bl 0x1ff1ac | |
599 202fda: f000 fe2b bl 0x203c34 | |
600 202fde: f000 fdf9 bl 0x203bd4 | |
601 202fe2: f000 fe17 bl 0x203c14 | |
602 202fe6: f000 fde5 bl 0x203bb4 | |
603 202fea: f000 fe43 bl 0x203c74 | |
604 202fee: f000 fe01 bl 0x203bf4 | |
605 202ff2: f000 fe4f bl 0x203c94 | |
606 202ff6: f7fe fa33 bl 0x201460 | |
607 202ffa: f000 fe2b bl 0x203c54 | |
608 202ffe: 1c28 add r0, r5, #0 | |
609 203000: f000 fea8 bl 0x203d54 ; $Application_Initialize | |
610 203004: 2002 mov r0, #2 | |
611 203006: 6020 str r0, [r4, #0] | |
612 203008: f782 ff04 bl 0x185e14 | |
613 20300c: bd30 pop {r4, r5, pc} | |
614 20300e: 46c0 nop (mov r8, r8) | |
615 | |
616 $Application_Initialize: | |
617 203d54: b500 push {lr} | |
618 203d56: f7ef f9a5 bl 0x1f30a4 ; $Init_Target | |
619 203d5a: f7ef fa43 bl 0x1f31e4 ; $Init_Drivers | |
620 203d5e: f077 fed5 bl 0x27bb0c ; $Cust_Init_Layer1 | |
621 203d62: f7ef fa4d bl 0x1f3200 ; $Init_Serial_Flows | |
622 203d66: f766 fb73 bl 0x16a450 ; $StartFrame | |
623 203d6a: f7ef fa55 bl 0x1f3218 ; $Init_Unmask_IT | |
624 203d6e: bd00 pop {pc} | |
625 | |
626 _INC_Initialize: ; ARM->Thumb call veneer | |
627 203f04: e92d4000 stmdb sp!, {lr} | |
628 203f08: e28fe001 add lr, pc, #1 | |
629 203f0c: e12fff1e bx lr | |
630 203f10: f7ff f854 bl 0x202fbc | |
631 203f14: 4778 bx pc | |
632 203f16: 46c0 nop (mov r8, r8) | |
633 203f18: e8bd8000 ldmia sp!, {pc} |