FreeCalypso > hg > freecalypso-reveng
comparison pirelli/fw-disasm @ 230:f5ad21985e20
pirelli/fw-disasm: beginning of proper static RE
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 21 Dec 2017 21:54:39 +0000 |
parents | |
children | 4cd01d1458df |
comparison
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229:84a4f6ef2d28 | 230:f5ad21985e20 |
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1 .inttext exception vectors: | |
2 | |
3 40000: ea0000d0 b 0x40348 | |
4 40004: ea0000d2 b 0x40354 | |
5 40008: ea0000d4 b 0x40360 | |
6 4000c: ea0000d6 b 0x4036c | |
7 40010: ea0000d8 b 0x40378 | |
8 40014: ea0000bc b 0x4030c | |
9 40018: ea0000c5 b 0x40334 | |
10 | |
11 _c_int00: | |
12 4001c: 02a102a1 | |
13 40020: 028302a1 | |
14 40024: 02c00e85 | |
15 40028: 002a0040 | |
16 4002c: fffffb00 | |
17 40030: fffef006 | |
18 40034: 00000008 | |
19 40038: fffffd00 | |
20 4003c: ffff9800 | |
21 40040: fffffb10 | |
22 40044: ffffff08 | |
23 40048: 20021081 | |
24 4004c: f7ff0800 | |
25 40050: 00000000 | |
26 40054: 00536e48 ; cinit | |
27 | |
28 _INT_Initialize: | |
29 40058: e51f1024 ldr r1, =0xffff9800 ; via 0x4003c | |
30 4005c: e15f21ba ldrh r2, =0x2002 ; via 0x4004a | |
31 40060: e1c120b0 strh r2, [r1] | |
32 40064: e5912000 ldr r2, [r1] | |
33 40068: e2022001 and r2, r2, #1 | |
34 4006c: e3520001 cmp r2, #1 | |
35 40070: 0afffffb beq 0x40064 | |
36 40074: e51f1044 ldr r1, =0xfffffd00 ; via 0x40038 | |
37 40078: e15f23b8 ldrh r2, =0x1081 ; via 0x40048 | |
38 4007c: e1c120b0 strh r2, [r1] | |
39 40080: e51f1048 ldr r1, =0xfffffb10 ; via 0x40040 | |
40 40084: e15f23be ldrh r2, =0xf7ff ; via 0x4004e | |
41 40088: e1d100b0 ldrh r0, [r1] | |
42 4008c: e0000002 and r0, r0, r2 | |
43 40090: e1c100b0 strh r0, [r1] | |
44 40094: e51f1058 ldr r1, =0xffffff08 ; via 0x40044 | |
45 40098: e15f25b0 ldrh r2, =0x0 ; via 0x40050 | |
46 4009c: e1c120b0 strh r2, [r1] | |
47 400a0: e51f107c ldr r1, =0xfffffb00 ; via 0x4002c | |
48 400a4: e15f29b0 ldrh r2, =0x2a1 ; via 0x4001c | |
49 400a8: e1c120b0 strh r2, [r1] | |
50 400ac: e15f29b6 ldrh r2, =0x2a1 ; via 0x4001e | |
51 400b0: e1c120b2 strh r2, [r1, #2] | |
52 400b4: e15f29bc ldrh r2, =0x2a1 ; via 0x40020 | |
53 400b8: e1c120b4 strh r2, [r1, #4] | |
54 400bc: e15f2ab2 ldrh r2, =0x283 ; via 0x40022 | |
55 400c0: e1c120b6 strh r2, [r1, #6] | |
56 400c4: e15f2ab8 ldrh r2, =0xe85 ; via 0x40024 | |
57 400c8: e1c120ba strh r2, [r1, #10] ; 0xa | |
58 400cc: e15f2abe ldrh r2, =0x2c0 ; via 0x40026 | |
59 400d0: e1c120bc strh r2, [r1, #12] ; 0xc | |
60 400d4: e15f2bb4 ldrh r2, =0x40 ; via 0x40028 | |
61 400d8: e1c120b8 strh r2, [r1, #8] | |
62 400dc: e15f2bba ldrh r2, =0x2a ; via 0x4002a | |
63 400e0: e1c120be strh r2, [r1, #14] ; 0xe | |
64 400e4: e51f10bc ldr r1, =0xfffef006 ; via 0x40030 | |
65 400e8: e1d120b0 ldrh r2, [r1] | |
66 400ec: e51f00c0 ldr r0, =0x8 ; via 0x40034 | |
67 400f0: e1800002 orr r0, r0, r2 | |
68 400f4: e1c100b0 strh r0, [r1] | |
69 400f8: e10f0000 mrs r0, CPSR | |
70 400fc: e3c0001f bic r0, r0, #31 ; 0x1f | |
71 40100: e3800013 orr r0, r0, #19 ; 0x13 | |
72 40104: e38000c0 orr r0, r0, #192 ; 0xc0 | |
73 40108: e129f000 msr CPSR_fc, r0 | |
74 4010c: e59f0340 ldr r0, =0x10000e8 ; via 0x40454 | |
75 40110: e3a01e46 mov r1, #1120 ; 0x460 | |
76 40114: e2411004 sub r1, r1, #4 | |
77 40118: e0802001 add r2, r0, r1 | |
78 4011c: e1a0d002 mov sp, r2 | |
79 40120: e92d000f stmdb sp!, {r0, r1, r2, r3} | |
80 40124: e59f0318 ldr r0, =0x1000be8 ; via 0x40444 | |
81 40128: e59f2318 ldr r2, =0x17751ec ; via 0x40448 | |
82 4012c: e0422000 sub r2, r2, r0 | |
83 40130: e3a01000 mov r1, #0 | |
84 40134: eb0000e1 bl 0x404c0 | |
85 40138: e59f030c ldr r0, =0x800000 ; via 0x4044c | |
86 4013c: e59f230c ldr r2, =0x82d1ec ; via 0x40450 | |
87 40140: e0422000 sub r2, r2, r0 | |
88 40144: e3a01000 mov r1, #0 | |
89 40148: eb0000dc bl 0x404c0 | |
90 4014c: e8bd000f ldmia sp!, {r0, r1, r2, r3} | |
91 40150: e3a00001 mov r0, #1 | |
92 40154: e59f12fc ldr r1, =0x1775074 ; via 0x40458 | |
93 40158: e5810000 str r0, [r1] | |
94 4015c: e59f02f0 ldr r0, =0x10000e8 ; via 0x40454 | |
95 40160: e3a01e46 mov r1, #1120 ; 0x460 | |
96 40164: e2411004 sub r1, r1, #4 | |
97 40168: e0802001 add r2, r0, r1 | |
98 4016c: e1a0a000 mov r10, r0 | |
99 40170: e59f32e4 ldr r3, =0x1775044 ; via 0x4045c | |
100 40174: e583a000 str r10, [r3] | |
101 40178: e1a0d002 mov sp, r2 | |
102 4017c: e59f32dc ldr r3, =0x175635c ; via 0x40460 | |
103 40180: e583d000 str sp, [r3] | |
104 40184: e3a01080 mov r1, #128 ; 0x80 | |
105 40188: e0822001 add r2, r2, r1 | |
106 4018c: e10f0000 mrs r0, CPSR | |
107 40190: e3c0001f bic r0, r0, #31 ; 0x1f | |
108 40194: e3800012 orr r0, r0, #18 ; 0x12 | |
109 40198: e129f000 msr CPSR_fc, r0 | |
110 4019c: e1a0d002 mov sp, r2 | |
111 401a0: e3a01c02 mov r1, #512 ; 0x200 | |
112 401a4: e0822001 add r2, r2, r1 | |
113 401a8: e10f0000 mrs r0, CPSR | |
114 401ac: e3c0001f bic r0, r0, #31 ; 0x1f | |
115 401b0: e3800011 orr r0, r0, #17 ; 0x11 | |
116 401b4: e129f000 msr CPSR_fc, r0 | |
117 401b8: e1a0d002 mov sp, r2 | |
118 401bc: e10f0000 mrs r0, CPSR | |
119 401c0: e3c0001f bic r0, r0, #31 ; 0x1f | |
120 401c4: e3800017 orr r0, r0, #23 ; 0x17 | |
121 401c8: e129f000 msr CPSR_fc, r0 | |
122 401cc: e59fd29c ldr sp, =0x1000050 ; via 0x40470 | |
123 401d0: e10f0000 mrs r0, CPSR | |
124 401d4: e3c0001f bic r0, r0, #31 ; 0x1f | |
125 401d8: e380001b orr r0, r0, #27 ; 0x1b | |
126 401dc: e129f000 msr CPSR_fc, r0 | |
127 401e0: e59fd288 ldr sp, =0x1000050 ; via 0x40470 | |
128 401e4: e10f0000 mrs r0, CPSR | |
129 401e8: e3c0001f bic r0, r0, #31 ; 0x1f | |
130 401ec: e3800013 orr r0, r0, #19 ; 0x13 | |
131 401f0: e129f000 msr CPSR_fc, r0 | |
132 401f4: e59f3268 ldr r3, =0x176f458 ; via 0x40464 | |
133 401f8: e2822004 add r2, r2, #4 | |
134 401fc: e5832000 str r2, [r3] | |
135 40200: e3a01b01 mov r1, #1024 ; 0x400 | |
136 40204: e3c11003 bic r1, r1, #3 | |
137 40208: e0822001 add r2, r2, r1 | |
138 4020c: e59f3254 ldr r3, =0x176f4dc ; via 0x40468 | |
139 40210: e5831000 str r1, [r3] | |
140 40214: e3a01002 mov r1, #2 | |
141 40218: e59f324c ldr r3, =0x176f4ec ; via 0x4046c | |
142 4021c: e5831000 str r1, [r3] | |
143 40220: e1a04002 mov r4, r2 | |
144 40224: eb0e99e4 bl 0x3e69bc ; _f_load_int_mem | |
145 40228: e1a02004 mov r2, r4 | |
146 4022c: e59f1228 ldr r1, =0x1775044 ; via 0x4045c | |
147 40230: e5910000 ldr r0, [r1] | |
148 40234: e3a030fe mov r3, #254 ; 0xfe | |
149 40238: e5c03000 strb r3, [r0] | |
150 4023c: e5c03001 strb r3, [r0, #1] | |
151 40240: e5c03002 strb r3, [r0, #2] | |
152 40244: e5c03003 strb r3, [r0, #3] | |
153 40248: e4903004 ldr r3, [r0], #4 | |
154 4024c: e4803004 str r3, [r0], #4 | |
155 40250: e1500002 cmp r0, r2 | |
156 40254: bafffffc blt 0x4024c | |
157 40258: e51f020c ldr r0, =0x536e48 ; via 0x40054 | |
158 4025c: e3700001 cmn r0, #1 | |
159 40260: 1b000084 blne 0x40478 | |
160 40264: e1a00002 mov r0, r2 | |
161 40268: ea0eda34 b 0x3f6b40 ; _INC_Initialize | |
162 | |
163 $INT_Vectors_Loaded: | |
164 4026c: 4778 bx pc | |
165 4026e: 46c0 nop (mov r8, r8) | |
166 40270: eaffffff b 0x40274 | |
167 _INT_Vectors_Loaded: | |
168 40274: e3a00001 mov r0, #1 | |
169 40278: e12fff1e bx lr | |
170 | |
171 $INT_Setup_Vector: | |
172 4027c: 4778 bx pc | |
173 4027e: 46c0 nop (mov r8, r8) | |
174 40280: eaffffff b 0x40284 | |
175 _INT_Setup_Vector: | |
176 40284: e3a00000 mov r0, #0 | |
177 40288: e12fff1e bx lr | |
178 | |
179 $INT_EnableIRQ: | |
180 4028c: 4778 bx pc | |
181 4028e: 46c0 nop (mov r8, r8) | |
182 40290: e10f0000 mrs r0, CPSR | |
183 40294: e3c0001f bic r0, r0, #31 ; 0x1f | |
184 40298: e3800012 orr r0, r0, #18 ; 0x12 | |
185 4029c: e129f000 msr CPSR_fc, r0 | |
186 402a0: e10f0000 mrs r0, CPSR | |
187 402a4: e3c000c0 bic r0, r0, #192 ; 0xc0 | |
188 402a8: e129f000 msr CPSR_fc, r0 | |
189 402ac: e3c0001f bic r0, r0, #31 ; 0x1f | |
190 402b0: e3800013 orr r0, r0, #19 ; 0x13 | |
191 402b4: e129f000 msr CPSR_fc, r0 | |
192 402b8: e28f0001 add r0, pc, #1 | |
193 402bc: e12fff10 bx r0 | |
194 402c0: 4770 bx lr | |
195 | |
196 $INT_DisableIRQ: | |
197 402c2: 4778 bx pc | |
198 402c4: 46c0 nop (mov r8, r8) | |
199 402c6: 46c0 nop (mov r8, r8) | |
200 402c8: e10f0000 mrs r0, CPSR | |
201 402cc: e3c0001f bic r0, r0, #31 ; 0x1f | |
202 402d0: e3800012 orr r0, r0, #18 ; 0x12 | |
203 402d4: e129f000 msr CPSR_fc, r0 | |
204 402d8: e10f0000 mrs r0, CPSR | |
205 402dc: e38000c0 orr r0, r0, #192 ; 0xc0 | |
206 402e0: e129f000 msr CPSR_fc, r0 | |
207 402e4: e3c0001f bic r0, r0, #31 ; 0x1f | |
208 402e8: e3800013 orr r0, r0, #19 ; 0x13 | |
209 402ec: e129f000 msr CPSR_fc, r0 | |
210 402f0: e28f0001 add r0, pc, #1 | |
211 402f4: e12fff10 bx r0 | |
212 402f8: 4770 bx lr | |
213 | |
214 $INT_Retrieve_Shell: | |
215 402fa: 4778 bx pc | |
216 402fc: 46c0 nop (mov r8, r8) | |
217 402fe: 46c0 nop (mov r8, r8) | |
218 40300: eaffffff b 0x40304 | |
219 _INT_Retrieve_Shell: | |
220 40304: e3a00000 mov r0, #0 | |
221 40308: e12fff1e bx lr | |
222 | |
223 INT_IRQ: | |
224 4030c: e92d000f stmdb sp!, {r0, r1, r2, r3} | |
225 40310: e14f0000 mrs r0, SPSR | |
226 40314: e3100080 tst r0, #128 ; 0x80 | |
227 40318: 1a000003 bne 0x4032c | |
228 4031c: e24e3004 sub r3, lr, #4 | |
229 40320: eb1ff729 bl 0x83dfcc ; _TCT_Interrupt_Context_Save | |
230 40324: eb0e3915 bl 0x3ce780 ; _IQ_IRQ_isr | |
231 40328: ea1ff76e b 0x83e0e8 ; _TCT_Interrupt_Context_Restore | |
232 4032c: e8bd000f ldmia sp!, {r0, r1, r2, r3} | |
233 40330: e25ef004 subs pc, lr, #4 | |
234 | |
235 INT_FIQ: | |
236 40334: e92d000f stmdb sp!, {r0, r1, r2, r3} | |
237 40338: e24e3004 sub r3, lr, #4 | |
238 4033c: eb1ff722 bl 0x83dfcc ; _TCT_Interrupt_Context_Save | |
239 40340: eb0e3919 bl 0x3ce7ac ; _IQ_FIQ_isr | |
240 40344: ea1ff767 b 0x83e0e8 ; _TCT_Interrupt_Context_Restore | |
241 | |
242 ; exception handlers | |
243 40348: e92d1800 stmdb sp!, {r11, r12} | |
244 4034c: e3a0b001 mov r11, #1 | |
245 40350: ea00000c b 0x40388 | |
246 40354: e92d1800 stmdb sp!, {r11, r12} | |
247 40358: e3a0b002 mov r11, #2 | |
248 4035c: ea000009 b 0x40388 | |
249 40360: e92d1800 stmdb sp!, {r11, r12} | |
250 40364: e3a0b003 mov r11, #3 | |
251 40368: ea000006 b 0x40388 | |
252 4036c: e92d1800 stmdb sp!, {r11, r12} | |
253 40370: e3a0b004 mov r11, #4 | |
254 40374: ea000003 b 0x40388 | |
255 40378: e59fd0f0 ldr sp, =0x1000050 ; via 0x40470 | |
256 4037c: e92d1800 stmdb sp!, {r11, r12} | |
257 40380: e3a0b005 mov r11, #5 | |
258 40384: eaffffff b 0x40388 | |
259 40388: e59fc0e4 ldr r12, =0x1000050 ; via 0x40474 | |
260 4038c: e58ce03c str lr, [r12, #60] ; 0x3c | |
261 40390: e88c07ff stmia r12, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10} | |
262 40394: e8bd0003 ldmia sp!, {r0, r1} | |
263 40398: e58c002c str r0, [r12, #44] ; 0x2c | |
264 4039c: e58c1030 str r1, [r12, #48] ; 0x30 | |
265 403a0: e14f0000 mrs r0, SPSR | |
266 403a4: e58c0040 str r0, [r12, #64] ; 0x40 | |
267 403a8: e10f1000 mrs r1, CPSR | |
268 403ac: e3c1201f bic r2, r1, #31 ; 0x1f | |
269 403b0: e200001f and r0, r0, #31 ; 0x1f | |
270 403b4: e0800002 add r0, r0, r2 | |
271 403b8: e129f000 msr CPSR_fc, r0 | |
272 403bc: e58cd034 str sp, [r12, #52] ; 0x34 | |
273 403c0: e58ce038 str lr, [r12, #56] ; 0x38 | |
274 403c4: e129f001 msr CPSR_fc, r1 | |
275 403c8: e38ba4de orr r10, r11, #3724541952 ; 0xde000000 | |
276 403cc: e38aa8ad orr r10, r10, #11337728 ; 0xad0000 | |
277 403d0: e58ca044 str r10, [r12, #68] ; 0x44 | |
278 403d4: e1a0000b mov r0, r11 | |
279 403d8: ea0eda7a b 0x3f6dc8 ; _dar_exception | |
280 | |
281 $exception: | |
282 403dc: a000 add r0, pc, #0 | |
283 403de: 4700 bx r0 | |
284 | |
285 _exception: | |
286 403e0: e59fc08c ldr r12, =0x1000050 ; via 0x40474 | |
287 403e4: e59cb034 ldr r11, [r12, #52] ; 0x34 | |
288 403e8: e28cc048 add r12, r12, #72 ; 0x48 | |
289 403ec: e35b0502 cmp r11, #8388608 ; 0x800000 | |
290 403f0: ba00000d blt 0x4042c | |
291 403f4: e3a00722 mov r0, #8912896 ; 0x880000 | |
292 403f8: e2400014 sub r0, r0, #20 ; 0x14 | |
293 403fc: e15b0000 cmp r11, r0 | |
294 40400: ba000005 blt 0x4041c | |
295 40404: e35b0401 cmp r11, #16777216 ; 0x1000000 | |
296 40408: ba000007 blt 0x4042c | |
297 4040c: e3a00612 mov r0, #18874368 ; 0x1200000 | |
298 40410: e2400014 sub r0, r0, #20 ; 0x14 | |
299 40414: e15b0000 cmp r11, r0 | |
300 40418: aa000003 bge 0x4042c | |
301 4041c: e8bb03ff ldmia r11!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9} | |
302 40420: e8ac03ff stmia r12!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9} | |
303 40424: e8bb03ff ldmia r11!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9} | |
304 40428: e8ac03ff stmia r12!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9} | |
305 4042c: e59f0020 ldr r0, =0x10000e8 ; via 0x40454 | |
306 40430: e3a01eae mov r1, #2784 ; 0xae0 | |
307 40434: e2811080 add r1, r1, #128 ; 0x80 | |
308 40438: e0802001 add r2, r0, r1 | |
309 4043c: e1a0d002 mov sp, r2 | |
310 40440: ea0eda66 b 0x3f6de0 ; _dar_reset | |
311 | |
312 40444: 01000be8 .bss | |
313 40448: 017751ec end | |
314 4044c: 00800000 _S_D_Mem | |
315 40450: 0082d1ec _E_D_Mem | |
316 40454: 010000e8 stack_segment | |
317 40458: 01775074 _INT_Loaded_Flag | |
318 4045c: 01775044 _TCT_System_Limit | |
319 40460: 0175635c _TCD_System_Stack | |
320 40464: 0176f458 _TMD_HISR_Stack_Ptr | |
321 40468: 0176f4dc _TMD_HISR_Stack_Size | |
322 4046c: 0176f4ec _TMD_HISR_Priority | |
323 40470: 01000050 exception_stack | |
324 40474: 01000050 _xdump_buffer | |
325 | |
326 _auto_init: | |
327 40478: ea00000c b 0x404b0 | |
328 4047c: e4901004 ldr r1, [r0], #4 | |
329 40480: e3530003 cmp r3, #3 | |
330 40484: 84904004 ldrhi r4, [r0], #4 | |
331 40488: 84814004 strhi r4, [r1], #4 | |
332 4048c: 82433004 subhi r3, r3, #4 | |
333 40490: 94d04001 ldrlsb r4, [r0], #1 | |
334 40494: 94c14001 strlsb r4, [r1], #1 | |
335 40498: 92433001 subls r3, r3, #1 | |
336 4049c: e3530000 cmp r3, #0 | |
337 404a0: 1afffff6 bne 0x40480 | |
338 404a4: e2103003 ands r3, r0, #3 | |
339 404a8: 12633004 rsbne r3, r3, #4 | |
340 404ac: 10800003 addne r0, r0, r3 | |
341 404b0: e4903004 ldr r3, [r0], #4 | |
342 404b4: e3530000 cmp r3, #0 | |
343 404b8: 1affffef bne 0x4047c | |
344 404bc: e1a0f00e mov pc, lr | |
345 | |
346 _INT_memset: | |
347 404c0: e92d4001 stmdb sp!, {r0, lr} | |
348 404c4: e3100003 tst r0, #3 | |
349 404c8: 0a000006 beq 0x404e8 | |
350 404cc: e3520000 cmp r2, #0 | |
351 404d0: 84c01001 strhib r1, [r0], #1 | |
352 404d4: 82522001 subhis r2, r2, #1 | |
353 404d8: 83100003 tsthi r0, #3 | |
354 404dc: 1afffffb bne 0x404d0 | |
355 404e0: e3520000 cmp r2, #0 | |
356 404e4: 08bd8001 ldmeqia sp!, {r0, pc} | |
357 404e8: e20110ff and r1, r1, #255 ; 0xff | |
358 404ec: e1811401 orr r1, r1, r1, lsl #8 | |
359 404f0: e3520004 cmp r2, #4 | |
360 404f4: 3a000012 bcc 0x40544 | |
361 404f8: e1811801 orr r1, r1, r1, lsl #16 | |
362 404fc: e3520008 cmp r2, #8 | |
363 40500: 3a00000d bcc 0x4053c | |
364 40504: e1a0e001 mov lr, r1 | |
365 40508: e3520010 cmp r2, #16 ; 0x10 | |
366 4050c: 3a000008 bcc 0x40534 | |
367 40510: e92d0010 stmdb sp!, {r4} | |
368 40514: e1a04001 mov r4, r1 | |
369 40518: e1a0c001 mov r12, r1 | |
370 4051c: e242300f sub r3, r2, #15 ; 0xf | |
371 40520: e202200f and r2, r2, #15 ; 0xf | |
372 40524: e8a05012 stmia r0!, {r1, r4, r12, lr} | |
373 40528: e2533010 subs r3, r3, #16 ; 0x10 | |
374 4052c: 8afffffc bhi 0x40524 | |
375 40530: e8bd0010 ldmia sp!, {r4} | |
376 40534: e3120008 tst r2, #8 | |
377 40538: 18a04002 stmneia r0!, {r1, lr} | |
378 4053c: e3120004 tst r2, #4 | |
379 40540: 14801004 strne r1, [r0], #4 | |
380 40544: e3120002 tst r2, #2 | |
381 40548: 10c010b2 strneh r1, [r0], #2 | |
382 4054c: e3120001 tst r2, #1 | |
383 40550: 15c01000 strneb r1, [r0] | |
384 40554: e8bd8001 ldmia sp!, {r0, pc} | |
385 | |
386 _INT_memcpy: | |
387 40558: e3520000 cmp r2, #0 | |
388 4055c: 012fff1e bxeq lr | |
389 40560: e92d4001 stmdb sp!, {r0, lr} | |
390 40564: e3110003 tst r1, #3 | |
391 40568: 1a00002b bne 0x4061c | |
392 4056c: e3100003 tst r0, #3 | |
393 40570: 1a00002f bne 0x40634 | |
394 40574: e3520010 cmp r2, #16 ; 0x10 | |
395 40578: 3a000008 bcc 0x405a0 | |
396 4057c: e92d0010 stmdb sp!, {r4} | |
397 40580: e2422010 sub r2, r2, #16 ; 0x10 | |
398 40584: e8b15018 ldmia r1!, {r3, r4, r12, lr} | |
399 40588: e8a05018 stmia r0!, {r3, r4, r12, lr} | |
400 4058c: e2522010 subs r2, r2, #16 ; 0x10 | |
401 40590: 2afffffb bcs 0x40584 | |
402 40594: e8bd0010 ldmia sp!, {r4} | |
403 40598: e2922010 adds r2, r2, #16 ; 0x10 | |
404 4059c: 08bd8001 ldmeqia sp!, {r0, pc} | |
405 405a0: e212300c ands r3, r2, #12 ; 0xc | |
406 405a4: 0a00000d beq 0x405e0 | |
407 405a8: e3d2200c bics r2, r2, #12 ; 0xc | |
408 405ac: e24fc010 sub r12, pc, #16 ; 0x10 | |
409 405b0: e08cf103 add pc, r12, r3, lsl #2 | |
410 405b4: e4913004 ldr r3, [r1], #4 | |
411 405b8: e4803004 str r3, [r0], #4 | |
412 405bc: 08bd8001 ldmeqia sp!, {r0, pc} | |
413 405c0: ea000006 b 0x405e0 | |
414 405c4: e8b11008 ldmia r1!, {r3, r12} | |
415 405c8: e8a01008 stmia r0!, {r3, r12} | |
416 405cc: 08bd8001 ldmeqia sp!, {r0, pc} | |
417 405d0: ea000002 b 0x405e0 | |
418 405d4: e8b15008 ldmia r1!, {r3, r12, lr} | |
419 405d8: e8a05008 stmia r0!, {r3, r12, lr} | |
420 405dc: 08bd8001 ldmeqia sp!, {r0, pc} | |
421 405e0: e2522001 subs r2, r2, #1 | |
422 405e4: 124f3004 subne r3, pc, #4 | |
423 405e8: 1083f202 addne pc, r3, r2, lsl #4 | |
424 405ec: e4d13001 ldrb r3, [r1], #1 | |
425 405f0: e4c03001 strb r3, [r0], #1 | |
426 405f4: e8bd8001 ldmia sp!, {r0, pc} | |
427 405f8: e0d130b2 ldrh r3, [r1], #2 | |
428 405fc: e0c030b2 strh r3, [r0], #2 | |
429 40600: e8bd8001 ldmia sp!, {r0, pc} | |
430 40604: e1a00000 mov r0, r0 | |
431 40608: e0d130b2 ldrh r3, [r1], #2 | |
432 4060c: e0c030b2 strh r3, [r0], #2 | |
433 40610: e4d13001 ldrb r3, [r1], #1 | |
434 40614: e4c03001 strb r3, [r0], #1 | |
435 40618: e8bd8001 ldmia sp!, {r0, pc} | |
436 4061c: e4d13001 ldrb r3, [r1], #1 | |
437 40620: e4c03001 strb r3, [r0], #1 | |
438 40624: e2522001 subs r2, r2, #1 | |
439 40628: 08bd8001 ldmeqia sp!, {r0, pc} | |
440 4062c: e3110003 tst r1, #3 | |
441 40630: 1afffff9 bne 0x4061c | |
442 40634: e3100001 tst r0, #1 | |
443 40638: 1a000013 bne 0x4068c | |
444 4063c: e3100002 tst r0, #2 | |
445 40640: 0affffcb beq 0x40574 | |
446 40644: e2522004 subs r2, r2, #4 | |
447 40648: 3a000007 bcc 0x4066c | |
448 4064c: e4913004 ldr r3, [r1], #4 | |
449 40650: e0c030b4 strh r3, [r0], #4 | |
450 40654: e1a03823 mov r3, r3, lsr #16 | |
451 40658: e14030b2 strh r3, [r0, #-2] | |
452 4065c: e2522004 subs r2, r2, #4 | |
453 40660: 2afffff9 bcs 0x4064c | |
454 40664: e3720004 cmn r2, #4 | |
455 40668: 08bd8001 ldmeqia sp!, {r0, pc} | |
456 4066c: e2922002 adds r2, r2, #2 | |
457 40670: 20d130b2 ldrcsh r3, [r1], #2 | |
458 40674: 20c030b2 strcsh r3, [r0], #2 | |
459 40678: 22422002 subcs r2, r2, #2 | |
460 4067c: e2922001 adds r2, r2, #1 | |
461 40680: 24d13001 ldrcsb r3, [r1], #1 | |
462 40684: 24c03001 strcsb r3, [r0], #1 | |
463 40688: e8bd8001 ldmia sp!, {r0, pc} | |
464 4068c: e2522004 subs r2, r2, #4 | |
465 40690: 3a000009 bcc 0x406bc | |
466 40694: e4913004 ldr r3, [r1], #4 | |
467 40698: e4c03004 strb r3, [r0], #4 | |
468 4069c: e1a03423 mov r3, r3, lsr #8 | |
469 406a0: e5403003 strb r3, [r0, #-3] | |
470 406a4: e1a03423 mov r3, r3, lsr #8 | |
471 406a8: e5403002 strb r3, [r0, #-2] | |
472 406ac: e1a03423 mov r3, r3, lsr #8 | |
473 406b0: e5403001 strb r3, [r0, #-1] | |
474 406b4: e2522004 subs r2, r2, #4 | |
475 406b8: 2afffff5 bcs 0x40694 | |
476 406bc: e2922004 adds r2, r2, #4 | |
477 406c0: 08bd8001 ldmeqia sp!, {r0, pc} | |
478 406c4: e4d13001 ldrb r3, [r1], #1 | |
479 406c8: e4c03001 strb r3, [r0], #1 | |
480 406cc: e2522001 subs r2, r2, #1 | |
481 406d0: 1afffffb bne 0x406c4 | |
482 406d4: e8bd8001 ldmia sp!, {r0, pc} | |
483 | |
484 003F81AC $madc_hex_2_physical call trampoline | |
485 0052FB70 _RVM_SWE_GET_INFO_ARRAY | |
486 | |
487 0083CAB0 $madc_hex_2_physical function body expected here |