diff compal/c139-boot.disasm @ 102:44db5922ab8f

c139 boot re: entry code analyzed
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Mon, 31 Mar 2014 01:52:56 +0000
parents ec90136f07a6
children 52cec4b71cfe
line wrap: on
line diff
--- a/compal/c139-boot.disasm	Mon Mar 31 01:16:55 2014 +0000
+++ b/compal/c139-boot.disasm	Mon Mar 31 01:52:56 2014 +0000
@@ -56,11 +56,13 @@
      89a:	0000
 
 ; RESET entry point
+; set VCLKOUT_DIV2 in FFFF:FD02 register
      89c:	e51f1020	ldr	r1, =0xfffffd00	; via 0x884
      8a0:	e1d120b2	ldrh	r2, [r1, #2]
      8a4:	e51f002c	ldr	r0, =0x40	; via 0x880
      8a8:	e1800002	orr	r0, r0, r2
      8ac:	e1c100b2	strh	r0, [r1, #2]
+; PLL disable (power-up state)
      8b0:	e51f1030	ldr	r1, =0xffff9800	; via 0x888
      8b4:	e15f22b6	ldrh	r2, =0x2006	; via 0x896
      8b8:	e1c120b0	strh	r2, [r1]
@@ -68,17 +70,21 @@
      8c0:	e2022001	and	r2, r2, #1
      8c4:	e3520001	cmp	r2, #1
      8c8:	0afffffb	beq	0x8bc
+; Write power-up default value into FFFF:FD00
      8cc:	e51f1050	ldr	r1, =0xfffffd00	; via 0x884
      8d0:	e15f24b4	ldrh	r2, =0x1081	; via 0x894
      8d4:	e1c120b0	strh	r2, [r1]
+; Disable DU
      8d8:	e51f1054	ldr	r1, =0xfffffb10	; via 0x88c
      8dc:	e15f24bc	ldrh	r2, =0x800	; via 0x898
      8e0:	e1d100b0	ldrh	r0, [r1]
      8e4:	e1800002	orr	r0, r0, r2
      8e8:	e1c100b0	strh	r0, [r1]
+; Disable all MPU regions
      8ec:	e51f1064	ldr	r1, =0xffffff08	; via 0x890
      8f0:	e15f25be	ldrh	r2, =0x0	; via 0x89a
      8f4:	e1c120b0	strh	r2, [r1]
+; Memory timings
      8f8:	e51f1094	ldr	r1, =0xfffffb00	; via 0x86c
      8fc:	e15f29b4	ldrh	r2, =0x2a1	; via 0x870
      900:	e1c120b0	strh	r2, [r1]
@@ -96,12 +102,14 @@
      930:	e1c120b8	strh	r2, [r1, #8]
      934:	e15f2bbe	ldrh	r2, =0x2a	; via 0x87e
      938:	e1c120be	strh	r2, [r1, #14]	; 0xe
+; set up stack
      93c:	e59f0020	ldr	r0, =0x83e574	; via 0x964
      940:	e3a01b01	mov	r1, #1024	; 0x400
      944:	e2411004	sub	r1, r1, #4
      948:	e0802001	add	r2, r0, r1
      94c:	e3c22003	bic	r2, r2, #3
      950:	e1a0d002	mov	sp, r2
+; business logic
      954:	e92d100f	stmdb	sp!, {r0, r1, r2, r3, r12}
      958:	eb000534	bl	0x1e30
      95c:	e8bd100f	ldmia	sp!, {r0, r1, r2, r3, r12}
@@ -114,6 +122,7 @@
 
 <968-1E2F: not yet analyzed>
 
+; ARM->Thumb call veneer around 0xad2 routine
     1e30:	e92d4000 	stmdb	sp!, {lr}
     1e34:	e28fe001 	add	lr, pc, #1	; 0x1
     1e38:	e12fff1e 	bx	lr