diff pirelli/pcb @ 10:b0f7481efc8b

Pirelli PCB rev eng: finally have something worthy to report: traced out the 3 chip selects for the RAM/flash MCP.
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sat, 20 Apr 2013 00:56:45 +0000
parents
children 8e4dac492552
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+The Pirelli DP-L10 PCB appears to have 8 layers.  Following the good old DEC
+convention, I shall refer to them as L1 through L8.  Not knowing the original
+designers' intended identification, I have arbitrarily assigned L1 to be the
+battery/SIM side and L8 to be the display/keypad side.  This numbering direction
+makes it easier to work with steve-m's grind-down pictures.
+
+Via structure: there don't seem to be too many all-the-way-through vias, if
+any at all, other than maybe the grounding ones around the edges of the board.
+Instead most/all internal vias are blind, spanning from L2 through L7.
+At both surfaces there are micro-vias (with many/most of them one can't even
+see the hope in steve-m's pictures, only a copper circle which one has to
+infer is an "annulus" for a micro-via), and these micro-vias only go one layer
+deep: from L1 to L2, and from L8 to L7.