--- a/pirelli/fw-disasm	Sat Dec 23 23:26:06 2017 +0000
+++ b/pirelli/fw-disasm	Sun Dec 24 00:03:49 2017 +0000
@@ -481,6 +481,114 @@
    406d0:	1afffffb	bne	0x406c4
    406d4:	e8bd8001	ldmia	sp!, {r0, pc}
 
+$l1_abb_power_on:
+  31c036:	b510		push	{r4, lr}
+  31c038:	b084		sub	sp, #16	; 0x10
+  31c03a:	2000		mov	r0, #0
+  31c03c:	4669		mov	r1, sp
+  31c03e:	8008		strh	r0, [r1, #0]
+  31c040:	466a		mov	r2, sp
+  31c042:	213c		mov	r1, #60	; 0x3c
+  31c044:	8051		strh	r1, [r2, #2]
+  31c046:	2105		mov	r1, #5
+  31c048:	8091		strh	r1, [r2, #4]
+  31c04a:	4669		mov	r1, sp
+  31c04c:	80c8		strh	r0, [r1, #6]
+  31c04e:	2201		mov	r2, #1
+  31c050:	810a		strh	r2, [r1, #8]
+  31c052:	8148		strh	r0, [r1, #10]	; 0xa
+  31c054:	8188		strh	r0, [r1, #12]	; 0xc
+  31c056:	4668		mov	r0, sp
+  31c058:	f0d3 fcc5	bl	0x3ef9e6	; $SPI_InitDev
+  31c05c:	f02d f924	bl	0x3492a8	; $ABB_free_13M
+  31c060:	f02d f954	bl	0x34930c	; $ABB_Read_Status
+  31c064:	2001		mov	r0, #1
+  31c066:	2136		mov	r1, #54	; 0x36
+  31c068:	f02d f8f7	bl	0x34925a	; $ABB_Read_Register_on_page
+  31c06c:	4cdf		ldr	r4, =0x8029a4	; via 0x31c3ec
+  31c06e:	48e0		ldr	r0, =0x15a4	; via 0x31c3f0
+  31c070:	5d01		ldrb	r1, [r0, r4]
+  31c072:	2005		mov	r0, #5
+  31c074:	0340		lsl	r0, r0, #13
+  31c076:	f02d f96b	bl	0x349350	; $ABB_on
+  31c07a:	20ff		mov	r0, #255	; 0xff
+  31c07c:	49ac		ldr	r1, =0x3df	; via 0x31c330
+  31c07e:	f02d fa5c	bl	0x34953a	; $ABB_Conf_ADC
+  31c082:	48db		ldr	r0, =0x15a4	; via 0x31c3f0
+  31c084:	5d00		ldrb	r0, [r0, r4]
+  31c086:	2800		cmp	r0, #0
+  31c088:	d101		bne	0x31c08e
+  31c08a:	f0c0 fc4d	bl	0x3dc928	; $Create_ABB_HISR
+  31c08e:	4c24		ldr	r4, =0xffd001a8	; via 0x31c120
+  31c090:	48a8		ldr	r0, =0x8028a5	; via 0x31c334
+  31c092:	7800		ldrb	r0, [r0, #0]
+  31c094:	2800		cmp	r0, #0
+  31c096:	d108		bne	0x31c0aa
+  31c098:	20ff		mov	r0, #255	; 0xff
+  31c09a:	30dd		add	r0, #221	; 0xdd
+  31c09c:	1900		add	r0, r0, r4
+  31c09e:	2100		mov	r1, #0
+  31c0a0:	2200		mov	r2, #0
+  31c0a2:	2301		mov	r3, #1
+  31c0a4:	f0de f83a	bl	0x3fa11c
+  31c0a8:	e007		b	0x31c0ba
+  31c0aa:	20ff		mov	r0, #255	; 0xff
+  31c0ac:	30dd		add	r0, #221	; 0xdd
+  31c0ae:	1900		add	r0, r0, r4
+  31c0b0:	2105		mov	r1, #5
+  31c0b2:	2205		mov	r2, #5
+  31c0b4:	2301		mov	r3, #1
+  31c0b6:	f0de f831	bl	0x3fa11c
+  31c0ba:	489f		ldr	r0, =0x802868	; via 0x31c338
+  31c0bc:	2196		mov	r1, #150	; 0x96
+  31c0be:	5a09		ldrh	r1, [r1, r0]
+  31c0c0:	8121		strh	r1, [r4, #8]
+  31c0c2:	2198		mov	r1, #152	; 0x98
+  31c0c4:	5a09		ldrh	r1, [r1, r0]
+  31c0c6:	8661		strh	r1, [r4, #50]	; 0x32
+  31c0c8:	219a		mov	r1, #154	; 0x9a
+  31c0ca:	5a09		ldrh	r1, [r1, r0]
+  31c0cc:	86a1		strh	r1, [r4, #52]	; 0x34
+  31c0ce:	219c		mov	r1, #156	; 0x9c
+  31c0d0:	5a09		ldrh	r1, [r1, r0]
+  31c0d2:	86e1		strh	r1, [r4, #54]	; 0x36
+  31c0d4:	4a99		ldr	r2, =0xffd001e8	; via 0x31c33c
+  31c0d6:	219e		mov	r1, #158	; 0x9e
+  31c0d8:	5a09		ldrh	r1, [r1, r0]
+  31c0da:	80d1		strh	r1, [r2, #6]
+  31c0dc:	21a0		mov	r1, #160	; 0xa0
+  31c0de:	5a09		ldrh	r1, [r1, r0]
+  31c0e0:	8621		strh	r1, [r4, #48]	; 0x30
+  31c0e2:	21a2		mov	r1, #162	; 0xa2
+  31c0e4:	5a09		ldrh	r1, [r1, r0]
+  31c0e6:	8761		strh	r1, [r4, #58]	; 0x3a
+  31c0e8:	21a4		mov	r1, #164	; 0xa4
+  31c0ea:	5a09		ldrh	r1, [r1, r0]
+  31c0ec:	87a1		strh	r1, [r4, #60]	; 0x3c
+  31c0ee:	21a6		mov	r1, #166	; 0xa6
+  31c0f0:	5a09		ldrh	r1, [r1, r0]
+  31c0f2:	87e1		strh	r1, [r4, #62]	; 0x3e
+  31c0f4:	21a8		mov	r1, #168	; 0xa8
+  31c0f6:	5a09		ldrh	r1, [r1, r0]
+  31c0f8:	8011		strh	r1, [r2, #0]
+  31c0fa:	21aa		mov	r1, #170	; 0xaa
+  31c0fc:	5a09		ldrh	r1, [r1, r0]
+  31c0fe:	8051		strh	r1, [r2, #2]
+  31c100:	21ac		mov	r1, #172	; 0xac
+  31c102:	5a09		ldrh	r1, [r1, r0]
+  31c104:	8091		strh	r1, [r2, #4]
+  31c106:	21ae		mov	r1, #174	; 0xae
+  31c108:	5a09		ldrh	r1, [r1, r0]
+  31c10a:	85e1		strh	r1, [r4, #46]	; 0x2e
+  31c10c:	21b0		mov	r1, #176	; 0xb0
+  31c10e:	5a09		ldrh	r1, [r1, r0]
+  31c110:	8721		strh	r1, [r4, #56]	; 0x38
+  31c112:	21b2		mov	r1, #178	; 0xb2
+  31c114:	5a08		ldrh	r0, [r1, r0]
+  31c116:	85a0		strh	r0, [r4, #44]	; 0x2c
+  31c118:	b004		add	sp, #16	; 0x10
+  31c11a:	bd10		pop	{r4, pc}
+
 $l1_initialize:
   31c6e4:	b530		push	{r4, r5, lr}
   31c6e6:	1c04		add	r4, r0, #0