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diff dsample-fw-disasm @ 264:e4a596bbb2bf

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dsample-fw-disasm: ARMIO functions located
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 18 Jan 2018 05:39:53 +0000
parents 7b679943b57d
children d15f701b1434
line wrap: on
line diff
--- a/dsample-fw-disasm	Thu Jan 18 05:10:18 2018 +0000
+++ b/dsample-fw-disasm	Thu Jan 18 05:39:53 2018 +0000
@@ -356,7 +356,7 @@
   245986:	8044		strh	r4, [r0, #2]
   245988:	2103		mov	r1, #3
   24598a:	8181		strh	r1, [r0, #12]	; 0xc
-  24598c:	f005 fc28	bl	0x24b1e0
+  24598c:	f005 fc28	bl	0x24b1e0	; $IQ_SetupInterrupts
   245990:	4846		ldr	r0, =0xfffffc00	; via 0x245aac
   245992:	2124		mov	r1, #36	; 0x24
   245994:	8001		strh	r1, [r0, #0]
@@ -420,15 +420,15 @@
   245a08:	8a48		ldrh	r0, [r1, #18]	; 0x12
   245a0a:	2800		cmp	r0, #0
   245a0c:	d0fc		beq	0x245a08
-  245a0e:	f006 fdbf	bl	0x24c590
-  245a12:	f006 fdc3	bl	0x24c59c
+  245a0e:	f006 fdbf	bl	0x24c590	; $AI_ClockEnable
+  245a12:	f006 fdc3	bl	0x24c59c	; $AI_InitIOConfig
   245a16:	2027		mov	r0, #39	; 0x27
   245a18:	0500		lsl	r0, r0, #20
   245a1a:	8004		strh	r4, [r0, #0]
   245a1c:	2001		mov	r0, #1
-  245a1e:	f006 fc80	bl	0x24c322
+  245a1e:	f006 fc80	bl	0x24c322	; $TM_EnableTimer
   245a22:	2002		mov	r0, #2
-  245a24:	f006 fc7d	bl	0x24c322
+  245a24:	f006 fc7d	bl	0x24c322	; $TM_EnableTimer
   245a28:	b001		add	sp, #4
   245a2a:	bd70		pop	{r4, r5, r6, pc}
 
@@ -473,6 +473,177 @@
   245a7c:	4770		bx	lr
   245a7e:	4770		bx	lr
 
+$AI_EnableBit:
+  24c4f4:	4a4e		ldr	r2, =0xfffef00a	; via 0x24c630
+  24c4f6:	2101		mov	r1, #1
+  24c4f8:	4081		lsl	r1, r0
+  24c4fa:	8810		ldrh	r0, [r2, #0]
+  24c4fc:	4301		orr	r1, r0
+  24c4fe:	8011		strh	r1, [r2, #0]
+  24c500:	4770		bx	lr
+
+$AI_DisableBit:
+  24c502:	4a4b		ldr	r2, =0xfffef00a	; via 0x24c630
+  24c504:	2101		mov	r1, #1
+  24c506:	4081		lsl	r1, r0
+  24c508:	8810		ldrh	r0, [r2, #0]
+  24c50a:	4388		bic	r0, r1
+  24c50c:	8010		strh	r0, [r2, #0]
+  24c50e:	4770		bx	lr
+
+$AI_SetBit:
+  24c510:	4a48		ldr	r2, =0xfffe4802	; via 0x24c634
+  24c512:	2101		mov	r1, #1
+  24c514:	4081		lsl	r1, r0
+  24c516:	8810		ldrh	r0, [r2, #0]
+  24c518:	4301		orr	r1, r0
+  24c51a:	8011		strh	r1, [r2, #0]
+  24c51c:	4770		bx	lr
+
+$AI_ResetBit:
+  24c51e:	4a45		ldr	r2, =0xfffe4802	; via 0x24c634
+  24c520:	2101		mov	r1, #1
+  24c522:	4081		lsl	r1, r0
+  24c524:	8810		ldrh	r0, [r2, #0]
+  24c526:	4388		bic	r0, r1
+  24c528:	8010		strh	r0, [r2, #0]
+  24c52a:	4770		bx	lr
+
+$AI_ConfigBitAsOutput:
+  24c52c:	4a42		ldr	r2, =0xfffe4804	; via 0x24c638
+  24c52e:	2101		mov	r1, #1
+  24c530:	4081		lsl	r1, r0
+  24c532:	8810		ldrh	r0, [r2, #0]
+  24c534:	4388		bic	r0, r1
+  24c536:	8010		strh	r0, [r2, #0]
+  24c538:	4770		bx	lr
+
+$AI_ConfigBitAsInput:
+  24c53a:	4a3f		ldr	r2, =0xfffe4804	; via 0x24c638
+  24c53c:	2101		mov	r1, #1
+  24c53e:	4081		lsl	r1, r0
+  24c540:	8810		ldrh	r0, [r2, #0]
+  24c542:	4301		orr	r1, r0
+  24c544:	8011		strh	r1, [r2, #0]
+  24c546:	4770		bx	lr
+
+$AI_ReadBit:
+  24c548:	493c		ldr	r1, =0xfffe4800	; via 0x24c63c
+  24c54a:	8809		ldrh	r1, [r1, #0]
+  24c54c:	4101		asr	r1, r0
+  24c54e:	07c8		lsl	r0, r1, #31
+  24c550:	0fc0		lsr	r0, r0, #31
+  24c552:	0600		lsl	r0, r0, #24
+  24c554:	0e00		lsr	r0, r0, #24
+  24c556:	4770		bx	lr
+
+$AI_Power:
+  24c558:	b500		push	{lr}
+  24c55a:	2800		cmp	r0, #0
+  24c55c:	d110		bne	0x24c580
+  24c55e:	f772 fcbf	bl	0x1beee0
+  24c562:	0940		lsr	r0, r0, #5
+  24c564:	d2fb		bcs	0x24c55e
+  24c566:	f004 fc89	bl	0x250e7c
+  24c56a:	4835		ldr	r0, =0xfffe3000	; via 0x24c640
+  24c56c:	217c		mov	r1, #124	; 0x7c
+  24c56e:	8141		strh	r1, [r0, #10]	; 0xa
+  24c570:	2131		mov	r1, #49	; 0x31
+  24c572:	8802		ldrh	r2, [r0, #0]
+  24c574:	4311		orr	r1, r2
+  24c576:	8001		strh	r1, [r0, #0]
+  24c578:	2102		mov	r1, #2
+  24c57a:	8882		ldrh	r2, [r0, #4]
+  24c57c:	4311		orr	r1, r2
+  24c57e:	8081		strh	r1, [r0, #4]
+  24c580:	bd00		pop	{pc}
+
+$AI_ResetIoConfig:
+  24c582:	492d		ldr	r1, =0xfffe4804	; via 0x24c638
+  24c584:	482f		ldr	r0, =0xffff	; via 0x24c644
+  24c586:	8008		strh	r0, [r1, #0]
+  24c588:	4829		ldr	r0, =0xfffef00a	; via 0x24c630
+  24c58a:	2100		mov	r1, #0
+  24c58c:	8001		strh	r1, [r0, #0]
+  24c58e:	4770		bx	lr
+
+$AI_ClockEnable:
+  24c590:	492d		ldr	r1, =0xfffe4806	; via 0x24c648
+  24c592:	2020		mov	r0, #32	; 0x20
+  24c594:	880a		ldrh	r2, [r1, #0]
+  24c596:	4310		orr	r0, r2
+  24c598:	8008		strh	r0, [r1, #0]
+  24c59a:	4770		bx	lr
+
+$AI_InitIOConfig:
+  24c59c:	b500		push	{lr}
+  24c59e:	f7ff fff0	bl	0x24c582	; $AI_ResetIoConfig
+  24c5a2:	2002		mov	r0, #2
+  24c5a4:	f7ff ffa6	bl	0x24c4f4	; $AI_EnableBit
+  24c5a8:	2004		mov	r0, #4
+  24c5aa:	f7ff ffa3	bl	0x24c4f4	; $AI_EnableBit
+  24c5ae:	2005		mov	r0, #5
+  24c5b0:	f7ff ffa0	bl	0x24c4f4	; $AI_EnableBit
+  24c5b4:	2006		mov	r0, #6
+  24c5b6:	f7ff ff9d	bl	0x24c4f4	; $AI_EnableBit
+  24c5ba:	2007		mov	r0, #7
+  24c5bc:	f7ff ff9a	bl	0x24c4f4	; $AI_EnableBit
+  24c5c0:	2008		mov	r0, #8
+  24c5c2:	f7ff ff97	bl	0x24c4f4	; $AI_EnableBit
+  24c5c6:	2009		mov	r0, #9
+  24c5c8:	f7ff ff94	bl	0x24c4f4	; $AI_EnableBit
+  24c5cc:	4919		ldr	r1, =0xfffe4802	; via 0x24c634
+  24c5ce:	481f		ldr	r0, =0x3f02	; via 0x24c64c
+  24c5d0:	8008		strh	r0, [r1, #0]
+  24c5d2:	2001		mov	r0, #1
+  24c5d4:	f7ff ffaa	bl	0x24c52c	; $AI_ConfigBitAsOutput
+  24c5d8:	2002		mov	r0, #2
+  24c5da:	f7ff ffa7	bl	0x24c52c	; $AI_ConfigBitAsOutput
+  24c5de:	2005		mov	r0, #5
+  24c5e0:	f7ff ffa4	bl	0x24c52c	; $AI_ConfigBitAsOutput
+  24c5e4:	2007		mov	r0, #7
+  24c5e6:	f7ff ffa1	bl	0x24c52c	; $AI_ConfigBitAsOutput
+  24c5ea:	2009		mov	r0, #9
+  24c5ec:	f7ff ff9e	bl	0x24c52c	; $AI_ConfigBitAsOutput
+  24c5f0:	200e		mov	r0, #14	; 0xe
+  24c5f2:	f7ff ff9b	bl	0x24c52c	; $AI_ConfigBitAsOutput
+  24c5f6:	200f		mov	r0, #15	; 0xf
+  24c5f8:	f7ff ff98	bl	0x24c52c	; $AI_ConfigBitAsOutput
+  24c5fc:	bd00		pop	{pc}
+
+$AI_SelectIOForIT:
+  24c5fe:	0109		lsl	r1, r1, #4
+  24c600:	1840		add	r0, r0, r1
+  24c602:	0040		lsl	r0, r0, #1
+  24c604:	3001		add	r0, #1
+  24c606:	4912		ldr	r1, =0xfffe4814	; via 0x24c650
+  24c608:	8008		strh	r0, [r1, #0]
+  24c60a:	4770		bx	lr
+
+$AI_CheckITSource:
+  24c60c:	2100		mov	r1, #0
+  24c60e:	4a11		ldr	r2, =0xfffe4816	; via 0x24c654
+  24c610:	8812		ldrh	r2, [r2, #0]
+  24c612:	4210		tst	r0, r2
+  24c614:	d000		beq	0x24c618
+  24c616:	2101		mov	r1, #1
+  24c618:	1c08		add	r0, r1, #0
+  24c61a:	4770		bx	lr
+
+$AI_UnmaskIT:
+  24c61c:	4a0e		ldr	r2, =0xfffe4818	; via 0x24c658
+  24c61e:	8811		ldrh	r1, [r2, #0]
+  24c620:	4381		bic	r1, r0
+  24c622:	8011		strh	r1, [r2, #0]
+  24c624:	4770		bx	lr
+
+$AI_MaskIT:
+  24c626:	4a0c		ldr	r2, =0xfffe4818	; via 0x24c658
+  24c628:	8811		ldrh	r1, [r2, #0]
+  24c62a:	4301		orr	r1, r0
+  24c62c:	8011		strh	r1, [r2, #0]
+  24c62e:	4770		bx	lr
+
 ; Appears to the old Thumb implementation of f_load_int_mem(),
 ; differs from TCS211 version which is ARM and appears to be assembly
   250408:	b5f0		push	{r4, r5, r6, r7, lr}