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frbl2test: L command addr and nwords need to be sent in LE byte order
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 07 Mar 2020 05:56:32 +0000
parents 3147e960aeff
children
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Let's see if Pirelli's PCB layout implements the "special" GND for the 32 kHz
oscillator like TI's schematics and app notes indicate.

VSSO ball (A14): no trace on L1, so must be a micro-via right under the ball
itself. L1 coord (3640,1049). GND side of the cap for V-RTC power balls:
micro-vias at (3435,970) and (3458,980).