view pirelli/pcb @ 200:492a6360e64d

leo-obj/frame_na7_db_ir: disassemble frame.obj in order to bring to light the compiled form of that infamous TraceMask[0] = 0; line
author Space Falcon <falcon@ivan.Harhan.ORG>
date Sat, 06 Jun 2015 18:32:49 +0000
parents 8e4dac492552
children
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The Pirelli DP-L10 PCB appears to have 8 layers.  Following the good old DEC
convention, I shall refer to them as L1 through L8.  Not knowing the original
designers' intended identification, I have arbitrarily assigned L1 to be the
battery/SIM side and L8 to be the display/keypad side.  This numbering direction
makes it easier to work with steve-m's grind-down pictures.

Via structure: there don't seem to be too many all-the-way-through vias, if
any at all, other than maybe the grounding ones around the edges of the board.
Instead most/all internal vias are blind, spanning from L2 through L7.
At both surfaces there are micro-vias (with many/most of them one can't even
see the hole in steve-m's pictures, only a copper circle which one has to
infer is an "annulus" for a micro-via), and these micro-vias only go one layer
deep: from L1 to L2, and from L8 to L7.