FreeCalypso > hg > freecalypso-reveng
view compal/sym-fw-disasm @ 339:77c86062e253
fluid-mnf/fluid.c: passes compilation
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Fri, 13 Mar 2020 02:33:21 +0000 |
parents | f724d574cff3 |
children | 37ee46a0dde7 |
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; This disassembly is an analysis of the boot path up to Init_Target() ; and AI_InitIOConfig() in the special Mot C11x fw version with symbols ; (R87.2.1.03.m0 and R87.2.1.03.map), made in order to look into these ; critical board-specific init functions and in order to better prepare ; ourselves for doing similar analysis on other Compal fw versions ; for which we don't have any symbols. 0: ea000225 b 0x89c 4: ea000825 b 0x20a0 8: ea000825 b 0x20a4 c: ea000825 b 0x20a8 10: ea000825 b 0x20ac 14: ea000825 b 0x20b0 18: ea000825 b 0x20b4 1c: ea000825 b 0x20b8 _INT_Bootloader_Start: ; Compal's addition for 26 MHz clock input to Calypso 89c: e51f1020 ldr r1, =0xfffffd00 ; via 0x884 8a0: e1d120b2 ldrh r2, [r1, #2] 8a4: e51f002c ldr r0, =0x40 ; via 0x880 8a8: e1800002 orr r0, r0, r2 8ac: e1c100b2 strh r0, [r1, #2] ; matches TI's version from here 8b0: e51f1030 ldr r1, =0xffff9800 ; via 0x888 8b4: e15f22b6 ldrh r2, =0x2006 ; via 0x896 8b8: e1c120b0 strh r2, [r1] 8bc: e5912000 ldr r2, [r1] 8c0: e2022001 and r2, r2, #1 8c4: e3520001 cmp r2, #1 8c8: 0afffffb beq 0x8bc 8cc: e51f1050 ldr r1, =0xfffffd00 ; via 0x884 8d0: e15f24b4 ldrh r2, =0x1081 ; via 0x894 8d4: e1c120b0 strh r2, [r1] 8d8: e51f1054 ldr r1, =0xfffffb10 ; via 0x88c 8dc: e15f24bc ldrh r2, =0x800 ; via 0x898 8e0: e1d100b0 ldrh r0, [r1] 8e4: e1800002 orr r0, r0, r2 8e8: e1c100b0 strh r0, [r1] 8ec: e51f1064 ldr r1, =0xffffff08 ; via 0x890 8f0: e15f25be ldrh r2, =0x0 ; via 0x89a 8f4: e1c120b0 strh r2, [r1] 8f8: e51f1094 ldr r1, =0xfffffb00 ; via 0x86c 8fc: e15f29b4 ldrh r2, =0x2a1 ; via 0x870 900: e1c120b0 strh r2, [r1] 904: e15f29ba ldrh r2, =0x2a1 ; via 0x872 908: e1c120b2 strh r2, [r1, #2] 90c: e15f2ab0 ldrh r2, =0x2a1 ; via 0x874 910: e1c120b4 strh r2, [r1, #4] 914: e15f2ab6 ldrh r2, =0x283 ; via 0x876 918: e1c120b6 strh r2, [r1, #6] 91c: e15f2abc ldrh r2, =0x281 ; via 0x878 920: e1c120ba strh r2, [r1, #10] ; 0xa 924: e15f2bb2 ldrh r2, =0xc0 ; via 0x87a 928: e1c120bc strh r2, [r1, #12] ; 0xc 92c: e15f2bb8 ldrh r2, =0x40 ; via 0x87c 930: e1c120b8 strh r2, [r1, #8] 934: e15f2bbe ldrh r2, =0x2a ; via 0x87e 938: e1c120be strh r2, [r1, #14] ; 0xe 93c: e59f0020 ldr r0, =0x83e730 ; via 0x964 940: e3a01b01 mov r1, #1024 ; 0x400 944: e2411004 sub r1, r1, #4 948: e0802001 add r2, r0, r1 94c: e3c22003 bic r2, r2, #3 950: e1a0d002 mov sp, r2 954: e92d100f stmdb sp!, {r0, r1, r2, r3, r12} 958: eb00051e bl 0x1dd8 ; _sta_select_application 95c: e8bd100f ldmia sp!, {r0, r1, r2, r3, r12} 960: ea0005e4 b 0x20f8 ; _INT_Initialize _INT_Initialize: ; beginning matches TI's version 20f8: e51f1024 ldr r1, =0xffff9800 ; via 0x20dc 20fc: e15f21ba ldrh r2, =0x2002 ; via 0x20ea 2100: e1c120b0 strh r2, [r1] 2104: e5912000 ldr r2, [r1] 2108: e2022001 and r2, r2, #1 210c: e3520001 cmp r2, #1 2110: 0afffffb beq 0x2104 2114: e51f1044 ldr r1, =0xfffffd00 ; via 0x20d8 2118: e15f23b8 ldrh r2, =0x1081 ; via 0x20e8 211c: e1c120b0 strh r2, [r1] 2120: e51f1048 ldr r1, =0xfffffb10 ; via 0x20e0 2124: e15f23be ldrh r2, =0xf7ff ; via 0x20ee 2128: e1d100b0 ldrh r0, [r1] 212c: e0000002 and r0, r0, r2 2130: e1c100b0 strh r0, [r1] 2134: e51f1058 ldr r1, =0xffffff08 ; via 0x20e4 2138: e15f25b0 ldrh r2, =0x0 ; via 0x20f0 213c: e1c120b0 strh r2, [r1] 2140: e51f107c ldr r1, =0xfffffb00 ; via 0x20cc 2144: e15f29b0 ldrh r2, =0x2a1 ; via 0x20bc 2148: e1c120b0 strh r2, [r1] 214c: e15f29b6 ldrh r2, =0x2a1 ; via 0x20be 2150: e1c120b2 strh r2, [r1, #2] 2154: e15f29bc ldrh r2, =0x2a1 ; via 0x20c0 2158: e1c120b4 strh r2, [r1, #4] 215c: e15f2ab2 ldrh r2, =0x283 ; via 0x20c2 2160: e1c120b6 strh r2, [r1, #6] 2164: e15f2ab8 ldrh r2, =0xe85 ; via 0x20c4 2168: e1c120ba strh r2, [r1, #10] ; 0xa 216c: e15f2abe ldrh r2, =0x2c0 ; via 0x20c6 2170: e1c120bc strh r2, [r1, #12] ; 0xc 2174: e15f2bb4 ldrh r2, =0x40 ; via 0x20c8 2178: e1c120b8 strh r2, [r1, #8] 217c: e15f2bba ldrh r2, =0x2a ; via 0x20ca 2180: e1c120be strh r2, [r1, #14] ; 0xe 2184: e51f10bc ldr r1, =0xfffef006 ; via 0x20d0 2188: e1d120b0 ldrh r2, [r1] 218c: e51f00c0 ldr r0, =0x8 ; via 0x20d4 2190: e1800002 orr r0, r0, r2 2194: e1c100b0 strh r0, [r1] 2198: e10f0000 mrs r0, CPSR 219c: e3c0001f bic r0, r0, #31 ; 0x1f 21a0: e3800013 orr r0, r0, #19 ; 0x13 21a4: e38000c0 orr r0, r0, #192 ; 0xc0 21a8: e129f000 msr CPSR_fc, r0 ; diff from TI: Compal's full RAM clearing 21ac: e3a00502 mov r0, #8388608 ; 0x800000 21b0: e3a02000 mov r2, #0 21b4: e3a01721 mov r1, #8650752 ; 0x840000 21b8: e2411080 sub r1, r1, #128 ; 0x80 21bc: e4802004 str r2, [r0], #4 21c0: e1500001 cmp r0, r1 21c4: 1afffffc bne 0x21bc 21c8: e3a00401 mov r0, #16777216 ; 0x1000000 21cc: e3a02000 mov r2, #0 21d0: e3a01741 mov r1, #17039360 ; 0x1040000 21d4: e2411080 sub r1, r1, #128 ; 0x80 21d8: e4802004 str r2, [r0], #4 21dc: e1500001 cmp r0, r1 21e0: 1afffffc bne 0x21d8 ; TI's code continues with INT_Loaded_Flag setting 21e4: e3a00001 mov r0, #1 21e8: e59f12c8 ldr r1, =0x83e6f4 ; via 0x24b8 21ec: e5810000 str r0, [r1] 21f0: e59f02bc ldr r0, =0x83e818 ; via 0x24b4 21f4: e3a01b01 mov r1, #1024 ; 0x400 21f8: e2411004 sub r1, r1, #4 21fc: e0802001 add r2, r0, r1 2200: e1a0a000 mov r10, r0 2204: e59f32b0 ldr r3, =0x83e6dc ; via 0x24bc 2208: e583a000 str r10, [r3] 220c: e1a0d002 mov sp, r2 2210: e59f32a8 ldr r3, =0x834920 ; via 0x24c0 2214: e583d000 str sp, [r3] 2218: e3a01080 mov r1, #128 ; 0x80 221c: e0822001 add r2, r2, r1 2220: e10f0000 mrs r0, CPSR 2224: e3c0001f bic r0, r0, #31 ; 0x1f 2228: e3800012 orr r0, r0, #18 ; 0x12 222c: e129f000 msr CPSR_fc, r0 2230: e1a0d002 mov sp, r2 2234: e3a01c02 mov r1, #512 ; 0x200 2238: e0822001 add r2, r2, r1 223c: e10f0000 mrs r0, CPSR 2240: e3c0001f bic r0, r0, #31 ; 0x1f 2244: e3800011 orr r0, r0, #17 ; 0x11 2248: e129f000 msr CPSR_fc, r0 224c: e1a0d002 mov sp, r2 2250: e10f0000 mrs r0, CPSR 2254: e3c0001f bic r0, r0, #31 ; 0x1f 2258: e3800017 orr r0, r0, #23 ; 0x17 225c: e129f000 msr CPSR_fc, r0 2260: e59fd268 ldr sp, =0x83e780 ; via 0x24d0 2264: e10f0000 mrs r0, CPSR 2268: e3c0001f bic r0, r0, #31 ; 0x1f 226c: e380001b orr r0, r0, #27 ; 0x1b 2270: e129f000 msr CPSR_fc, r0 2274: e59fd254 ldr sp, =0x83e780 ; via 0x24d0 2278: e10f0000 mrs r0, CPSR 227c: e3c0001f bic r0, r0, #31 ; 0x1f 2280: e3800013 orr r0, r0, #19 ; 0x13 2284: e129f000 msr CPSR_fc, r0 2288: e59f3234 ldr r3, =0x83cfd8 ; via 0x24c4 228c: e2822004 add r2, r2, #4 2290: e5832000 str r2, [r3] 2294: e3a01b01 mov r1, #1024 ; 0x400 2298: e3c11003 bic r1, r1, #3 229c: e0822001 add r2, r2, r1 22a0: e59f3220 ldr r3, =0x83d05c ; via 0x24c8 22a4: e5831000 str r1, [r3] 22a8: e3a01002 mov r1, #2 22ac: e59f3218 ldr r3, =0x83d06c ; via 0x24cc 22b0: e5831000 str r1, [r3] 22b4: e1a04002 mov r4, r2 22b8: eb061cb4 bl 0x189590 ; _f_load_int_mem 22bc: e1a02004 mov r2, r4 22c0: e59f11f4 ldr r1, =0x83e6dc ; via 0x24bc 22c4: e5910000 ldr r0, [r1] 22c8: e3a030fe mov r3, #254 ; 0xfe 22cc: e5c03000 strb r3, [r0] 22d0: e5c03001 strb r3, [r0, #1] 22d4: e5c03002 strb r3, [r0, #2] 22d8: e5c03003 strb r3, [r0, #3] 22dc: e4903004 ldr r3, [r0], #4 22e0: e4803004 str r3, [r0], #4 22e4: e1500002 cmp r0, r2 22e8: bafffffc blt 0x22e0 22ec: e51f0200 ldr r0, =0x280c ; via 0x20f4 22f0: e3700001 cmn r0, #1 22f4: 1b000077 blne 0x24d8 ; _auto_init 22f8: e1a00002 mov r0, r2 22fc: ea061cdf b 0x189680 ; _INC_Initialize $Init_Target: 17ba8c: b530 push {r4, r5, lr} 17ba8e: b081 sub sp, #4 17ba90: 496e ldr r1, =0xfffef008 ; via 0x17bc4c 17ba92: 2003 mov r0, #3 17ba94: 0340 lsl r0, r0, #13 17ba96: 8008 strh r0, [r1, #0] 17ba98: f006 f860 bl 0x181b5c ; $TM_DisableWatchdog 17ba9c: 486c ldr r0, =0xfffffd02 ; via 0x17bc50 17ba9e: 2105 mov r1, #5 17baa0: 8001 strh r1, [r0, #0] 17baa2: 2180 mov r1, #128 ; 0x80 17baa4: 8802 ldrh r2, [r0, #0] 17baa6: 4311 orr r1, r2 17baa8: 8001 strh r1, [r0, #0] 17baaa: 496a ldr r1, =0xffdf ; via 0x17bc54 17baac: 8802 ldrh r2, [r0, #0] 17baae: 4011 and r1, r2 17bab0: 8001 strh r1, [r0, #0] 17bab2: 4d69 ldr r5, =0xfffff900 ; via 0x17bc58 17bab4: 20ff mov r0, #255 ; 0xff 17bab6: 0200 lsl r0, r0, #8 17bab8: 8028 strh r0, [r5, #0] 17baba: 4c68 ldr r4, =0xffff9800 ; via 0x17bc5c 17babc: 4868 ldr r0, =0xfff3 ; via 0x17bc60 17babe: 8821 ldrh r1, [r4, #0] 17bac0: 4008 and r0, r1 17bac2: 8020 strh r0, [r4, #0] 17bac4: 8820 ldrh r0, [r4, #0] 17bac6: 8020 strh r0, [r4, #0] 17bac8: 4866 ldr r0, =0xf01f ; via 0x17bc64 17baca: 8821 ldrh r1, [r4, #0] 17bacc: 4008 and r0, r1 17bace: 8020 strh r0, [r4, #0] 17bad0: 2001 mov r0, #1 17bad2: 0280 lsl r0, r0, #10 17bad4: 8821 ldrh r1, [r4, #0] 17bad6: 4308 orr r0, r1 17bad8: 8020 strh r0, [r4, #0] 17bada: 2000 mov r0, #0 17badc: 2102 mov r1, #2 17bade: 2200 mov r2, #0 17bae0: f006 fd30 bl 0x182544 ; $CLKM_InitARMClock 17bae4: 4860 ldr r0, =0xfffffb00 ; via 0x17bc68 17bae6: 21a3 mov r1, #163 ; 0xa3 17bae8: 8001 strh r1, [r0, #0] 17baea: 8041 strh r1, [r0, #2] 17baec: 22a5 mov r2, #165 ; 0xa5 17baee: 8082 strh r2, [r0, #4] 17baf0: 80c1 strh r1, [r0, #6] 17baf2: 2180 mov r1, #128 ; 0x80 17baf4: 8141 strh r1, [r0, #10] ; 0xa 17baf6: 21c0 mov r1, #192 ; 0xc0 17baf8: 8181 strh r1, [r0, #12] ; 0xc 17bafa: 2140 mov r1, #64 ; 0x40 17bafc: 8101 strh r1, [r0, #8] 17bafe: 2020 mov r0, #32 ; 0x20 17bb00: 8068 strh r0, [r5, #2] 17bb02: 2000 mov r0, #0 17bb04: 80a8 strh r0, [r5, #4] 17bb06: 2010 mov r0, #16 ; 0x10 17bb08: 8821 ldrh r1, [r4, #0] 17bb0a: 4308 orr r0, r1 17bb0c: 8020 strh r0, [r4, #0] 17bb0e: 4857 ldr r0, =0xfffffa08 ; via 0x17bc6c 17bb10: 4957 ldr r1, =0xffff ; via 0x17bc70 17bb12: 8001 strh r1, [r0, #0] 17bb14: 8041 strh r1, [r0, #2] 17bb16: 2103 mov r1, #3 17bb18: 8181 strh r1, [r0, #12] ; 0xc 17bb1a: f004 ff21 bl 0x180960 ; $IQ_SetupInterrupts 17bb1e: 4855 ldr r0, =0xfffffc00 ; via 0x17bc74 17bb20: 2124 mov r1, #36 ; 0x24 17bb22: 8001 strh r1, [r0, #0] 17bb24: 210d mov r1, #13 ; 0xd 17bb26: 8041 strh r1, [r0, #2] 17bb28: 2500 mov r5, #0 17bb2a: 4853 ldr r0, =0xfffe2016 ; via 0x17bc78 17bb2c: 8005 strh r5, [r0, #0] 17bb2e: 4953 ldr r1, =0xfffe2014 ; via 0x17bc7c 17bb30: 2002 mov r0, #2 17bb32: 8008 strh r0, [r1, #0] 17bb34: 4952 ldr r1, =0xfffe2002 ; via 0x17bc80 17bb36: 2084 mov r0, #132 ; 0x84 17bb38: 8008 strh r0, [r1, #0] 17bb3a: 4852 ldr r0, =0xfffe2000 ; via 0x17bc84 17bb3c: 4952 ldr r1, =0x3de0 ; via 0x17bc88 17bb3e: 8001 strh r1, [r0, #0] 17bb40: 4952 ldr r1, =0xfffe2022 ; via 0x17bc8c ; ULPD setup different from TI's: SETUP_FRAME constant is 10 ; instead of TI's 12, probably resulting from the shorter SETUP_SLICER 17bb42: 220a mov r2, #10 ; 0xa 17bb44: 800a strh r2, [r1, #0] 17bb46: 4952 ldr r1, =0xfffe2020 ; via 0x17bc90 17bb48: 4a52 ldr r2, =0x45a ; via 0x17bc94 17bb4a: 800a strh r2, [r1, #0] 17bb4c: 4a52 ldr r2, =0xfffe201e ; via 0x17bc98 ; ULPD setup different from TI's: SETUP_SLICER constant is 330 ; instead of TI's 660 17bb4e: 21ff mov r1, #255 ; 0xff 17bb50: 314b add r1, #75 ; 0x4b 17bb52: 8011 strh r1, [r2, #0] 17bb54: 4951 ldr r1, =0xfffe201c ; via 0x17bc9c 17bb56: 221f mov r2, #31 ; 0x1f 17bb58: 800a strh r2, [r1, #0] 17bb5a: 4951 ldr r1, =0xfffe2024 ; via 0x17bca0 17bb5c: 800d strh r5, [r1, #0] 17bb5e: 4951 ldr r1, =0xfffe2010 ; via 0x17bca4 17bb60: 2202 mov r2, #2 17bb62: 880b ldrh r3, [r1, #0] 17bb64: 431a orr r2, r3 17bb66: 800a strh r2, [r1, #0] 17bb68: 4b4e ldr r3, =0xfffe2010 ; via 0x17bca4 17bb6a: 2104 mov r1, #4 17bb6c: 881a ldrh r2, [r3, #0] 17bb6e: 4311 orr r1, r2 17bb70: 8019 strh r1, [r3, #0] 17bb72: 4c4d ldr r4, =0xfffef006 ; via 0x17bca8 17bb74: 2127 mov r1, #39 ; 0x27 17bb76: 80e1 strh r1, [r4, #6] 17bb78: 8a01 ldrh r1, [r0, #16] ; 0x10 17bb7a: 0849 lsr r1, r1, #1 17bb7c: d30f bcc 0x17bb9e 17bb7e: 8a01 ldrh r1, [r0, #16] ; 0x10 17bb80: 0409 lsl r1, r1, #16 17bb82: 0c49 lsr r1, r1, #17 17bb84: 0049 lsl r1, r1, #1 17bb86: 8201 strh r1, [r0, #16] ; 0x10 17bb88: 2101 mov r1, #1 17bb8a: e001 b 0x17bb90 17bb8c: 9900 ldr r1, [sp, #0] 17bb8e: 3101 add r1, #1 17bb90: 9100 str r1, [sp, #0] 17bb92: 9900 ldr r1, [sp, #0] 17bb94: 2932 cmp r1, #50 ; 0x32 17bb96: d3f9 bcc 0x17bb8c 17bb98: 8a41 ldrh r1, [r0, #18] ; 0x12 17bb9a: 2900 cmp r1, #0 17bb9c: d0fc beq 0x17bb98 17bb9e: f006 fb10 bl 0x1821c2 ; $AI_ClockEnable 17bba2: f006 fb14 bl 0x1821ce ; $AI_InitIOConfig 17bba6: 2027 mov r0, #39 ; 0x27 17bba8: 0500 lsl r0, r0, #20 17bbaa: 8005 strh r5, [r0, #0] ; extra code not in TI's version ; superfluous bit clearing in the FFFE:F006 debug register 17bbac: 483f ldr r0, =0xffbf ; via 0x17bcac 17bbae: 8821 ldrh r1, [r4, #0] 17bbb0: 4008 and r0, r1 17bbb2: 8020 strh r0, [r4, #0] ; setting GPIO 2 high - shuts off UART 17bbb4: 2002 mov r0, #2 17bbb6: f006 fad3 bl 0x182160 ; $AI_SetBit ; setting bits 9 and 5 in FFFE:F00A - selecting IO9 and IO13 17bbba: 2001 mov r0, #1 17bbbc: 0240 lsl r0, r0, #9 17bbbe: 88a1 ldrh r1, [r4, #4] 17bbc0: 4308 orr r0, r1 17bbc2: 80a0 strh r0, [r4, #4] 17bbc4: 2020 mov r0, #32 ; 0x20 17bbc6: 88a1 ldrh r1, [r4, #4] 17bbc8: 4308 orr r0, r1 17bbca: 80a0 strh r0, [r4, #4] ; tail end of TI's original code 17bbcc: 2001 mov r0, #1 17bbce: f005 ffd3 bl 0x181b78 ; $TM_EnableTimer 17bbd2: 2002 mov r0, #2 17bbd4: f005 ffd0 bl 0x181b78 ; $TM_EnableTimer 17bbd8: b001 add sp, #4 17bbda: bd30 pop {r4, r5, pc} $Init_Drivers: 17bbdc: b500 push {lr} 17bbde: f7ca fb85 bl 0x1462ec 17bbe2: f7cc fab7 bl 0x148154 17bbe6: f00c fdac bl 0x188742 17bbea: f00c fdab bl 0x188744 17bbee: f7eb f9c5 bl 0x166f7c 17bbf2: f7ed fcb2 bl 0x16955a 17bbf6: f7cc fabf bl 0x148178 17bbfa: f7e3 f9e6 bl 0x15efca 17bbfe: f007 fe1d bl 0x18383c 17bc02: f7ed fa9b bl 0x16913c 17bc06: f77e fb27 bl 0xfa258 17bc0a: bd00 pop {pc} $Init_Serial_Flows: 17bc0c: b500 push {lr} 17bc0e: 4828 ldr r0, =0x83dfa8 ; via 0x17bcb0 17bc10: f7c9 ffea bl 0x145be8 17bc14: 2000 mov r0, #0 17bc16: 2102 mov r1, #2 17bc18: 2200 mov r2, #0 17bc1a: f7ca f85e bl 0x145cda 17bc1e: f7ca f8b8 bl 0x145d92 17bc22: bd00 pop {pc} $Init_Unmask_IT: 17bc24: b500 push {lr} 17bc26: 2004 mov r0, #4 17bc28: f004 fefb bl 0x180a22 ; $IQ_Unmask 17bc2c: 2012 mov r0, #18 ; 0x12 17bc2e: f004 fef8 bl 0x180a22 ; $IQ_Unmask 17bc32: 2007 mov r0, #7 17bc34: f004 fef5 bl 0x180a22 ; $IQ_Unmask 17bc38: 2008 mov r0, #8 17bc3a: f004 fef2 bl 0x180a22 ; $IQ_Unmask 17bc3e: bd00 pop {pc} $GpUnmaskRTCAlarmInterrupts: 17bc40: b500 push {lr} 17bc42: 200a mov r0, #10 ; 0xa 17bc44: f004 feed bl 0x180a22 ; $IQ_Unmask 17bc48: bd00 pop {pc} 17bc4a: 46c0 nop (mov r8, r8) $AI_EnableBit: 182144: 4a4b ldr r2, =0xfffef00a ; via 0x182274 182146: 2101 mov r1, #1 182148: 4081 lsl r1, r0 18214a: 8810 ldrh r0, [r2, #0] 18214c: 4301 orr r1, r0 18214e: 8011 strh r1, [r2, #0] 182150: 4770 bx lr $AI_DisableBit: 182152: 4a48 ldr r2, =0xfffef00a ; via 0x182274 182154: 2101 mov r1, #1 182156: 4081 lsl r1, r0 182158: 8810 ldrh r0, [r2, #0] 18215a: 4388 bic r0, r1 18215c: 8010 strh r0, [r2, #0] 18215e: 4770 bx lr $AI_SetBit: 182160: 4a45 ldr r2, =0xfffe4802 ; via 0x182278 182162: 2101 mov r1, #1 182164: 4081 lsl r1, r0 182166: 8810 ldrh r0, [r2, #0] 182168: 4301 orr r1, r0 18216a: 8011 strh r1, [r2, #0] 18216c: 4770 bx lr $AI_ResetBit: 18216e: 4a42 ldr r2, =0xfffe4802 ; via 0x182278 182170: 2101 mov r1, #1 182172: 4081 lsl r1, r0 182174: 8810 ldrh r0, [r2, #0] 182176: 4388 bic r0, r1 182178: 8010 strh r0, [r2, #0] 18217a: 4770 bx lr $AI_ConfigBitAsOutput: 18217c: 4a3f ldr r2, =0xfffe4804 ; via 0x18227c 18217e: 2101 mov r1, #1 182180: 4081 lsl r1, r0 182182: 8810 ldrh r0, [r2, #0] 182184: 4388 bic r0, r1 182186: 8010 strh r0, [r2, #0] 182188: 4770 bx lr $AI_ConfigBitAsInput: 18218a: 4a3c ldr r2, =0xfffe4804 ; via 0x18227c 18218c: 2101 mov r1, #1 18218e: 4081 lsl r1, r0 182190: 8810 ldrh r0, [r2, #0] 182192: 4301 orr r1, r0 182194: 8011 strh r1, [r2, #0] 182196: 4770 bx lr $AI_ReadBit: 182198: 4939 ldr r1, =0xfffe4800 ; via 0x182280 18219a: 8809 ldrh r1, [r1, #0] 18219c: 4101 asr r1, r0 18219e: 07c8 lsl r0, r1, #31 1821a0: 0fc0 lsr r0, r0, #31 1821a2: 0600 lsl r0, r0, #24 1821a4: 0e00 lsr r0, r0, #24 1821a6: 4770 bx lr $AI_Power: 1821a8: b500 push {lr} 1821aa: 2800 cmp r0, #0 1821ac: d101 bne 0x1821b2 1821ae: f7c4 fbdb bl 0x146968 ; $ABB_Power_Off 1821b2: bd00 pop {pc} $AI_ResetIoConfig: 1821b4: 4931 ldr r1, =0xfffe4804 ; via 0x18227c 1821b6: 4833 ldr r0, =0xffff ; via 0x182284 1821b8: 8008 strh r0, [r1, #0] 1821ba: 482e ldr r0, =0xfffef00a ; via 0x182274 1821bc: 2100 mov r1, #0 1821be: 8001 strh r1, [r0, #0] 1821c0: 4770 bx lr $AI_ClockEnable: 1821c2: 4931 ldr r1, =0xfffe4806 ; via 0x182288 1821c4: 2020 mov r0, #32 ; 0x20 1821c6: 880a ldrh r2, [r1, #0] 1821c8: 4310 orr r0, r2 1821ca: 8008 strh r0, [r1, #0] 1821cc: 4770 bx lr $AI_InitIOConfig: 1821ce: b500 push {lr} 1821d0: f7ff fff0 bl 0x1821b4 ; $AI_ResetIoConfig 1821d4: 2002 mov r0, #2 1821d6: f7ff ffb5 bl 0x182144 ; $AI_EnableBit 1821da: 2003 mov r0, #3 1821dc: f7ff ffb2 bl 0x182144 ; $AI_EnableBit 1821e0: 2004 mov r0, #4 1821e2: f7ff ffaf bl 0x182144 ; $AI_EnableBit 1821e6: 2005 mov r0, #5 1821e8: f7ff ffac bl 0x182144 ; $AI_EnableBit 1821ec: 2006 mov r0, #6 1821ee: f7ff ffa9 bl 0x182144 ; $AI_EnableBit 1821f2: 2007 mov r0, #7 1821f4: f7ff ffa6 bl 0x182144 ; $AI_EnableBit 1821f8: 2008 mov r0, #8 1821fa: f7ff ffa3 bl 0x182144 ; $AI_EnableBit 1821fe: 2009 mov r0, #9 182200: f7ff ffa0 bl 0x182144 ; $AI_EnableBit 182204: 491c ldr r1, =0xfffe4802 ; via 0x182278 182206: 4821 ldr r0, =0x3f02 ; via 0x18228c 182208: 8008 strh r0, [r1, #0] 18220a: 2001 mov r0, #1 18220c: f7ff ffb6 bl 0x18217c ; $AI_ConfigBitAsOutput 182210: 2002 mov r0, #2 182212: f7ff ffb3 bl 0x18217c ; $AI_ConfigBitAsOutput 182216: 2005 mov r0, #5 182218: f7ff ffb0 bl 0x18217c ; $AI_ConfigBitAsOutput 18221c: 2007 mov r0, #7 18221e: f7ff ffad bl 0x18217c ; $AI_ConfigBitAsOutput 182222: 2009 mov r0, #9 182224: f7ff ffb1 bl 0x18218a ; $AI_ConfigBitAsInput 182228: 200b mov r0, #11 ; 0xb 18222a: f7ff ffae bl 0x18218a ; $AI_ConfigBitAsInput 18222e: 200d mov r0, #13 ; 0xd 182230: f7ff ffab bl 0x18218a ; $AI_ConfigBitAsInput 182234: 200e mov r0, #14 ; 0xe 182236: f7ff ffa1 bl 0x18217c ; $AI_ConfigBitAsOutput 18223a: 200f mov r0, #15 ; 0xf 18223c: f7ff ff9e bl 0x18217c ; $AI_ConfigBitAsOutput 182240: bd00 pop {pc} $AI_SelectIOForIT: 182242: 0109 lsl r1, r1, #4 182244: 1840 add r0, r0, r1 182246: 0040 lsl r0, r0, #1 182248: 3001 add r0, #1 18224a: 4911 ldr r1, =0xfffe4814 ; via 0x182290 18224c: 8008 strh r0, [r1, #0] 18224e: 4770 bx lr $AI_CheckITSource: 182250: 2100 mov r1, #0 182252: 4a10 ldr r2, =0xfffe4816 ; via 0x182294 182254: 8812 ldrh r2, [r2, #0] 182256: 4210 tst r0, r2 182258: d000 beq 0x18225c 18225a: 2101 mov r1, #1 18225c: 1c08 add r0, r1, #0 18225e: 4770 bx lr $AI_UnmaskIT: 182260: 4a0d ldr r2, =0xfffe4818 ; via 0x182298 182262: 8811 ldrh r1, [r2, #0] 182264: 4381 bic r1, r0 182266: 8011 strh r1, [r2, #0] 182268: 4770 bx lr $AI_MaskIT: 18226a: 4a0b ldr r2, =0xfffe4818 ; via 0x182298 18226c: 8811 ldrh r1, [r2, #0] 18226e: 4301 orr r1, r0 182270: 8011 strh r1, [r2, #0] 182272: 4770 bx lr $INC_Initialize: 1887ac: b510 push {r4, lr} 1887ae: 1c04 add r4, r0, #0 1887b0: 4813 ldr r0, =0x83e688 ; via 0x188800 1887b2: 2101 mov r1, #1 1887b4: 6001 str r1, [r0, #0] 1887b6: f001 f883 bl 0x1898c0 1887ba: f001 f87d bl 0x1898b8 1887be: f001 f859 bl 0x189874 1887c2: f000 fbd9 bl 0x188f78 1887c6: f7fb f8e7 bl 0x183998 1887ca: f000 fe2f bl 0x18942c 1887ce: f000 fdad bl 0x18932c 1887d2: f000 fd8b bl 0x1892ec 1887d6: f000 fd99 bl 0x18930c 1887da: f000 fde7 bl 0x1893ac 1887de: f000 fdb5 bl 0x18934c 1887e2: f000 fe13 bl 0x18940c 1887e6: f7fe f881 bl 0x1868ec 1887ea: f000 fe2f bl 0x18944c 1887ee: 1c20 add r0, r4, #0 1887f0: f000 fd10 bl 0x189214 ; $Application_Initialize 1887f4: 4902 ldr r1, =0x83e688 ; via 0x188800 1887f6: 2002 mov r0, #2 1887f8: 6008 str r0, [r1, #0] 1887fa: f7a8 ff75 bl 0x1316e8 1887fe: bd10 pop {r4, pc} $Application_Initialize: 189214: b500 push {lr} 189216: f7f2 fc39 bl 0x17ba8c ; $Init_Target 18921a: f7f2 fcdf bl 0x17bbdc ; $Init_Drivers 18921e: f7cb fa31 bl 0x154684 ; $key_pressed_times 189222: f736 fafa bl 0xbf81a ; $Cust_Init_Layer1 189226: f7cb fa2d bl 0x154684 ; $key_pressed_times 18922a: f7f2 fcef bl 0x17bc0c ; $Init_Serial_Flows 18922e: f7ad f8d6 bl 0x1363de ; $StartFrame 189232: f7f2 fcf7 bl 0x17bc24 ; $Init_Unmask_IT 189236: bd00 pop {pc} _INC_Initialize: ; call veneer 189680: e92d4000 stmdb sp!, {lr} 189684: e28fe001 add lr, pc, #1 189688: e12fff1e bx lr 18968c: f7ff f88e bl 0x1887ac ; $INC_Initialize 189690: 4778 bx pc 189692: 46c0 nop (mov r8, r8) 189694: e8bd8000 ldmia sp!, {pc}